Victor Dyseryn (Ecole Polytechnique

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Papers (1)

1. Analysing Mutual Exclusion using Process Algebra with Signals cs.LO · 2017 · author #1

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Frequent Coauthors

• Australia) 1 shared papers
• CSIRO 1 shared papers
• France) 1 shared papers
• Paris 1 shared papers
• Peter H\"ofner (Data61 1 shared papers
• Rob van Glabbeek (Data61 1 shared papers
• Sydney 1 shared papers