{"paper":{"title":"Three Dimensionial Surface Modelling: A Novel Analysis Technique for Non-Destructive X-Ray Diffraction Imaging of Semiconductor Die Warpage & Strain in Fully Encapsulated Integrated Circuits","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":[],"primary_cat":"cond-mat.mtrl-sci","authors_text":"A. Henry, A. N. Danilewsky, D. Allen, D. Manessis, J. Stopford, J. Wittge, L. Boettcher, N. Bennett, P. J. McNally","submitted_at":"2012-04-06T12:37:59Z","abstract_excerpt":"Future complementary metal oxide semiconductor (CMOS) scaling for advanced integrated circuit (IC) technologies may well depend on \"More than Moore\" (MtM) approaches using heterogeneous integration of semiconductor-based devices. In order to realise this, advanced packaging technologies including System in Package (SiP), System on Chip (SoC) and 3D Integrated Circuits (3D ICs) are key enabling technologies. However, these advanced packages are plagued by reliability problems and to date there is no proven or accepted non-destructive metrology which can simultaneously probe materials properties"},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"1204.1466","kind":"arxiv","version":1},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"}