{"paper":{"title":"Characterization and Modeling of 0.18{\\mu}m CMOS Technology at sub-Kelvin Temperature","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":["cond-mat.mes-hall"],"primary_cat":"physics.app-ph","authors_text":"Chao Luo, GuoPing Guo, Jun Xu, Tengteng Lu, Weicheng Kong, Zhen Li","submitted_at":"2018-11-30T06:24:52Z","abstract_excerpt":"Previous cryogenic electronics studies are most above 4.2K. In this paper we present the cryogenic characterization of a 0.18{\\mu}m standard bulk CMOS technology(1.8V and 5V) at sub-kelvin temperature around 270mK. PMOS and NMOS devices with different width to length ratios(W/L) are tested and characterized under various bias conditions at temperatures from 300K to 270mK. It is shown that the 0.18{\\mu}m standard bulk CMOS technology is still working at sub-kelvin temperature. The kink effect and current overshoot phenomenon are observed at sub-kelvin temperature. Especially, current overshoot "},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"1811.12632","kind":"arxiv","version":1},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"}