{"paper":{"title":"MultiPath Memory Access: Breaking Host-GPU Bandwidth Bottlenecks in LLM Services","license":"http://creativecommons.org/licenses/by-nc-nd/4.0/","headline":"Multipath Memory Access routes host-GPU copies over unused server links to raise bandwidth 4.6x.","cross_cats":["cs.NI","cs.PF"],"primary_cat":"cs.DC","authors_text":"Chengguang Xu, Daoping Zhang, Feiqiang Sun, Feng Jin, Guo Chen, Junjie Chen, Lingfeng Tang, Peihao Huang, Yuxin Chen","submitted_at":"2025-12-18T00:45:00Z","abstract_excerpt":"Host-GPU data movement has become a latency-critical bottleneck in LLM serving, surfacing in common paths such as model-weight movement and KV cache offload/fetch. Today, each host-GPU copy is effectively confined to the PCIe path of the target GPU, even though modern multi-GPU servers contain additional PCIe links on peer GPUs and high bandwidth GPU interconnects. This leaves substantial intra-server I/O capacity unused. To address this issue, we present Multipath Memory Access (MMA), a software-defined multipath memory access system for host--GPU data transfer. To the best of our knowledge, "},"claims":{"count":4,"items":[{"kind":"strongest_claim","text":"On an 8-GPU NVIDIA H20 server, MMA achieves 245 GB/s peak host-to-GPU bandwidth, a 4.62x improvement over native CUDA copies, and reduces TTFT for KV cache fetching by 1.14-2.38x and model wake-up/switching latency by 1.12-2.48x.","source":"verdict.strongest_claim","status":"machine_extracted","claim_id":"C1","attestation":"unclaimed"},{"kind":"weakest_assumption","text":"That the additional relay paths through peer GPUs and high-bandwidth interconnects can be utilized with low enough overhead and without breaking CUDA stream semantics or application correctness under real LLM workloads.","source":"verdict.weakest_assumption","status":"machine_extracted","claim_id":"C2","attestation":"unclaimed"},{"kind":"one_line_summary","text":"MMA routes host-GPU transfers over multiple available paths to deliver 4.62x higher peak bandwidth and lower latencies in LLM serving without hardware or driver changes.","source":"verdict.one_line_summary","status":"machine_extracted","claim_id":"C3","attestation":"unclaimed"},{"kind":"headline","text":"Multipath Memory Access routes host-GPU copies over unused server links to raise bandwidth 4.6x.","source":"verdict.pith_extraction.headline","status":"machine_extracted","claim_id":"C4","attestation":"unclaimed"}],"snapshot_sha256":"7a9b940f8b6997b6775ec9caeea74b659146f4f8fdfb5dfdef8a46921900e8ff"},"source":{"id":"2512.16056","kind":"arxiv","version":2},"verdict":{"id":"aa1d4163-20f0-4562-a277-c1fdf22739c5","model_set":{"reader":"grok-4.3"},"created_at":"2026-05-16T21:54:28.884047Z","strongest_claim":"On an 8-GPU NVIDIA H20 server, MMA achieves 245 GB/s peak host-to-GPU bandwidth, a 4.62x improvement over native CUDA copies, and reduces TTFT for KV cache fetching by 1.14-2.38x and model wake-up/switching latency by 1.12-2.48x.","one_line_summary":"MMA routes host-GPU transfers over multiple available paths to deliver 4.62x higher peak bandwidth and lower latencies in LLM serving without hardware or driver changes.","pipeline_version":"pith-pipeline@v0.9.0","weakest_assumption":"That the additional relay paths through peer GPUs and high-bandwidth interconnects can be utilized with low enough overhead and without breaking CUDA stream semantics or application correctness under real LLM workloads.","pith_extraction_headline":"Multipath Memory Access routes host-GPU copies over unused server links to raise bandwidth 4.6x."},"references":{"count":52,"sample":[{"doi":"","year":null,"title":"MMA code base will be opensourced after paper ac- cepted","work_id":"62fb66e6-930b-43a1-be90-57ee36b0ba4a","ref_index":1,"cited_arxiv_id":"","is_internal_anchor":false},{"doi":"","year":2022,"title":"Advanced Micro Devices","work_id":"9be9b912-df33-4373-a31f-11476d1f55b2","ref_index":2,"cited_arxiv_id":"","is_internal_anchor":false},{"doi":"","year":2024,"title":"Advanced Micro Devices","work_id":"89774536-8edc-4183-ac14-ed01cf54940b","ref_index":3,"cited_arxiv_id":"","is_internal_anchor":false},{"doi":"","year":2022,"title":"Deepspeed-inference: enabling efficient in- ference of transformer models at unprecedented scale","work_id":"461bf7aa-e1b9-4309-a540-e2905d823c31","ref_index":4,"cited_arxiv_id":"","is_internal_anchor":false},{"doi":"","year":2023,"title":"Qwen Technical Report","work_id":"bb1fd52f-6b2f-437c-9516-37bdf6eb9be8","ref_index":5,"cited_arxiv_id":"2309.16609","is_internal_anchor":true}],"resolved_work":52,"snapshot_sha256":"41433ff6ca49d50f8face4bafba8465b901f73a62d0613b2a08589f02906c2a9","internal_anchors":3},"formal_canon":{"evidence_count":2,"snapshot_sha256":"887e95af28021118d353108b58ceb78b080a7a286f5a7d98d9413c2e06346528"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"}