{"paper":{"title":"Ten-Four: An Open-Source Fused Dot Product Unit for Mixed-Precision GPGPU Tensor Cores","license":"http://creativecommons.org/licenses/by/4.0/","headline":"Ten-Four fuses floating-point and integer pipelines into one dot-product unit that runs mixed-precision matrix operations in four cycles.","cross_cats":[],"primary_cat":"cs.AR","authors_text":"Blaise Tine, Nikhil Rout","submitted_at":"2025-11-19T15:57:09Z","abstract_excerpt":"Efficient mixed-precision MMA operations are critical for accelerating deep learning workloads on GPGPUs. However, existing open-source Tensor Core implementations rely on discrete arithmetic unit designs, leading to high latency, accumulated rounding errors, and poor resource utilization. To address these challenges, we propose Ten-Four, a configurable mixed-precision fused dot product unit integrating both floating-point and integer arithmetic pipelines within a unified architecture, implemented as part of the open-source RISC-V-based Vortex GPGPU's Tensor Core Unit extension. It supports lo"},"claims":{"count":4,"items":[{"kind":"strongest_claim","text":"Ten-Four achieves 4-cycle operation latency at 262.325 MHz Fmax, delivering 134.308 GFLOPS peak throughput per Tensor Core on the AMD Xilinx Alveo U55C FPGA, demonstrating ~3.1x performance improvement over an equivalent Berkeley HardFloat-based implementation at less than 60% the area cost.","source":"verdict.strongest_claim","status":"machine_extracted","claim_id":"C1","attestation":"unclaimed"},{"kind":"weakest_assumption","text":"That the fused pipeline preserves exact numerical equivalence to discrete units across all supported formats (FP16/BF16/FP8/BF8/INT8/INT4) without hidden rounding differences that only appear under specific input patterns or when integrated into the full Vortex Tensor Core.","source":"verdict.weakest_assumption","status":"machine_extracted","claim_id":"C2","attestation":"unclaimed"},{"kind":"one_line_summary","text":"Ten-Four delivers a fused mixed-precision dot-product unit for open-source GPGPUs that runs in 4 cycles at 262 MHz, matches NVIDIA numerical accuracy, and uses less than 60% the area of a prior open implementation while delivering 3.1x higher throughput.","source":"verdict.one_line_summary","status":"machine_extracted","claim_id":"C3","attestation":"unclaimed"},{"kind":"headline","text":"Ten-Four fuses floating-point and integer pipelines into one dot-product unit that runs mixed-precision matrix operations in four cycles.","source":"verdict.pith_extraction.headline","status":"machine_extracted","claim_id":"C4","attestation":"unclaimed"}],"snapshot_sha256":"330ed9e535d85a13fd73b3f1f1b2561ef556128a1ec8af7593e0595485888f78"},"source":{"id":"2512.00053","kind":"arxiv","version":3},"verdict":{"id":"c7a68bf3-5005-48d4-8b28-716166a6e185","model_set":{"reader":"grok-4.3"},"created_at":"2026-05-17T20:32:14.255485Z","strongest_claim":"Ten-Four achieves 4-cycle operation latency at 262.325 MHz Fmax, delivering 134.308 GFLOPS peak throughput per Tensor Core on the AMD Xilinx Alveo U55C FPGA, demonstrating ~3.1x performance improvement over an equivalent Berkeley HardFloat-based implementation at less than 60% the area cost.","one_line_summary":"Ten-Four delivers a fused mixed-precision dot-product unit for open-source GPGPUs that runs in 4 cycles at 262 MHz, matches NVIDIA numerical accuracy, and uses less than 60% the area of a prior open implementation while delivering 3.1x higher throughput.","pipeline_version":"pith-pipeline@v0.9.0","weakest_assumption":"That the fused pipeline preserves exact numerical equivalence to discrete units across all supported formats (FP16/BF16/FP8/BF8/INT8/INT4) without hidden rounding differences that only appear under specific input patterns or when integrated into the full Vortex Tensor Core.","pith_extraction_headline":"Ten-Four fuses floating-point and integer pipelines into one dot-product unit that runs mixed-precision matrix operations in four cycles."},"integrity":{"clean":true,"summary":{"advisory":0,"critical":0,"by_detector":{},"informational":0},"endpoint":"/pith/2512.00053/integrity.json","findings":[],"available":true,"detectors_run":[],"snapshot_sha256":"c28c3603d3b5d939e8dc4c7e95fa8dfce3d595e45f758748cecf8e644a296938"},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":2,"snapshot_sha256":"3f3a1ec68ad5750dd2f34c0e4c70f0eb7c36de5975423351257c572d3726c114"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"}