{"paper":{"title":"A Phase Lookahead DTC for Fast Settling Switched Loop DPLL","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":[],"primary_cat":"physics.ins-det","authors_text":"Pallavi Paliwal, Shalabh Gupta, Vivek Yadav","submitted_at":"2018-06-08T10:00:46Z","abstract_excerpt":"In most digital-to-time converter (DTC) based applications, apart from maintaining low integral non-linearity (INL), it is also required of the system to achieve a wide frequency translation range. To achieve this performance, we present a dual-phase direct digital synthesizer (DDS) based DTC with phase-lookahead mechanism. The proposed technique of variable phase-advancement enhances the frequency translation range, without excessive power consumption. A 5-GHz digital phase locked loop (DPLL) with switched loop, incorporating this DDS based DTC, is implemented in CMOS65nm-LL technology. The p"},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"1806.03055","kind":"arxiv","version":1},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"}