{"id":"5340ec14-416d-4c45-9072-927bfbaf2388","arxiv_id":"1908.08669","paper_version":3,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"A dq-frame frequency-locked loop with an extra phase-error correction path achieves a first-order frequency estimate and faster, better-damped grid synchronization than the conventional FLL.","lead":"This paper introduces a new frequency-locked loop that operates in the rotating dq frame and uses both frequency and phase errors to lock onto the grid. It shows faster, better-damped frequency and phase tracking than the standard stationary-frame FLL.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The first-order claim (18) is established only under the θe≈0 and ωe<<k linearization; the tested transients approach but do not probe the nonlinear boundary, so a nonlinear simulation is needed to support the claim that d can be increased without damping degradation.","rationale":"The algebraic derivation of Eq. (18) is internally consistent: substituting G(s)=d s/(V(s+k)) into the open-loop gain indeed reduces it to d/s and the closed-loop frequency estimate becomes a first-order low-pass filter. The reader's weakest assumption is the same one I would flag: the result is a small-signal linearization result, and the paper's design guidance (increase d without damping degradation) rests on that linearization. The experiments are consistent with the linear model but do not stress the nonlinear boundary, so the conditional verdict is appropriate. A nonlinear simulation comparing the exact loop to Eq. (18) is a concrete, low-cost check that would determine whether the first-order behavior extends to the tested transients or only to infinitesimal perturbations.","tokens_in":8043,"tokens_out":37222,"duration_ms":385810,"concrete_test":"Simulate the exact nonlinear equations (2)-(7) and (14), with k=120π and d=2k, for a 20° phase step and a 10 Hz frequency step. Compare the simulated ω̂(t) and ω̂_b(t) with the linear predictions d/(s+d) and kd/((s+k)(s+d)). If the simulated response has more than about 5% overshoot or the 2% settling time deviates by more than 10% from the linear prediction, the small-signal design does not cover the claimed large-signal envelope.","verdict_should_be":"CONDITIONAL","load_bearing_attack":"The central result is Eq. (18), Δω̂/Δω = d/(s+d), obtained by choosing G(s)=d s/(V(s+k)) so that the open-loop gain collapses to d/s in Eq. (17). This collapse requires the small-signal replacements x_aI ≈ V^2/(s+k)ω_e (Eq. (8), valid for ωe<<k) and u_q ≈ Vθ_e (valid for θe≈0). In the actual loop, u_q = V sin θe and the x_a dynamics couple ωe through x_aR (Eq. (5)). During the validation, a 20° phase step gives θe(0)=0.35 rad, where sinθe differs from θe by about 2%, and a +5 Hz frequency step gives ωe=31.4 rad/s against k=120π≈377 rad/s, i.e., about 8% of k. These tests are in the small-signal regime but are not a stress test of the linearization. For larger disturbances or smaller d, the sinθe nonlinearity and the ωe x_aR coupling will alter the effective open-loop gain, so the claimed real-root/first-order behavior is not guaranteed. Because the paper recommends increasing d without deterioration of damping, the absence of a nonlinear stability and performance check is the main load-bearing gap.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes a synchronous-reference-frame frequency-locked loop (SRF-FLL). It first defines SRF-FLL0, a dq-frame structure whose small-signal frequency-estimation transfer function is shown to be identical to that of the conventional αβ-frame FLL when the frequency gain is set to D=kd/V². It then augments SRF-FLL0 with a phase-error path G(s) and selects G(s)=d s/[V(s+k)], which collapses the open-loop gain to d/s. The resulting frequency estimate satisfies Δω̂/Δω = d/(s+d), i.e., a first-order response, and the alternative estimate ω̂_b has denominator (s+k)(s+d), giving real roots. The paper gives tuning guidelines, Bode plots, and experimental comparisons for frequency and phase steps, concluding that the proposed SRF-FLL has better filtering and transient performance than the conventional FLL with the same prefilter parameter k.","tokens_in":8328,"tokens_out":10639,"duration_ms":105410,"significance":"If the small-signal result holds over the intended operating range, the contribution is useful: it introduces an extra design degree of freedom for FLLs, gives a simple realization of G(s) through Eq. (20), and provides a clear explanation of why increasing the frequency-estimate gain does not degrade damping in the linearized model. The derivation is self-contained and the transfer functions are internally consistent; the equivalence of SRF-FLL0 with the conventional FLL is a clean analytic result. The experimental comparison against the conventional FLL under the same k supports the claimed improvement for the tested operating points.","major_comments":[{"comment":"The first-order frequency-estimate result and the guideline that 'd can be increased without deteriorating damping' are derived from a small-signal model built on the assumptions θe≈0 and ωe<<k, stated before Eq. (8) and before Eq. (14). The experimental validation uses +5 Hz frequency steps and 20° phase steps with k=120π, so initially ωe/k≈0.083 and sinθe/θe≈0.98; these tests stay within the linearization but do not probe its boundary. Because Table I and the conclusion state the claim unconditionally, the manuscript should either provide a nonlinear stability and performance check (for example, simulations with ωe/k approaching unity and larger phase steps) or explicitly restrict the claim to the small-signal regime.","section":"§III.A, Eqs. (17)–(18), Fig. 5"},{"comment":"The cancellation that produces the open-loop gain d/s in Eq. (17) requires exact knowledge of the grid-voltage amplitude V inside G(s)=d s/[V(s+k)], but the manuscript does not say how V is obtained or updated in the implementation. If the actual amplitude differs from the value used in G(s), the open-loop gain becomes d/s · [k+(V_act/V_nom)s]/(s+k), so the frequency estimate is no longer exactly first order and the damping-independence property is lost. The amplitude-sag test in Fig. 8(a) should be accompanied by a statement of how V is handled or by a sensitivity analysis.","section":"§III.A, Eq. (16), Fig. 3"}],"minor_comments":[{"comment":"The abstract contains typographical errors such as 'propose s' and 'acquir e'; the manuscript should be proofread.","section":"Abstract"},{"comment":"Equation (14) is typeset ambiguously; the intended relation ω̂ = D x_aI/s + G(s) u_q should be written with explicit parentheses so that the two signal paths are clear.","section":"§II.B, Eq. (14)"},{"comment":"The sentence 'The selection of k has no inference for the comparison results' should read 'no influence'.","section":"§IV.B"},{"comment":"The axes of Figs. 8 and 9 lack clear numerical scales for the estimated quantities; annotating settling times or overshoot values would make the claimed improvements quantitative.","section":"Figs. 8–9"},{"comment":"The manuscript should state the discretization method and sampling frequency used on the TMS320F28379D testbed, since the experimental results are obtained digitally.","section":"§IV.B"},{"comment":"Reference [6] is cited as 'vol. PP, no. 99, pp. 1–1'; please update it to the final publication data.","section":"References"}],"recommendation":"major_revision","confidential_remarks":"The paper is technically sound within its stated linearized scope and the experimental evidence is consistent with the small-signal analysis. The main editorial decision hinges on whether the claims can be made conditional on the small-signal assumptions or supported by a nonlinear check; the voltage-amplitude dependence of G(s) also needs clarification. With those additions the letter would be suitable for publication."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"The paper does something real: it moves the FLL into the dq frame and uses the q-axis voltage as an explicit phase-error path. The baseline equivalence between SRF-FLL0 and the conventional FLL is a clean restatement, and the improved loop with G(s) is a genuine new architecture. The first-order frequency-loop result, eq. (18), is a useful design simplification: it makes the frequency-estimate gain d directly settable without touching the damping. That is worth having, and the Bode plots and step responses back it up over the tested range.\n\nThe main soft spot is the one the stress-test flags: eq. (18) is derived under the linearizations θe≈0 and ωe<<k. The experiments use a 20° phase step and a 5 Hz frequency step, which are small-signal but not tiny, and nothing in the paper checks whether the first-order claim, or the real-root damping property, survives a genuinely large disturbance. The authors recommend raising d freely, which makes the nonlinearity question load-bearing. A nonlinear simulation or a bounding analysis would settle it. I don't think it's fatal, but it should be added before publication.\n\nThe second issue is presentation. The step from the open-loop gain (15) to the selection of G(s) in (16)-(17) is shown in a compressed way; a reader has to guess at the algebra. The same goes for the transition from the generic G(s) to the concrete first-order result. This is a minor fix.\n\nThe experimental section is visual and single-platform, which is typical for a letter, but I'd like at least one quantitative comparison against the derived transfer functions. Also, the harmonic-rejection discussion is thin; the claim of better filtering is only checked on the fundamental sequence.\n\nWho gets value from this? Researchers working on grid synchronization or inverter control in a power-electronics group. The novel dq-frame phase-error path is the kind of idea that will spawn follow-ups. The math is mostly sound and the citation pattern is fine; the main thing missing is proof that the design behaves as advertised outside the small-signal neighborhood.\n\nI would send this to peer review. It's a solid original contribution with a fixable gap, not a paper that should be desk-rejected.","headline":"A genuinely new FLL architecture with a clean small-signal design story, held back by a hidden linearization assumption and a few skipped algebraic steps.","tokens_in":8886,"tokens_out":13162,"would_cite":false,"duration_ms":123997,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"This paper claims that feeding the dq-frame phase error through the loop filter $G(s)=ds/(V(s+k))$ makes the frequency estimate a first-order system, so gain $d$ can be raised without degrading damping.","keywords":["frequency-locked loop","synchronous reference frame","dq frame","phase error","loop filter","first-order frequency estimation","grid synchronization","inverter control"],"falsifier":"Apply a 20-degree phase step with $d$ set to several times $k$ and compare the measured frequency estimate to the first-order prediction $\\Delta\\hat{\\omega}/\\Delta\\omega=d/(s+d)$; overshoot or a settling time that does not scale as $1/d$ would show the small-signal derivation misses the transient.","tokens_in":7846,"feed_emoji":"⚡","tokens_out":9783,"duration_ms":94382,"temperature":0.7,"pith_summary":"Grid-connected inverters need to estimate the grid frequency and phase quickly and cleanly. This letter proposes doing frequency-locked-loop estimation in the synchronous dq reference frame rather than the stationary $\\alpha\\beta$ frame, where small-signal modeling is harder. The key claim is that by feeding the dq-frame phase error $u_q$ through the loop filter $G(s)=d s/(V(s+k))$, the frequency-estimate transfer function becomes a first-order low-pass filter $\\Delta\\hat{\\omega}/\\Delta\\omega = d/(s+d)$. That lets the frequency-estimation gain $d$ be increased to speed up response without pushing the loop into overshoot, which the conventional FLL cannot do. A sympathetic reader would care because grid synchronization is a basic building block of inverter control, and the paper offers a parameter-tuning rule that is simpler than the second-order models used for existing FLLs.","feed_headline":"Moving FLLs to the dq frame makes frequency tracking first-order","feed_subtitle":"Adding one phase-error filter lets gain d speed response without overshoot, beating the conventional FLL at equal filtering.","key_machinery":"The load-bearing object is the small-signal block diagram of the frequency-estimation loop in the dq frame (Fig. 2). The auxiliary complex variable $x_a = \\mathrm{conj}(\\hat{\\mathbf{u}}_{dq})\\mathbf{u}_{dq}$ is a complex low-pass filter whose imaginary part $x_{aI}$ carries the frequency error, while the q-axis voltage $u_q$ carries the phase error. Feeding $u_q$ through $G(s)=d s/(V(s+k))$ adds a term that cancels the prefilter pole at $-k$, turning the open-loop gain into $d/s$ and the closed-loop frequency estimate into a first-order low-pass filter with pole at $-d$. The same algebraic relation allows this filter to be realized without an extra filter block, by scaling the estimate error $\\hat{u}_q-u_q$ by $d/V$ and integrating.","core_discovery":"The paper's central discovery is that a frequency-locked loop implemented in the synchronous dq frame can use both frequency error (from $x_{aI}$, the imaginary part of a conjugate auxiliary variable) and phase error (from $u_q$) at the same time. Selecting the extra loop filter $G(s)=d s/(V(s+k))$ cancels the prefilter pole and converts the frequency-estimation closed loop into the first-order transfer function $\\Delta\\hat{\\omega}/\\Delta\\omega = d/(s+d)$. The phase-corrected estimate $\\hat{\\omega}_b$ has poles at $-k$ and $-d$, so both characteristic roots are real for any positive $d$ and $k$. Consequently, unlike the conventional FLL whose damping ratio falls as the frequency gain rises, the SRF-FLL can raise $d$ to speed up tracking while keeping overdamped behavior; with the same prefilter $k$ it also has stronger high-frequency attenuation. The paper verifies this with bench experiments on frequency steps, phase steps, and amplitude sags.","pith_inferences":["The paper's verification is limited to the fundamental positive-sequence component; harmonic and unbalanced-grid operation is delegated to additional prefilters, so the claimed improvement is demonstrated only for clean fundamental-voltage conditions.","The pole-zero cancellation in $G(s)$ assumes exact knowledge of $V$ and $k$; voltage sags or parameter drift would leave residual dynamics that the paper does not quantify.","The dq-frame construction suggests a family of loop filters $G(s)$: a PI choice would blend PLL and FLL behavior, while resonant choices could target specific harmonics without adding integrators to the main frequency loop."],"forward_implications":["With the same prefilter gain $k$, the proposed SRF-FLL can choose a larger frequency-estimation gain $d$, making the frequency response faster without the overshoot that appears in the conventional FLL at large $d$.","The frequency estimate $\\hat{\\omega}$ is a first-order system, so its settling time is set directly by $d$; this gives a simpler tuning rule than the second-order model used for conventional FLLs.","The phase-corrected estimate $\\hat{\\omega}_b$ has two real poles ($-k$ and $-d$), meaning overdamped response for all positive $k,d$, and is recommended as the final frequency output because it handles phase-step transients well.","The extra loop filter $G(s)$ is an additional design degree of freedom; the paper notes that choosing a PI controller in that path would drive $u_q$ to zero and produce a hybrid PLL-FLL behavior, which it leaves for future study."],"supporting_citations":[{"why":"Motivates the dq-frame implementation by explaining why small-signal modeling in the $\\alpha\\beta$ frame is difficult for FLLs.","marker":"[2]"},{"why":"Baseline multiresonant SOGI-FLL whose filtering and tuning the proposed design improves upon.","marker":"[4]"},{"why":"ROGI-FLL baseline and source of the generalized-integrator prefilter structure.","marker":"[5]"},{"why":"Complex-coefficient complex-variable filter, used as another generalized-integrator variant in the FLL comparisons.","marker":"[6]"},{"why":"Provides a second-order frequency-estimation model that the paper contrasts with its proposed first-order model.","marker":"[8]"},{"why":"Supplies the conventional FLL transfer function, the second-order model, and the optimal $d=0.5k$ design rule that the proposed SRF-FLL is compared against.","marker":"[9]"}],"fun_headline_variants":["SRF-FLL: dq-frame locking turns frequency tracking first-order","dq-frame FLL uses phase and frequency error for first-order response","First-order frequency tracking in dq frame: no more FLL overshoot","dq-frame FLL: one filter makes tracking first-order and overshoot-free","FLL moves to dq frame, gets first-order tracking"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The derivation assumes the phase error stays close to zero and the frequency error is much smaller than the prefilter gain $k$; if a large transient violates that, the first-order transfer function is not guaranteed.","fun_headline_variants_meta":{"raw":{"variants":["SRF-FLL: dq-frame locking turns frequency tracking first-order","dq-frame FLL uses phase and frequency error for first-order response","First-order frequency tracking in dq frame: no more FLL overshoot","dq-frame FLL: one filter makes tracking first-order and overshoot-free","FLL moves to dq frame, gets first-order tracking"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000909,"raw_usage":{"total_tokens":3863,"prompt_tokens":859,"completion_tokens":3004,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":475,"completion_tokens_details":{"reasoning_tokens":2909}},"tokens_in":475,"tokens_out":3004,"duration_ms":20576,"temperature":1.0,"reasoning_tokens":2909,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-14T11:32:44.552449+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Apply a 20-degree phase step with $d$ set to several times $k$ and compare the measured frequency estimate to the first-order prediction $\\Delta\\hat{\\omega}/\\Delta\\omega=d/(s+d)$; overshoot or a settling time that does not scale as $1/d$ would show the small-signal derivation misses the transient.","supporting_citations":[{"cited_title":"A Study on Three -Phase FLLs,","cited_arxiv_id":null,"evidence_quote":"Motivates the dq-frame implementation by explaining why small-signal modeling in the $\\alpha\\beta$ frame is difficult for FLLs."},{"cited_title":"Multireso nant frequency -locked loop for grid synchronization of power converte rs under distorted grid con ditions,","cited_arxiv_id":null,"evidence_quote":"Baseline multiresonant SOGI-FLL whose filtering and tuning the proposed design improves upon."},{"cited_title":"Adaptive vectorial filter for grid synchronization of power converters under unbal anced and/or distorted grid conditions,","cited_arxiv_id":null,"evidence_quote":"ROGI-FLL baseline and source of the generalized-integrator prefilter structure."},{"cited_title":"Complex-coefficient complex -variable-filter for grid synchronization based on linear quadratic regulation,","cited_arxiv_id":null,"evidence_quote":"Complex-coefficient complex-variable filter, used as another generalized-integrator variant in the FLL comparisons."},{"cited_title":"Frequency adaptive discrete filter for gr id synchronization under distorted voltages,","cited_arxiv_id":null,"evidence_quote":"Provides a second-order frequency-estimation model that the paper contrasts with its proposed first-order model."},{"cited_title":"High -Order Frequency-Locked Loops: A Critical Analysis,","cited_arxiv_id":null,"evidence_quote":"Supplies the conventional FLL transfer function, the second-order model, and the optimal $d=0.5k$ design rule that the proposed SRF-FLL is compared against."}],"review_version":1}