{"id":"df51d764-a79c-4752-8ba7-967cf97e9966","arxiv_id":"2411.10396","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"A selective etching process suspends Josephson junction arrays above the substrate, reducing parasitic capacitance by about 74% and increasing inductance by 87% in a fluxonium qubit, without degrading coherence.","lead":"This paper presents a fabrication method that selectively suspends the inductive coils (Josephson junction arrays) of superconducting qubits above the chip, reducing unwanted capacitance. The approach could improve the performance of next-generation qubits that require very large inductances, such as fluxonium and 0-π qubits.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The 74% C0 reduction may be an artifact of fixing CJ=20 fF for both on-substrate and etched arrays, while the paper's own barrier-thickening mechanism would change CJ.","rationale":"The paper's core quantitative claim is that selective suspension reduces C0 by roughly 74%; Table S2 is the primary evidence. The extraction relies on several fixed model inputs, and the SI explicitly concedes a single-mode fit. My review identifies a specific, testable inconsistency not fully spelled out by the reader: the same XeF2 mechanism invoked to explain the 87% inductance increase (barrier thickening and AlFx formation) would change the junction capacitance CJ that the C0 fit holds fixed at 20 fF. This is a real correctness risk, not a disagreement with consensus. The fabrication and device operation results are valuable, and the qualitative direction (suspension lowers stray capacitance) is physically plausible, so the finding should not be rejected; it should remain conditional on a more constrained extraction. The concrete test, allowing CJ to vary or measuring it before and after etching, would settle the matter. I therefore keep the reader's CONDITIONAL verdict unchanged.","tokens_in":16347,"tokens_out":12002,"duration_ms":127422,"concrete_test":"Refit the suspended-array spectra with the QPM treating both C0 and CJ (or the ratio C0/CJ) as free parameters, using any measurable higher array modes to constrain the fit; independently estimate CJ before and after XeF2 exposure on companion samples (e.g., via TEM barrier thickness or a single-junction plasma frequency). If the mean relative reduction in C0 remains approximately 74% when CJ is allowed to vary consistently between etched and on-substrate samples, the claim stands; if the reduction shrinks or reverses, the headline number is an artifact of the fixed-CJ assumption.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The reported 74% C0 reduction (Table S2) is extracted from the Quantum Phase Model by fitting only the fundamental frequency with C0 as the only free parameter, while fixing the junction capacitance CJ=20 fF identically for on-substrate and etched arrays (Table S1). This is internally inconsistent with the paper's own explanation for the inductance increase: the authors attribute the etched-device inductance change to XeF2 'effectively thickening the tunnel barrier' and forming AlFx (Suspended Fluxoniums section), which would also change CJ. Equation (2) depends only on the ratio C0/(2CJ), so if the etched junctions have a smaller CJ, the C0 values in Table S2 are not on the same footing, and the claimed 74% reduction can be substantially overestimated. The SI explicitly acknowledges that the fit uses only one measured frequency, so C0 cannot be separated from the simulated and reference capacitances. Because the central claim is quantitative and the same physical mechanism invoked for the L increase would alter C_J, the headline C0 reduction is not yet robust.","agreement_with_reader":"partial"},"referee_report":{"model":"deepseek-v4-flash","summary":"This paper reports a selective XeF2 etching process that suspends Josephson-junction arrays (and potentially other superinductors) above a silicon substrate while leaving surrounding on-substrate elements, such as Nb ground planes, intact. The authors fabricate and characterize two chips of JJ-array resonators and three fluxonium devices (one fully on-substrate, one on-substrate on an etched chip, and one suspended). The central quantitative claims are a mean reduction of approximately 74% in the fitted capacitance to ground C0 of the suspended arrays (Table S2) and an 87% increase in the extracted characteristic inductance L of a suspended fluxonium relative to an on-substrate neighbor (Section 'Suspended Fluxoniums'), while maintaining coherence times comparable to state-of-the-art on-substrate devices.","tokens_in":16562,"tokens_out":8053,"duration_ms":78095,"significance":"If the quantitative claims hold, the selective-etch framework is a useful advance: it allows suspended superinductors to be integrated into wafer-scale, Nb-based superconducting circuits, potentially enabling higher-impedance qubit architectures such as blochnium or 0-π qubits. The paper is careful in several respects: it provides extensive supplementary data, room-temperature wafer statistics, explicit acknowledgments of fit limitations, and a plausible path to improved cleaning via critical-point drying. The main unresolved issue is that the headline capacitance reduction is a fitted parameter rather than an independently measured quantity, and the inductance increase rests on a single device pair.","major_comments":[{"comment":"The claimed mean 74% reduction in C0 is extracted by fitting each array's single measured fundamental frequency with C0 as the only free parameter, while fixing the junction capacitance CJ = 20 fF identically for on-substrate and etched arrays (Table S1). This is internally inconsistent with the paper's own explanation that XeF2 'effectively thickens the tunnel barrier' and may form AlFx (Section 'Suspended Fluxoniums'), since either mechanism would alter the junction capacitance CJ = εA/d entering Eq. (2). Because Eq. (2) depends on the ratio C0/(2CJ), the extracted C0 values for the two device types are not on the same footing if CJ differs between them; the 74% figure could be substantially different under a plausible change in CJ. The SI explicitly acknowledges that only the fundamental mode was fitted, so C0 cannot be separated from the many simulated and reference capacitances. I ask the authors to (i) measure or bound CJ for both device types (for example via multiple plasma modes or transmission-electron microscopy), (ii) provide a sensitivity analysis of the extracted C0 versus CJ, or (iii) reframe the result as a model-dependent estimate rather than a directly measured capacitance reduction.","section":"Supplementary: Determining Ground Capacitance; Eq. (2), Tables S1-S2"},{"comment":"The claim that the suspended fluxonium has an 87% greater characteristic inductance L is based on a single suspended device (C) and a single on-substrate neighbor (B) on the same chip, with L derived from the fitted inductive energy EL of the fluxonium Hamiltonian. With one device per condition, the result carries no statistical uncertainty, and the extracted L could be sensitive to fit degeneracies among EJ, EC, and EL. Furthermore, the room-temperature array probing in the SI (Fig. S1) shows only a 21% increase in per-junction inductance after etching (0.91 nH to 1.10 nH), which is far smaller than the 87% qubit-level increase. The paper does not reconcile these two numbers. Please provide replicate devices or a quantitative discussion of uncertainties, and explain the relationship between the room-temperature junction inductance and the qubit-level extracted L.","section":"Suspended Fluxoniums; Fig. 3"}],"minor_comments":[{"comment":"The conclusion states that the extracted self-Kerr coefficients exhibit 'excellent agreement with theory,' but the main text provides no theoretical curve or quantitative comparison, and Table I lists values without error bars. Please add a comparison to the expected scaling (e.g., from Ref. [46]) or soften the claim.","section":"Suspended Resonators / Conclusion"},{"comment":"Table S2 lists four etched C0 values but only three on-substrate values (with N=400 on-substrate marked N/A), while the text says 'of the three arrays measured on both devices.' Please clarify the exact pairing used to compute the mean 74% reduction, and report per-pair reductions.","section":"Table S2"},{"comment":"The caption of Fig. S4 contains a typo: 'Josesphson' should be 'Josephson'.","section":"Fig. S4"},{"comment":"The phrase 'excellent agreement with theory' is also used for the trend of self-Kerr coefficients with junction number, but the attenuation calibration is acknowledged to carry uncertainty; please state explicitly that the trend, not the absolute values, is the validated quantity.","section":"Suspended Resonators"},{"comment":"The notation 'ω10 mode' is used without definition; please define it as the fundamental plasma mode of the array.","section":"Main text, Eq. (1)"}],"recommendation":"major_revision","confidential_remarks":"The central quantitative claim—the 74% capacitance reduction—is a fitted parameter whose value depends on holding CJ fixed for both device types, which conflicts with the paper's own proposed mechanism for the inductance increase. This is a load-bearing issue that can be addressed with a sensitivity analysis or additional measurements. The fabrication advance itself is promising and fits the journal's scope; the authors should be asked to strengthen the parameter extraction rather than to add more devices alone."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Short version: this is a solid fabrication-methods paper, not a landmark. The genuinely new piece is the selective etch mask that suspends only the JJ array while leaving Nb ground planes and the rest of the chip untouched, plus the first suspended fluxonium characterization I know of. The process works: suspended resonators show the expected self-Kerr scaling, and the suspended fluxonium has coherence on par with its on-substrate neighbors. The room-temperature probing statistics across many chips is a nice touch and supports the claim that the process doesn't wreck the junctions.\n\nWhere I'd push back is the quantitative headline. The 74% C0 reduction comes from a one-parameter fit to a single frequency per array, with CJ and all paddle capacitances taken from simulation or reference. That is thin. The paper itself concedes the fit doesn't use multiple modes and relies on many simulated values. The 87% inductance increase is one suspended qubit against one on-substrate neighbor on the same chip. The trend is consistent with the room-temperature LJ increase, but the sample size is one.\n\nOn the stress-test note: I don't think the fixed-CJ objection lands. If XeF2 thickens the tunnel barrier, the etched junctions have smaller CJ than the 20 fF assumed. For a fixed measured frequency, a smaller CJ means the extracted C0 is an upper bound on the true value, so the true capacitance reduction would be larger, not smaller. The concern has the direction backwards. That said, it does highlight that the C0 numbers are only as good as the fixed parameters, and those aren't given uncertainties.\n\nThe resonator Qi comparison is also across different chips and confounded by the gentler cleaning; the authors acknowledge this and attribute the Qi drop to cleaning rather than etching, which is plausible but not proven.\n\nBottom line: this deserves a serious referee. The fabrication advance is real, the devices work, and the limitations are mostly stated. For publication I'd want multi-mode fits or at least a sensitivity analysis on CJ, raw data release, and an explicit statement that the C0 and L numbers are model-dependent, not direct measurements. The paper is a useful contribution to the high-impedance qubit toolbox and will be of interest to groups building fluxonium, 0-pi, and blochnium qubits.","headline":"A useful selective-etch fabrication result whose headline numbers rest on thin fits; the fixed-CJ worry in the stress test points the wrong way.","tokens_in":17115,"tokens_out":3754,"would_cite":true,"duration_ms":37110,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"A selective-etch framework suspends Josephson-junction-array superinductors above the substrate, cutting capacitance to ground by roughly 74% and raising a fluxonium's inductance by 87% while preserving coherence.","keywords":["superinductor","Josephson junction array","selective substrate etching","XeF2","fluxonium qubit","capacitance to ground","suspended superconducting circuits","Quantum Phase Model"],"falsifier":"Measure at least two plasma-mode frequencies on the same suspended and on-substrate arrays and check whether one shared value of $C_0$ reproduces the full mode spectrum; if it does not, the claimed 74% capacitance reduction is not established.","tokens_in":16168,"feed_emoji":"⚛️","tokens_out":11227,"duration_ms":95763,"temperature":0.7,"pith_summary":"This paper introduces a fabrication method that selectively suspends superinductors—Josephson-junction arrays that provide very large inductance—above the silicon substrate in planar superconducting circuits, rather than etching the whole chip. A lithographically defined etch mask opens a window over the array, XeF2 vapor removes silicon only beneath it, and the released array curls upward, cutting its capacitance to ground by a mean of about 74% according to Quantum Phase Model fits. The same process yields a suspended fluxonium whose extracted characteristic inductance is 87% larger than that of its on-substrate neighbor on the same chip, with $T_1$ and $T_{2,\\mathrm{Echo}}$ times in the tens of microseconds, comparable to leading on-substrate devices. If the claim holds, it offers a scalable route to the high-impedance circuit elements required by qubit designs such as fluxonium, blochnium, and 0-π qubits, and a way to study substrate-related loss by comparing suspended and on-substrate devices.","feed_headline":"Etching lifts superinductors off-chip, cutting stray capacitance 74%","feed_subtitle":"Selective XeF2 etch suspends junction arrays in planar qubits, boosting inductance 87% without coherence loss.","key_machinery":"The key mechanism is selective undercut etching of a strained aluminum film. A lithographically defined etch mask leaves a window over the Josephson-junction array; XeF2 vapor removes the silicon beneath it, and strain at the Al–Si interface makes the released array lift and curl away from the substrate, removing the dominant dielectric from the array's capacitive environment. The quantitative workhorse is the Quantum Phase Model (QPM), a capacitance-matrix Hamiltonian for a chain of Josephson junctions with capacitor paddles at its ends; the paper fits each array's fundamental frequency using the per-island ground capacitance $C_0$ as the only free parameter, with junction capacitance, paddle capacitances, and coupling capacitances taken from simulation or reference values. The reduction in $C_0$ between on-substrate and suspended devices is the paper's evidence that the method achieves its goal.","core_discovery":"The paper's central claim is that suspending only the inductive element—not the entire circuit—is a practical and scalable way to build higher-impedance superconducting devices. Using an etch mask and an oxygen-ashing removal step, the authors undercut selected Josephson-junction arrays with XeF2, leaving the rest of the chip pristine and protecting materials such as niobium that XeF2 would otherwise attack. Suspended resonators show internal quality factors around $3.6 \\times 10^4$ and self-Kerr coefficients that follow the expected dependence on junction number. Fitting the Quantum Phase Model to the measured fundamental frequencies, the authors report a mean reduction of about 74% in the per-island capacitance to ground $C_0$; in a fluxonium qubit with a suspended array, the extracted characteristic inductance $L$ is 87% greater than that of the on-substrate device on the same chip. The measured coherence times remain comparable to state-of-the-art on-substrate fluxonium devices, which the authors attribute to the gentler cleaning required by fragile suspended structures rather than to the suspension itself.","pith_inferences":["The paper's single-mode $C_0$ extraction could be independently checked by measuring higher array modes; this is an editorial suggestion, not something the paper reports.","If the inductance increase is caused by etchant-induced barrier thickening or fluorination, the same etch chemistry might be usable as a post-fabrication junction-tuning step, though the paper does not test that.","The method's compatibility with protected niobium suggests it could extend to XeF2-sensitive high-kinetic-inductance films such as NbN or TiN as long as they are masked, but the paper does not demonstrate that combination."],"forward_implications":["Suspended arrays can be incorporated into wafer-scale planar fabrication without exposing the whole chip to the etchant, so XeF2-sensitive metals such as niobium can remain in the ground plane and other components.","A roughly 74% reduction in $C_0$ means a target impedance can be reached with a shorter array, which lowers the frequency of parasitic modes and reduces the device footprint.","The 87% inductance increase observed in the suspended fluxonium shows that etching alone can move devices into higher-impedance operating regimes.","If the coherence gap versus fully on-substrate devices is caused by the gentler cleaning, then critical-point drying or other liquid-free cleaning could close that gap in future runs.","The suspended/on-substrate pair on the same chip provides a controlled comparison for investigating substrate-mediated loss mechanisms such as dielectric loss, quasiparticle poisoning, and $1/f$ flux noise."],"supporting_citations":[{"why":"Prior demonstration that suspending a Josephson-junction array suppresses spurious capacitance and reaches the hyperinductance regime; this paper extends that idea from whole-chip etch to selective etch.","marker":"[12]"},{"why":"Supplies the Quantum Phase Model fitting routine, used there on multiple modes, that this paper adapts to extract $C_0$ from the array fundamental frequency.","marker":"[41]"},{"why":"Establishes Josephson-junction arrays as low-loss superinductors and provides the resonator characterization baseline that the quality-factor comparison relies on.","marker":"[40]"},{"why":"The wafer-scale multi-qubit fabrication workflow that the selective-etch process is designed to integrate with.","marker":"[33]"},{"why":"Source of the in-house cleaning methods and the resonator fitting and quality-factor analysis used on these devices.","marker":"[34]"},{"why":"The Dolan double-angle evaporation technique used to fabricate the Al-AlOx-Al junctions in the arrays.","marker":"[35]"},{"why":"Earlier observation that suspending superconducting qubits increases their inductance; the paper's 87% inductance increase is consistent with and extends this result.","marker":"[42]"},{"why":"Provide the capacitance-matrix formulation of the Quantum Phase Model used to include capacitor paddles and couplings in the $C_0$ extraction.","marker":"[47, 48]"},{"why":"Establish XeF2 as the silicon etchant, the step the selective undercut process builds on.","marker":"[36–38]"}],"fun_headline_variants":["Suspended superinductors cut stray capacitance 74%, boost inductance 87%","Etch-suspended arrays cut capacitance 74%, boost inductance 87%","Scalable suspension of superinductors: 74% less capacitance, 87% more inductance","Undercut junction arrays to suspend superinductors, cutting capacitance 74%"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The load-bearing premise is that the measured ~74% reduction in capacitance to ground is genuine and not an artifact of the fitting routine: each array's single measured fundamental frequency is fitted with the ground capacitance $C_0$ as the only free parameter, while all other capacitances are taken from simulation or reference values, and any error in those values could change or erase the claimed reduction.","fun_headline_variants_meta":{"raw":{"variants":["Suspended superinductors cut stray capacitance 74%, boost inductance 87%","Etch-suspended arrays cut capacitance 74%, boost inductance 87%","Scalable suspension of superinductors: 74% less capacitance, 87% more inductance","Undercut junction arrays to suspend superinductors, cutting capacitance 74%"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.001226,"raw_usage":{"total_tokens":5017,"prompt_tokens":898,"completion_tokens":4119,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":514,"completion_tokens_details":{"reasoning_tokens":4030}},"tokens_in":514,"tokens_out":4119,"duration_ms":24118,"temperature":1.0,"reasoning_tokens":4030,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-12T19:39:44.183874+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Measure at least two plasma-mode frequencies on the same suspended and on-substrate arrays and check whether one shared value of $C_0$ reproduces the full mode spectrum; if it does not, the claimed 74% capacitance reduction is not established.","supporting_citations":[{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Prior demonstration that suspending a Josephson-junction array suppresses spurious capacitance and reaches the hyperinductance regime; this paper extends that idea from whole-chip etch to selective etch."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Establishes Josephson-junction arrays as low-loss superinductors and provides the resonator characterization baseline that the quality-factor comparison relies on."},{"cited_title":"Hashim, M","cited_arxiv_id":null,"evidence_quote":"The wafer-scale multi-qubit fabrication workflow that the selective-etch process is designed to integrate with."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"The Dolan double-angle evaporation technique used to fabricate the Al-AlOx-Al junctions in the arrays."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Earlier observation that suspending superconducting qubits increases their inductance; the paper's 87% inductance increase is consistent with and extends this result."}],"review_version":1}