{"id":"4153a130-00c7-4a86-b4f2-6be8f337bb77","arxiv_id":"2411.14707","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"A hybrid feedback-plus-feedforward estimator enables flying capacitor voltage balancing in 6-level converters using only pole voltage, inductor current, and duty cycle, at low sampling rates.","lead":"The paper proposes a software-based estimator that tracks the internal capacitor voltages of a multilevel power converter from a single cheap voltage measurement, eliminating the need for isolated sensors. It combines a feedback correction loop with a model-based feedforward path to keep bandwidth high even when the controller runs at a low sampling rate.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Feedforward exactness claim (Eq. 58) depends on Eq. 16 being exact over each sampling period; using instantaneous sampled current and previous duty reference with unmodeled deadtime leaves the high-bandwidth no-sensor claim unsupported.","rationale":"The reader identified the exactness of Eq. (16) as the weakest assumption, and my stress-test agrees: the feedforward path—the component that provides the claimed high-bandwidth, low-latency estimation—relies on that averaged model being exact over each sampling period. The paper's own text acknowledges real-world errors only qualitatively ('parameter/sampling error can occur') and does not quantify the dominant sources that a hardware implementation would face: deadtime, gate delay, and sampling at instants where the instantaneous inductor current is not the period average. These are not minor implementation details; they directly affect the feedforward term that is responsible for the high-frequency tracking capability. If the feedforward is wrong by even a few percent of the capacitor-voltage derivative integrated over a 39 µs sampling period, the resulting error can produce switch overstress, which is exactly what the method claims to prevent. The simulation in Section IV is not described in sufficient detail to establish whether deadtime and sampling mismatch were included; the paper says only that simulation results validate the approach. Therefore, the central claim should remain conditional on a switched-model or hardware validation that includes these effects. I do not recommend rejection because the feedback-stability analysis and the rank-deficiency analysis are internally plausible, and the N=6 case is constrained to a specific full-rank region; the paper is a credible contribution if the feedforward error is shown to be benign under realistic conditions. The reader's conditional verdict already captures this, so no change to the verdict is needed.","tokens_in":18887,"tokens_out":7767,"duration_ms":130763,"concrete_test":"Re-run the Figure 18 simulation in a detailed switched-model environment (e.g., PLECS or Simulink with real PWM and deadtime) using the paper's parameters: N=6, fs=25.53 kHz, fsw=120 kHz, L=100 µH, Cf=2.2 µF, α=0.047. Include a 100-200 ns deadtime in every switch pair and sample iL and vsw at the disjoint sampling instants exactly as described in Section III-B. Compare three configurations: (a) ideal switches without deadtime, (b) deadtime with the feedforward using the actual applied duty after deadtime, and (c) deadtime with the feedforward using Δd*[n-1] uncompensated, as in Eq. (43). If configuration (c) keeps all switch stresses below 100 V and the maximum |v_c - v_hat_c| remains within the value required for active balancing, the concern is resolved; if stress exceeds 100 V or estimation error degrades significantly, Eq.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central performance claim is that the state-feedforward path makes the estimated flying-capacitor voltage exactly equal to the actual value with no estimation delay (Eqs. 57-58). This rests on the averaged plant model (Eq. 16), Cf d<vc>/dt = <iL> Δd, being exact over the sampling period. But the implemented update in Eqs. (40) and (43) uses the single instantaneous current sample iL[n] and the previous duty reference Δd*[n-1], not the period-averaged <iL>, and not the actual applied duty including deadtime. Under the paper's own simulation conditions—fs = 25.53 kHz, fsw,eff = 600 kHz, L = 100 µH, Cf = 2.2 µF—the sampled current can differ from the period average by a fraction of the switching ripple, and deadtime creates a duty-cycle error that depends on current polarity and is not modeled or compensated anywhere in the feedforward update. The paper mentions 'deadtime' only in passing near Eq. (40) and does not bound its effect on the feedforward term. Because the feedback loop at 25 kHz has low bandwidth (Fig. 12), any feedforward error directly propagates into capacitor-voltage estimation error and switch overstress, which is the main failure mode the paper uses to motivate the feedforward path. Without hardware or a detailed switched-model validation that includes deadtime, sampling mismatch, and gate delays, the ideal-case equality in Eq. (58) is an unverified idealization rather than a demonstrated property of the proposed estimator.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes a hybrid estimator for flying-capacitor voltages in an N-level FCML converter, combining a closed-loop gradient-descent update based on pole-voltage samples with an open-loop feedforward term based on the sampled inductor current and the previous duty-difference reference. The authors provide a discrete-time eigenvalue stability analysis, a gain-setting procedure with upper and lower bounds, a numerical feasibility study of full-rank disjoint sampling, and a simulation of a 6-level AC-DC buck converter in which the estimator keeps switch stress below 100 V until the feedforward is disabled. The central claim is that the feedforward path makes the estimated capacitor voltages track the actual values with no estimation delay, enabling high-bandwidth active voltage balancing and current control without isolated voltage sensors.","tokens_in":19218,"tokens_out":6450,"duration_ms":67142,"significance":"If the claims are substantiated, the paper would offer a useful practical contribution: a capacitor-voltage estimation scheme for FCML converters that avoids isolated sensors and reduces sampling/control frequency, with explicit stability and gain-guidance. The strengths are the eigenvalue-based stability condition (Eqs. 44-48), the identification of the rank-deficiency limitation across FCML levels and duty-ratio constraints (Section III-H, Table II), and the simulation comparison with and without feedforward (Fig. 18). However, the central performance claim rests on the feedforward path being an exact model of the plant, and the frequency-response analysis is not rigorous for a time-varying estimator. The lack of experimental or switched-model validation under non-ideal effects (deadtime, sampling mismatch, parasitics) leaves the high-bandwidth, no-sensor claim partially unsupported. The analysis is a reasonable starting point for a journal version but needs substantial strengthening.","major_comments":[{"comment":"The claim that the hybrid estimator tracks the actual capacitor voltage exactly, with no delay (Eqs. 57-58), is an idealization that is not demonstrated under the paper's own implementation assumptions. The feedforward update (40) uses the instantaneous sampled current iL[n] and the previous duty reference Δd*[n-1], while the equality (57) requires the period-averaged current and the actual applied duty. The paper mentions deadtime only in passing near Eq. (40) and provides no deadtime model or compensation. Because the feedback loop at fs=25.53 kHz has low bandwidth (Fig. 12), any feedforward error propagates directly into the capacitor-voltage estimate and hence into switch stress, which is the failure mode the paper uses to motivate the feedforward. The simulation does not report deadtime, sampling-delay, or parasitic effects, so the ideal-case equality is an unverified assumption rather than a demonstrated property. Please add a deadtime/sampling-error sensitivity analysis and a switched-model validation with deadtime and gate delays, or clearly bound the feedforward error and its effect on the tracking guarantee.","section":"III-F, Eqs. (49)-(56), Figs. 12-13"},{"comment":"The frequency-response analysis treats a time-varying estimator as an LTI system. The feedback gain Kest[n] in Eq. (50) varies at every sampling instant, and Eq. (51) is an approximation that is only valid if the sampling frequency is far above the estimator bandwidth—which is exactly the regime the paper wants to avoid (fs=25 kHz). The quantity Kest,eff(s) in Eq. (53) is defined as a quotient of convolutions that is not a transfer function (and is indeterminate when the error is zero). Consequently, the Bode plots in Figs. 11-13 do not constitute a rigorous demonstration of bandwidth or phase margin. I recommend replacing the LTI Bode analysis with a linear periodically time-varying (LPTV) analysis or explicitly labeling the Bode plots as an approximate design aid and stating the conditions under which the approximation is valid.","section":"§III-G3, Eq. (73)"},{"comment":"The lower bound on α in Eq. (73) is not an explicit bound: βmax is itself a function of α (Fig. 14), and the expression α ≥ β^{-1}_max(...) is an implicit condition, not a closed-form gain-setting rule. The paper does not provide an algorithm or a formula to evaluate this bound for a given operating point; Fig. 14 is given for a single duty set and N=6. Furthermore, the bound depends on the unknown feedforward error ∥Δṽff∥∞, so the practical guidance is incomplete. Please provide a concrete procedure to compute α from the system parameters and allowable errors, or state explicitly that the bound requires an a priori estimate of the feedforward error and describe how to obtain it.","section":"§III-H, Table II"},{"comment":"The full-rank feasibility results in Table II are presented as definitive, but they are based on a MATLAB search ('iteratively verified') rather than a mathematical proof. The paper does not specify the resolution of the duty-cycle grid, whether the search covers continuous duty values, or how the result for N=6 with |Δd|≤0.2 is affected by the exact bound. Given that the entire applicability claim of the method to N=6 (and the resulting data-center conclusion) depends on this table, the numerical search needs a precise statement of its grid and, ideally, an analytic proof or counterexample. Also, the text in Section III-H2 says |Δd| is typically limited to 0.05, but Table II and the simulation use Δdmax=0.2; this discrepancy should be resolved.","section":"IV, Fig. 18"},{"comment":"The simulation results are the only validation of the method, and the manuscript does not state whether the simulation is a switched-model with parasitic elements, deadtime, and sampling quantization, or an averaged model. The voltage-stress waveform in Fig. 18 suggests a switched model, but no deadtime or non-ideal sampling is reported. Since the central claim is about practical low-cost MCU implementation, a detailed description of the simulation setup (including the converter model, sampling instant alignment, PWM deadtime, and gate delays) is necessary to support the conclusions.","section":"V, Conclusion"}],"minor_comments":[{"comment":"There are many typographical errors and inconsistent notations, e.g., 'estimatior' in the Index Terms, 'disjoing' in Fig. 6, 'multi-inpue multi-output' in Section II, 'simpicity' in Section III-G3, and Table III uses both Cd and Cf for the flying capacitor. A careful proofreading pass would improve readability.","section":"Throughout"},{"comment":"The notation β^{-1}_max is ambiguous: it could mean the reciprocal or the inverse function. The text says 'decreasing function as shown in Fig. 14,' which suggests the inverse function, but the equation could be misread as a reciprocal. Please clarify.","section":"Eq. (73) and surrounding text"},{"comment":"The symbol ms is used for the sampling divider, but the condition (30) introduces Ns. The mapping between ms and Ns in (31) should be stated more clearly, especially for even vs. odd N, to avoid confusion with the number of sampling instants Ndis.","section":"Section II-B, Eq. (5)"},{"comment":"The upper bound in (62) depends on max(dvin/dt), which is not a design parameter and may be difficult to estimate in practice. Please discuss how this quantity is determined from the application (e.g., grid frequency and voltage magnitude).","section":"Section III-G1, Eq. (62)"},{"comment":"Reference [20] lists page numbers '4291-4411' for a 2020 Transactions paper, which appear implausibly long; please verify the page range. Also, reference [27] is duplicative of [15] (same authors and title) and should be consolidated.","section":"References"}],"recommendation":"major_revision","confidential_remarks":"The manuscript shows technical promise in its stability analysis and in honestly identifying the rank-deficiency limits of the disjoint-sampling approach. However, the key performance claim of exact feedforward tracking is currently an ideal-model identity, and the frequency-response argument is not rigorous. The absence of experimental validation would be acceptable in a theoretical paper if the non-ideal effects were bounded, but they are not. I would advise the editor that the paper is not ready for acceptance in its present form, but the issues are addressable with additional analysis, a switched-model validation with deadtime, and a clearer gain-setting procedure. The paper's novelty relative to [21] (sensor-based high-bandwidth balancing) and [24] (real-time estimation) is moderate: the hybrid feedforward/feedback structure and the rank-deficiency feasibility study are the main additions, and these should be emphasized more."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Main contribution is a hybrid estimator for FCML capacitor voltages: a rank-one gradient-descent feedback updated from pole-voltage samples, plus a feedforward term that integrates the sampled inductor current and previous duty reference through the capacitor dynamics. The disjoint sampling scheme that cycles through PSPWM peaks and valleys is a genuine new twist, and the full-rank feasibility check in Table II is more honest than most papers—it explicitly says N=5 fails and N=6 only works with |Δd| ≤ 0.2. The stability analysis of the time-varying feedback matrix (eigenvalues of I − αΔSΔS^T) is correct, and the simulation makes a clean case that at 25 kHz the feedback alone is too sluggish while adding feedforward restores tracking. That is real evidence.\n\nThe soft spots are mostly around what the paper claims versus what it demonstrates. There is no hardware and no switched-model simulation that includes deadtime, gate delay, or sampling ripple. Eq. (58)'s ideal-case exactness is by construction from the averaged plant model; the paper acknowledges errors in feedforward but never bounds them, and its own analysis (Eq. 72) shows the DC error grows with feedforward error and Ndis. The frequency-response section treats a time-varying estimator as an LTI system; the resulting Bode plots are descriptive at best. Also, the abstract says 'robust operation across diverse converter levels,' but Table II shows the method is universal only for N=3,4 and conditional for N=6. That overstatement should be fixed.\n\nNone of these are load-bearing flaws in the estimator concept; they are gaps between the simulation idealization and the claim that this enables high-bandwidth estimator-based control on low-cost MCUs without isolated sensors. The paper deserves a serious referee. A good reviewer should ask for either experimental validation or a detailed switched-model study with deadtime, sampling mismatch, and parasitic effects, and for a statement of the feedforward error assumptions underlying the gain bounds.\n\nI'd accept it for review but expect major revision. It is a useful contribution for the FCML community, not a paradigm shift.","headline":"A solid hybrid estimator for FCML with honest feasibility analysis; the no-sensor high-bandwidth claim awaits hardware or switched-model validation.","tokens_in":19736,"tokens_out":2226,"would_cite":true,"duration_ms":24616,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"This paper tries to establish that a hybrid estimator—closed-loop gradient descent plus open-loop state feedforward—can replace isolated flying-capacitor voltage sensors in hybrid FCML converters, achieving high-bandwidth active voltage…","keywords":["flying capacitor multilevel converter","estimator-based control","active voltage balancing","state feedforward","multi-cost gradient descent","disjoint sampling","AC-DC buck converter","sensorless control"],"falsifier":"Run a 6-level AC-DC buck hardware prototype at about 25 kHz sampling with the proposed estimator, deliberately detune $C_f$ by $\\pm20\\%$, and compare the estimated capacitor voltages against an isolated reference sensor; the claim fails if the 120 Hz estimation error exceeds the bound predicted by equation (72) or if switch stress reaches 100 V with feedforward enabled. A second test is a frequency-response measurement from $v_c$ to $\\hat{v}_c$, checking whether the feedforward path actually removes the estimation delay shown in the Bode plots of Fig. 13.","tokens_in":18673,"feed_emoji":"⚡","tokens_out":5238,"duration_ms":51541,"temperature":0.7,"pith_summary":"The paper claims that flying-capacitor voltages in hybrid multilevel converters can be estimated accurately without isolated voltage sensors by combining two updates each sampling period: a closed-loop gradient-descent correction based on pole-voltage samples, and an open-loop feedforward term that integrates the averaged capacitor dynamics using measured inductor current and the previous duty-difference reference. The result would matter because it removes the cost and complexity of isolated sensors and high-frequency sampling, opening FCML converters to low-cost digital controllers in data-center and electric-aircraft power delivery. The authors prove stability and gain bounds, characterize when full-rank observability is achievable, and support the claim with a 6-level AC-DC buck simulation where switch stress stays below 100 V. The strongest ideal-case statement is that with an exact model, the feedforward path makes the estimated voltage equal the actual voltage with no estimation delay.","feed_headline":"Hybrid estimator cuts isolated sensors in flying-capacitor converters","feed_subtitle":"Gradient-descent feedback plus state feedforward keeps voltage balance at 25 kHz sampling, low-cost MCU.","key_machinery":"The load-bearing object is the hybrid estimator update law of equations (41)–(43): $\\hat{v}_c[n] = (I-\\alpha\\Delta S[n]\\Delta S[n]^T)\\hat{v}_c[n-1] + \\alpha(S_{N-1}v_{in}-v_{sw}[n])\\Delta S[n] + \\tau_s i_L[n]\\Delta d^*[n-1]/C_f$. The first two terms are a gradient-descent projection of the estimation error onto the switching-state vector $\\Delta S$, a rank-one update at each instant; the last term is an open-loop prediction built from the averaged plant dynamics $C_f\\,d\\langle v_c\\rangle/dt = \\langle i_L\\rangle\\Delta d$. The argument reduces to linear algebra about the rank-one matrix $\\Delta S\\Delta S^T$: its eigenvalues are $0$ and $\\Delta S^T\\Delta S$, so the feedback loop is stable when $0<\\alpha\\Delta S^T\\Delta S<2$, and full observability over a sampling cycle requires the union of sampled $\\Delta S$ vectors to span $\\mathbb{R}^{N-2}$. Disjoint sampling at the peaks and valleys of the phase-shifted PWM carriers supplies those vectors.","core_discovery":"The paper's central claim is that the flying-capacitor voltage vector $v_c$ can be reconstructed from pole-voltage samples and measured inductor current by combining two updates each sampling period: a feedback term that runs a multi-cost gradient descent with update matrix $I-\\alpha\\Delta S[n]\\Delta S[n]^T$, and a feedforward term $\\tau_s i_L[n]\\Delta d^*[n-1]/C_f$ that integrates the averaged plant model. The authors prove that the feedback system matrix has eigenvalues $\\{1,\\;1-\\alpha\\Delta S^T\\Delta S\\}$, giving a stability interval $0<\\alpha<2/(N-2)$, and they bound the high-frequency and DC estimation errors that arise from the rank-one nature of each instantaneous update. They argue that in the ideal case the feedforward path makes $\\hat{v}_c/v_c\\approx 1$ with zero estimation delay, and they identify the operating conditions—$N=3$, $N=4$, and $N=6$ with $|\\Delta d|\\le 0.2$—under which disjoint PWM-carrier sampling yields full-rank observability.","pith_inferences":["If verified on hardware, the same estimator structure likely extends to other multilevel topologies whose averaged capacitor dynamics factor as current times a duty-difference vector, since the stability proof uses only the rank-one update structure.","The paper's gain bounds suggest an adaptive choice of $\\alpha$ could trade high-frequency sampling noise against DC offset error online; the necessary formulas are given, but adaptation is not explored.","The $N=5$ full-rank failure, caused by peak-valley overlap of the PSPWM carriers, could potentially be cured by alternative sampling patterns or carrier phase shifts, a testable modification of the algorithm in Fig. 16.","The ideal-case exactness of the feedforward term points directly to model-error sensitivity, so a natural next experiment is to deliberately detune $C_f$ and deadtime compensation and measure how quickly estimation error approaches the bound in equation (72)."],"forward_implications":["A single MCU CPU sampling at about 25 kHz can run estimator-based current control and active balancing for a 6-level FCML converter, eliminating isolated voltage sensors and their hardware cost.","The eigenvalue bound $\\alpha<2/(N-2)$ combined with the upper and lower gain formulas (62) and (73) gives an implementable tuning procedure for the estimator.","Full-rank operation is guaranteed for $N=3$ and $N=4$, and for $N=6$ when active-balancing duty differences are constrained by $|\\Delta d|\\le 0.2$; $N=5$ and $N\\ge7$ require additional sensors to relax the observability condition.","Because the feedback path acts as a low-pass filter and the feedforward path as a high-pass filter, the hybrid estimator keeps bandwidth high without requiring the sampling rate of a feedback-only approach.","In the 6-level AC-DC buck simulation, the hybrid estimator keeps switch stress below 100 V, while disabling feedforward raises stress to nearly 200 V, showing the feedforward term is load-bearing for the claimed performance."],"supporting_citations":[{"why":"Provides the prior real-time capacitor-voltage estimator that requires dual CPU operation and high sampling rates; the proposed method is positioned as a lower-complexity alternative.","marker":"[24]"},{"why":"Presents the high-bandwidth parallel active balancing controller using differential-mode voltage feedforward that needs isolated voltage sensors; this paper seeks an estimator-based replacement.","marker":"[21]"},{"why":"Shows that passive balancing alone cannot maintain capacitor voltage ratios in grid-tied operation, motivating the need for high-bandwidth active balancing.","marker":"[17]"},{"why":"Describes the six-level flying capacitor multilevel converter for single-phase buck-type power factor correction, the application and plant used in the simulation.","marker":"[14]"},{"why":"Provides an active voltage balancing method with valley current detection and constant effective duty control, serving as a sensor-based baseline for balancing performance.","marker":"[20]"},{"why":"Shows measurement and balancing of capacitor voltages using a single voltage sensor, representing the hardware-complexity trade-off the proposed estimator avoids.","marker":"[19]"},{"why":"Gives the state-space analysis of capacitor voltage estimation that underlies the observability and full-rank discussion.","marker":"[25]"},{"why":"Supplies the skipped adjacency PWM method discussed as a remedy for switching noise at sampling instants when full-rank operation is degraded.","marker":"[31]"}],"fun_headline_variants":["Estimator removes isolated sensors in flying-capacitor converters","Gradient-descent estimator cuts sensing cost in FCML converters","Low-cost control: estimator replaces isolated voltage sensors","High-bandwidth FCML control via sensor-free estimation","Flying-capacitor voltage estimated without isolated sensors"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The feedforward predictor assumes the averaged model $C_f\\,d\\langle v_c\\rangle/dt = \\langle i_L\\rangle\\Delta d$ is exact over each sampling interval, so the sampled inductor current and the previous duty-difference reference fully determine the capacitor-voltage change, with no unmodeled deadtime, measurement delay, or parasitic effects, and with duty differences inside the full-rank region.","fun_headline_variants_meta":{"raw":{"variants":["Estimator removes isolated sensors in flying-capacitor converters","Gradient-descent estimator cuts sensing cost in FCML converters","Low-cost control: estimator replaces isolated voltage sensors","High-bandwidth FCML control via sensor-free estimation","Flying-capacitor voltage estimated without isolated sensors"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000801,"raw_usage":{"total_tokens":3517,"prompt_tokens":934,"completion_tokens":2583,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":550,"completion_tokens_details":{"reasoning_tokens":2505}},"tokens_in":550,"tokens_out":2583,"duration_ms":19214,"temperature":1.0,"reasoning_tokens":2505,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-12T15:00:16.420273+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Run a 6-level AC-DC buck hardware prototype at about 25 kHz sampling with the proposed estimator, deliberately detune $C_f$ by $\\pm20\\%$, and compare the estimated capacitor voltages against an isolated reference sensor; the claim fails if the 120 Hz estimation error exceeds the bound predicted by equation (72) or if switch stress reaches 100 V with feedforward enabled. A second test is a frequency-response measurement from $v_c$ to $\\hat{v}_c$, checking whether the feedforward path actually removes the estimation delay shown in the Bode plots of Fig. 13.","supporting_citations":[{"cited_title":"A real-time estimator for capacitor voltages in the flying capacitor multilevel converter,","cited_arxiv_id":null,"evidence_quote":"Provides the prior real-time capacitor-voltage estimator that requires dual CPU operation and high sampling rates; the proposed method is positioned as a lower-complexity alternative."},{"cited_title":"A high-bandwidth parallel active balancing controller for current-controlled flying capacitor multilevel converters,","cited_arxiv_id":null,"evidence_quote":"Presents the high-bandwidth parallel active balancing controller using differential-mode voltage feedforward that needs isolated voltage sensors; this paper seeks an estimator-based replacement."},{"cited_title":"State space analysis of flying capacitor multilevel dc-dc converters for capacitor voltage estimation,","cited_arxiv_id":null,"evidence_quote":"Shows that passive balancing alone cannot maintain capacitor voltage ratios in grid-tied operation, motivating the need for high-bandwidth active balancing."},{"cited_title":"A six-level flying capacitor multilevel converter for single-phase buck-type power factor correction,","cited_arxiv_id":null,"evidence_quote":"Describes the six-level flying capacitor multilevel converter for single-phase buck-type power factor correction, the application and plant used in the simulation."},{"cited_title":"Active voltage balancing in flying capacitor multilevel converters with valley current detection and constant effective duty cycle control,","cited_arxiv_id":null,"evidence_quote":"Provides an active voltage balancing method with valley current detection and constant effective duty control, serving as a sensor-based baseline for balancing performance."},{"cited_title":"Capacitor voltages measurement and balancing in flying capacitor mul- tilevel converters utilizing a single voltage sensor,","cited_arxiv_id":null,"evidence_quote":"Shows measurement and balancing of capacitor voltages using a single voltage sensor, representing the hardware-complexity trade-off the proposed estimator avoids."},{"cited_title":"State space analysis of flying capacitor multilevel dc-dc converters for capacitor volt- age estimation,","cited_arxiv_id":null,"evidence_quote":"Gives the state-space analysis of capacitor voltage estimation that underlies the observability and full-rank discussion."},{"cited_title":"Skipped Adjacency Pulse Width Modulation: Zero Voltage Switching over Full Duty Cycle Range for Hybrid Flying Capacitor Multi-Level Converters without Dynamic Level Changing","cited_arxiv_id":"2411.06589","evidence_quote":"Supplies the skipped adjacency PWM method discussed as a remedy for switching noise at sampling instants when full-rank operation is degraded."}],"review_version":1}