{"id":"8d7acd89-5eb3-44e7-ae82-5f10b3dd20e7","arxiv_id":"2411.15332","paper_version":1,"verdict":"REJECT","confidence":"MODERATE","novelty_score":3.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":0,"one_line_summary":"Mera stores only non-zero gate-matrix entries (DAX/DAS) and a one-number Hadamard structure (RH), reporting 17 to 34 qubits of memory fit on a 0.7 TB workstation and up to 6.9x QNN speedup.","lead":"This paper proposes compressed data structures for sparse quantum gates and a specialized representation for Hadamard gates to reduce memory and speed up quantum circuit simulation. A specialist reader would want to know whether these formats outperform standard simulators, but the reported gains are measured against a baseline that builds the full operation matrix, which most simulators avoid.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The headline comparisons use a strawman baseline that materializes the full 2^n×2^n operation matrix; standard state-vector simulators apply gates directly and reach the same qubit counts without this memory, so the practical claims are unsupported.","rationale":"The reader's weakest_assumption is exactly the load-bearing issue: the cost model is materializing the global operation-matrix. I agree. I considered whether there is an internal flaw in the compressed constructions; the MTP index concatenation and DAS distance recurrence are plausible, and the sign recursion in Algorithm 1 correctly computes the Walsh-Hadamard signs. The issue is external validity. The experiments compare against a baseline that no standard full-state simulator uses. For example, Qiskit Aer, qsim, and QX apply gates to state-vectors directly; their memory is dominated by the state-vector, not by a 2^n×2^n matrix. Thus the 17-qubit limit for 'Matrix' and the improvement to 34/35 qubits reflect only the removal of a self-imposed matrix materialization. The QNN admission that dense RY gates cap qubits at 12 further undermines the abstract's 35-qubit implication. I recommend keeping REJECT: the constructive content may be reusable but the paper's central practical claim is not supported by the given comparisons.","tokens_in":14171,"tokens_out":4498,"duration_ms":42579,"concrete_test":"On the same 0.7 TB workstation, implement or invoke a standard gate-by-gate full-state simulator (e.g., Qiskit Aer statevector or a simple loop that, for each gate, updates amplitude pairs in place) and run the QNN neuron and Grover circuits from Section IV-D. Record the maximum qubits and wall-clock times. If the standard simulator also reaches 34–35 qubits and is within a small constant of the reported 6.9x/4.6x speedups, the claimed advantage over practical simulation is not established.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim—'compressed structures increase the number of qubits from 17 to 35, and achieve up to 6.9x acceleration'—is benchmarked only against a 'Matrix' method that materializes the full 2^n×2^n operation-matrix at every time step (Section I, Section IV-B). Standard full-state simulators never form the global matrix; they apply each gate directly to the 2^n-element state-vector with in-place amplitude-pair updates, using O(2^n) memory and O(2^n) time per single-qubit gate. With 0.7 TB, such a simulator already holds a 35-qubit state-vector (2^35×16 bytes ≈ 549 GB) without any compression, so the 17→35 qubit increase is an artifact of the strawman baseline, not a memory advance. The speedups are against the same strawman: DAX/DAS MVM over a sparse global matrix is O(nonzeros) = O(2^n) for a tensor product of n Pauli gates, which matches standard gate application, not a 141x improvement. The RH-MVM (Property 2) is O(n·2^{2n-2}), while the standard fast Walsh-Hadamard transform applies H⊗n in O(n·2^n); the paper never cites or benchmarks FWT. Theorems 1–3 and Algorithm 1 appear internally consistent, but the empirical evidence does not support the practical-simulation claim.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes two compressed data structures, DAX and DAS, for sparse quantum gate matrices, and a regularity-based structure, RH, for dense Hadamard gates, together with corresponding tensor-product (MTP) and matrix-vector multiplication (MVM) routines. The authors report that the compressed structures raise the maximum simulable qubit count from 17 to 34 or 35 on a 0.7 TB workstation and achieve up to 6.9× speedup on a QNN case study and 4.6× on Grover's algorithm. The mathematical derivations (Theorems 1-3, Algorithm 1) are self-contained and internally consistent, but the empirical evaluation compares against a 'Matrix' baseline that materializes the full 2^n × 2^n operation matrix at each time step, which is not how standard full-state simulators operate.","tokens_in":14337,"tokens_out":6088,"duration_ms":54913,"significance":"If the empirical claims were valid, the work would provide a practical way to extend full-state quantum circuit simulation on a single workstation by exploiting gate-matrix sparsity and Hadamard regularity. The paper also contributes parameter-free compressed representations and an explicit algorithm for the Hadamard transform without referencing the standard fast Walsh-Hadamard transform. However, the significance is substantially weakened because the baseline used in all experiments is a strawman: standard full-state simulators apply gates directly to the 2^n-element state vector with O(2^n) memory and O(2^n) time per gate, so the reported 'increase from 17 to 35 qubits' and the large speedups are artifacts of materializing the global matrix rather than genuine improvements over established simulation techniques.","major_comments":[{"comment":"The central claim that the compressed structures 'increase the number of qubits from 17 to 35' is an artifact of the baseline. With 0.7 TB of memory, a standard state-vector simulator stores the 2^n amplitudes and applies each gate directly; for n = 35, the state-vector requires about 550 GB (2^35 × 16 bytes), which already fits in 0.7 TB without any compression. The 'Matrix' baseline that materializes the full 2^n × 2^n operation matrix is not representative of practical full-state simulation, so the memory improvement is not a real advance in simulable qubit count.","section":"Abstract, Section IV-B, Figure 5"},{"comment":"The 1800.3× MTP and 141.2× MVM speedups are measured against the 'Matrix' method, which constructs and multiplies the dense global matrix. In standard full-state simulation, a single-qubit gate is applied to the state-vector in O(2^n) time by updating amplitude pairs; the DAX/DAS MVM over nonzeros of the global matrix also takes O(2^n) time for a single-qubit gate, so the reported speedups reflect avoiding the strawman's huge global-matrix operations, not an asymptotic improvement over conventional simulators.","section":"Section IV-B, Figures 6 and 7"},{"comment":"The RH-MVM algorithm is stated to have complexity O(n · 2^{2n−2}), which is drastically worse than the standard fast Walsh-Hadamard transform, which applies H^⊗n to a state-vector in O(n · 2^n) time. The paper never cites or benchmarks against the fast Walsh-Hadamard transform, yet claims 'execution acceleration' for Hadamard-based circuits. This omission is load-bearing because the proposed method is asymptotically slower than a well-known classical algorithm, and the reported 2.3× speedup over 'Matrix' is again relative to the strawman baseline.","section":"Section III-B2, Property 2, Algorithm 1"},{"comment":"The maximum-qubit improvements are not demonstrated for end-to-end algorithm simulation. For the QNN neuron, the authors acknowledge that the maximum qubit remains 12 because the dense RY gates in stage 1 are the bottleneck; for Grover, the memory figures for 'RH-DAX' at 34 qubits are for the gate matrices (H^⊗n, oracle, Z0) and do not include end-to-end runtimes at those sizes. Thus the abstract's 'increase the number of qubits from 17 to 35' refers only to isolated gate blocks or matrix-storage capacity, not to the simulation of complete algorithms.","section":"Section IV-D, Table III and IV"}],"minor_comments":[{"comment":"The abstract states the qubit increase is 'from 17 to 35', while Section IV-B and the conclusion report 34 qubits for DAX/DAS and 35 qubits for RH. This inconsistency should be reconciled.","section":"Abstract and Conclusion"},{"comment":"The title reads 'Evaluation for RH structures' but the text spells the gate as 'Hardamard' in several places; the correct spelling is 'Hadamard'.","section":"Section IV-C title"},{"comment":"The text refers to 'Paul-X' in the list of implemented gates; this should be 'Pauli-X'.","section":"Section IV-B"},{"comment":"The row labeled '1.0× 1638.4× 1638.4×' under memory usage is unclear: it lists speedups under the heading 'Memory Usage' columns, which is confusing because the columns are 'stage1 stage2 stage3' and the entries are memory sizes, not speedups. Please clarify the table structure.","section":"Table III"},{"comment":"The paper should cite and compare against standard high-performance quantum circuit simulators (e.g., Qiskit, Qulacs, qHiPSTER) in the evaluation, since the proposed methods are intended for full-state simulation.","section":"Section II-B, Related Work"}],"recommendation":"reject","confidential_remarks":"The paper's core algorithms are coherent and the mathematical identities are correct, but the evaluation methodology is not appropriate for the claimed contribution. The 'Matrix' baseline is a strawman, and the central headline claims—memory-driven qubit increase and large speedups—vanish when measured against standard state-vector simulation practice. The RH-MVM algorithm is also asymptotically inferior to the well-known fast Walsh-Hadamard transform, which is not cited. These issues are load-bearing and cannot be fixed by minor edits; the paper would need to be reframed and re-evaluated against proper baselines, and the resulting claims would be far more modest."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"This paper describes compressed formats (DAX, DAS) for sparse gate matrices and a regularity-based representation (RH) for the Hadamard matrix, together with tensor-product and matrix-vector operations that work directly on the compressed forms. The math is correct: Theorem 1's sparsity product formula is right, the sign recursion for H^{⊗n} is a valid description of the Walsh-Hadamard structure, and the compressed MTP/MVM algorithms are self-contained and free of fitted parameters. The paper honestly admits the QNN bottleneck at 12 qubits due to dense RY gates.\n\nThe soft spot is not in the derivations but in the evaluation. Every comparison is against a 'Matrix' method that materializes the full 2^n × 2^n operation-matrix at each time step. That is a strawman: standard state-vector simulators apply gates directly to the 2^n-element state-vector without ever forming the global matrix. With 0.7 TB, a conventional simulator already holds a 35-qubit state-vector (2^35 × 16 bytes = 549 GB), so the paper's central memory claim (17 → 35 qubits) is an artifact of the chosen baseline, not a genuine advance. The MVM speedups over the same strawman are likewise unsurprising.\n\nThe Hadamard section has a more serious problem. The RH-MVM complexity is O(n·2^{2n−2}), which for n=17 is roughly 4.5 times 2^34 operations; the fast Walsh-Hadamard transform applies H^{⊗n} in O(n 2^n) and is the standard reference for this exact task. The paper neither cites nor benchmarks FWT. The claimed 98.7× speedup over the paper's own non-optimized method is real, but it does not translate to an advantage over a standard simulator. The abstract's '35 qubits' is a memory-fit statement for the RH structure, not an executed end-to-end simulation; the Grover timings stop at 17 qubits.\n\nWhat survives is modest: if one's cost model is explicitly about building the global operation-matrix, then DAX/DAS give a compact representation with direct tensor-product arithmetic. That is a reasonable engineering idea, and the paper is clear about its mechanics. But the title and abstract promise a practical improvement to full-state simulation on workstations, and that promise is not supported once the baseline is a standard simulator.\n\nA serious referee would immediately ask for an FWT comparison and a standard gate-application baseline. The paper is not incoherent; it is just over-sold. I'd send it to review only because a good referee can pin down the scope; but I would not cite it, and I would not build on its headline numbers.","headline":"Compressed gate-matrix formats are internally consistent, but the paper's headline claims rest on a cost model that standard simulators don't use, and the Hadamard method misses the standard fast transform.","tokens_in":14994,"tokens_out":3888,"would_cite":false,"duration_ms":31334,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"Compressed gate matrices lift quantum-circuit simulation from 17 to 34 qubits.","keywords":["quantum circuit simulation","full-state simulation","sparse gate compression","Hadamard gate","matrix tensor product","state vector","memory reduction","redundancy exploration"],"falsifier":"Compile the same QNN and Grover circuits into a conventional state-vector simulator that keeps only the 2^n amplitudes and applies gates one at a time, on the same 0.7 TB workstation; if it simulates more than 34 qubits, or if the paper's dense-matrix baseline can be replaced by this standard method at identical memory, the claimed gain is an artifact of the chosen baseline rather than a property of the compressed structures.","tokens_in":13813,"feed_emoji":"⚛️","tokens_out":8609,"duration_ms":74001,"temperature":0.7,"pith_summary":"This paper tries to establish that full-state quantum circuit simulation on a single workstation can handle far more qubits if the simulator stops storing the dense 2^n × 2^n operation matrix. For the large majority of quantum gates that are sparse, it stores only the non-zero entries in two compressed formats—DAX (value plus flat index) and DAS (value plus row-gap distances)—and defines tensor-product and matrix-vector operations directly on those formats, avoiding recompression. For the dense Hadamard gate it stores an entire $H^{{⊗n}}$ layer as a single magnitude 1/√N and computes signs on demand, which is the basis of its claim to reach 35 qubits for Hadamard-only multiplication and 34 qubits for sparse-gate circuits. The reported payoff is up to 6.9× end-to-end acceleration on a QNN neuron and 4.6× on Grover, compared with a dense-matrix implementation.","feed_headline":"Sparse gate storage lifts quantum simulation to 34 qubits","feed_subtitle":"No dense operation matrix: compressed tensor products and Hadamard signs speed QNN by 6.9x.","key_machinery":"The load-bearing objects are three representations. DAX stores each non-zero complex entry of a gate matrix together with its decimal index; DAS stores each non-zero entry with the count of zeros preceding it in its row and a row-end flag. Both carry tensor-product and matrix-vector routines directly: the result index in a tensor product is the binary concatenation of the two source indices, and gaps in DAS are combined by a three-case distance rule. The third object, RH, encodes $H^{{⊗n}}$ by the single magnitude 1/√N, with each entry's sign recovered by dividing the matrix into quarters whose lower-right block is negated, recursively, at O(n) cost per sign. What makes these structures carry the argument is Theorem 2: the zero ratio of a tensor product is never below the larger zero ratio of its factors, so a sparse circuit's operation matrix stays sparse and the structure stays compressed through a whole simulation step.","core_discovery":"On its own terms, the paper's central claim is that both sources of redundancy in the operation matrix—duplicated zeros and duplicated absolute values—can be removed from the representation without restoring them during computation. For a gate with zero ratio R, the tensor product with another matrix has zero ratio R(A⊗B)=R(A)+(1−R(A))R(B), which is at least the larger factor (Theorems 1 and 2), so a sparse circuit's operation matrix stays sparse. DAX and DAS encode exactly the non-zero entries and their positions, and the tensor-product and matrix-vector formulas use binary concatenation of indices or gap arithmetic to produce compressed results directly. For Hadamard, every entry of $H^{{⊗n}}$ has absolute value 1/√N, so the RH structure stores one number and computes signs by recursive quarter division; the logarithm-based sign routine needs O(n) sign calls per row. The experiments on a 0.7 TB workstation report that the dense-matrix baseline fits 17 qubits, DAX/DAS fit 34 qubits for sparse-gate circuits, RH fits 35 qubits for Hadamard MVM, and the hybrid RH+DAX implementation accelerates the QNN neuron up to 6.9× and Grover up to 4.6× at the qubit counts where the dense baseline still runs; the abstract's headline figure of 35 corresponds to the Hadamard-only case.","pith_inferences":["The paper's 34-qubit figure is measured against a simulator that materializes the full operation matrix, which is not the design of standard state-vector simulators; a conventional gate-by-gate simulator keeping only the 2^n-element state vector would be a different baseline, and the paper does not compare against it.","If the same zero-skipping idea were applied directly to gate-by-gate state-vector updates, the memory saving would apply to the gate matrices only, not to the state vector, so total memory would scale with 2^n plus the compressed gate size; a testable extension is to port DAX/DAS into such a simulator and measure whether a 34-qubit advantage survives.","The RH sign pattern is essentially the Walsh–Hadamard transform structure, so the quarter-based, block-based, and logarithm-based tricks might extend to any Kronecker power of a 2×2 constant-magnitude matrix, giving a family of regularity-oriented compressed simulations for transforms such as the quantum Fourier transform."],"forward_implications":["At a fixed memory of 0.7 TB, the test workstation's maximum operation-matrix size grows from 17 to 34 qubits for circuits of sparse gates, and Hadamard-only MVM runs at 35 qubits.","Because compression is structural rather than applied after the fact, the paper's reported MTP speedups (up to 1800.3×) and MVM speedups (up to 141.2×) come without a separate compression or decompression phase.","The RH representation means a layer of n Hadamard gates costs one stored value plus on-demand sign computation, so the memory cost of building superposition is no longer exponential in n.","Combining RH for Hadamard layers with DAX for sparse layers gives up to 6.9× end-to-end acceleration for the QNN neuron and up to 4.6× for Grover's algorithm against the dense-matrix implementation.","The QNN case is itself limited to 12 qubits in the paper because the dense RY gates in the encoding stage cannot be compressed by these structures."],"supporting_citations":[{"why":"Supplies the QNN neuron circuit used as the end-to-end case study for the 6.9× acceleration claim.","marker":"[4]"},{"why":"Supplies Grover's algorithm, the second end-to-end case study for the 4.6× acceleration claim.","marker":"[3]"},{"why":"Defines the full-state simulation paradigm whose operation-matrix and state-vector sizes the paper targets.","marker":"[7]"},{"why":"Provides the Fugaku 4.9 PB memory figure used to frame the qubit-memory bottleneck.","marker":"[10]"},{"why":"Baseline full-state simulation with data compression, which the paper contrasts with its no-decompression structures.","marker":"[21]"},{"why":"High-end supercomputer simulation baseline showing the memory wall the paper tries to avoid on workstations.","marker":"[8]"}],"fun_headline_variants":["Redundancy pruning lifts quantum simulation to 34 qubits","Mera compresses gates for 35-qubit Hadamard simulation","Skip zero and absolute values: simulate 34 qubits","Mera: redundancy-aware simulation hits 35 qubits","Quantum sim: skip redundant ops, 6.9x faster, 34 qubits"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"All claims rest on the premise that full-state simulation must build a 2^n × 2^n operation matrix and multiply it into the state vector; if a simulator applies each gate to the 2^n-element state vector directly, the 17-to-34 qubit comparison does not transfer because the dense-matrix baseline itself is not a fair comparator.","fun_headline_variants_meta":{"raw":{"variants":["Redundancy pruning lifts quantum simulation to 34 qubits","Mera compresses gates for 35-qubit Hadamard simulation","Skip zero and absolute values: simulate 34 qubits","Mera: redundancy-aware simulation hits 35 qubits","Quantum sim: skip redundant ops, 6.9x faster, 34 qubits"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000872,"raw_usage":{"total_tokens":3822,"prompt_tokens":1042,"completion_tokens":2780,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":658,"completion_tokens_details":{"reasoning_tokens":2688}},"tokens_in":658,"tokens_out":2780,"duration_ms":18722,"temperature":1.0,"reasoning_tokens":2688,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-12T14:25:41.360913+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Compile the same QNN and Grover circuits into a conventional state-vector simulator that keeps only the 2^n amplitudes and applies gates one at a time, on the same 0.7 TB workstation; if it simulates more than 34 qubits, or if the paper's dense-matrix baseline can be replaced by this standard method at identical memory, the claimed gain is an artifact of the chosen baseline rather than a property of the compressed structures.","supporting_citations":[{"cited_title":"A co-design framework of neural networks and quantum circuits towards quantum advantage,","cited_arxiv_id":null,"evidence_quote":"Supplies the QNN neuron circuit used as the end-to-end case study for the 6.9× acceleration claim."},{"cited_title":"A fast quantum mechanical algorithm for database search,","cited_arxiv_id":null,"evidence_quote":"Supplies Grover's algorithm, the second end-to-end case study for the 4.6× acceleration claim."},{"cited_title":"Massively paral- lel quantum computer simulator,","cited_arxiv_id":null,"evidence_quote":"Defines the full-state simulation paradigm whose operation-matrix and state-vector sizes the paper targets."},{"cited_title":"Top500 list","cited_arxiv_id":null,"evidence_quote":"Provides the Fugaku 4.9 PB memory figure used to frame the qubit-memory bottleneck."},{"cited_title":"Full-state quantum circuit simulation by using data compression,","cited_arxiv_id":null,"evidence_quote":"Baseline full-state simulation with data compression, which the paper contrasts with its no-decompression structures."},{"cited_title":"5 petabyte simulation of a 45-qubit quantum circuit,","cited_arxiv_id":null,"evidence_quote":"High-end supercomputer simulation baseline showing the memory wall the paper tries to avoid on workstations."}],"review_version":1}