{"id":"5b9fcd73-fdd4-43b0-8e06-79fb4a82e68c","arxiv_id":"2412.08422","paper_version":2,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":5.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":1,"one_line_summary":"Quantum dots formed between polysilicon gates in a commercial 22 nm FDSOI CMOS process, with bias triangle pairs and a single-electron box sensor detecting charge transitions.","lead":"Researchers operated quantum dots and a single-electron charge sensor on a chip made in GlobalFoundries' commercial 22 nm silicon-on-insulator process. The measurements show that standard chip manufacturing can host the building blocks of a scalable quantum computer.","discovery_kind":"new_application","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The central claim rests on visual dot assignment; the paper itself leaves the double-dot SEB sensing case unmodeled, so the least secure link is the quantitative reality of the claimed quantum dots.","rationale":"I read the paper in good faith: it is a short communication reporting quantum dot formation, bias triangles, and SEB charge sensing in a GlobalFoundries 22FDX process, with the central claim being the first demonstration of multiple controllable dots plus integrated SEB sensing in a commercial process. The measurements are plausible and the qualitative features shown are consistent with the standard phenomenology: square charge-stability regions for decoupled dots, separated bias-triangle pairs when the inter-dot barrier is increased, reversal of triangle orientation with VDS sign, and SEB phase/magnitude shifts at apparent charge transitions. The reader's conditional verdict is appropriately calibrated for a claim of this reach. My stress-test pass identified one load-bearing concern, which is the same one the reader highlighted: the quantum-dot interpretation is entirely qualitative. The paper contains no extracted charging energies, lever arms, or tunnel couplings, and explicitly leaves the double-dot SEB case for 'further analysis.' In an industrial FD-SOI device, disorder-induced dots and charge traps are a real alternative explanation for some stability-diagram features, so the visual assignment is not sufficient to independently support the headline claim. I do not see an internal inconsistency; the concern is about the evidence-to-conclusion gap. The concrete test I propose is a quantitative re-analysis of the existing data or a follow-up Coulomb-diamond experiment, both of which would discriminate intentional, gate-defined dots from unintentional disorder features. Because this concern is exactly the basis of the reader's CONDITIONAL verdict, my pass does not change the verdict; it reinforces the conditionality.","tokens_in":5583,"tokens_out":3566,"duration_ms":43517,"concrete_test":"Re-analyze the raw transport and reflectometry data behind Figs. 2–4 with a constant-interaction DQD/triple-dot model (e.g., refs. 20–21) to extract charging energies, lever arms, and inter-dot tunnel coupling, and check that the bias-triangle size scales with VDS = ±0.25/±0.5 mV as predicted from the extracted lever arms (eVDS/α). If the extracted parameters are consistent with the 22FDX gate geometry and the simulations in ref. 7, the dot assignment is quantitatively confirmed; if the data require extra uncontrolled charge traps or inconsistent lever arms, the central claim weakens. If raw data are not available, perform a follow-up Coulomb-diamond measurement on the same device as the decisive check.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim requires that the features in Figs. 2–4 are electrostatically defined quantum dots and that the SEB response reports their charge state. That interpretation is supported only by visual matching to textbook DQD stability diagrams and bias-triangle pairs; no charging energy, lever arm, tunnel coupling, or dot-occupation number is extracted anywhere in the paper, and no quantitative comparison to the simulation of ref. 7 is made for these data. In the double-dot SEB case (Fig. 4(c)/(f)) the authors explicitly write: 'Further analysis is needed to understand each transition in detail in this case and to fit using an appropriate theoretical framework,' so the multi-dot sensing leg of the headline claim is self-admittedly unmodeled. Because the device is fabricated in an unmodified commercial FD-SOI process, unintentional disorder-induced dots or charge traps can produce honeycomb-like patterns resembling intentional double/triple-dot stability diagrams. Without quantitative extraction of energies or couplings, the 'quantum dot array' and 'first time' conclusions are not independently secured. The 'first time' assertion also lacks a direct benchmark against ref. 4, which already demonstrated p- and n-type QD arrays in 22-nm FDSOI CMOS; this matters for novelty even if the physics is correct.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper reports electrical characterization of a five-gate quantum dot array fabricated in an unmodified GlobalFoundries 22FDX fully depleted silicon-on-insulator process. Transport measurements at 700 mK and 70 mK are used to claim formation of a double quantum dot, control of the inter-dot tunnel barrier via the central gate voltage VQT1, and observation of bias triangle pairs whose orientation and size depend on VDS. Reflectometry measurements with a single-electron box (SEB) configured at the edge of the array are used to claim charge sensing of a single quantum dot and of a double quantum dot. The central claim, stated in the abstract, is that this constitutes the first demonstration of controllable formation and coupling of multiple quantum dots together with SEB charge sensing in a commercial process.","tokens_in":5823,"tokens_out":4485,"duration_ms":50069,"significance":"If the interpretation is correct, the paper provides a useful building block for scalable spin-qubit hardware: a commercial CMOS process that can host both a quantum dot array and an integrated charge sensor, without process modifications. The measurements are real, the parameter sweep in VQT1 shows a clear qualitative trend from a double-dot to a merged single-dot response, and the qualitative features in the stability diagrams and bias triangles are consistent with standard double-quantum-dot physics. The paper also describes a concrete reflectometry setup and gives enough terminal definitions to reproduce the biasing scheme. However, the central claim rests almost entirely on visual pattern matching; no quantitative extraction of charging energies, lever arms, tunnel couplings, or dot positions is provided, and the double-dot SEB case is explicitly left unmodeled by the authors themselves.","major_comments":[{"comment":"The interpretation of the stability diagrams as double quantum dot behavior is based on visual similarity to textbook honeycomb diagrams and bias triangle pairs, but no quantitative analysis is presented anywhere in the paper. There is no extraction of charging energies, lever arms, tunnel couplings, or dot-occupation numbers, and no comparison of the data to the companion simulation in ref. 7. This matters because disorder-induced charge traps in an unmodified commercial process can produce honeycomb-like patterns that resemble intentional multi-dot stability diagrams. Since the abstract's claim of controlling the formation and coupling of quantum dots depends on the correctness of the dot assignment, the authors should provide at least one quantitative analysis of a stability diagram (e.g., a fit to a double-dot constant-interaction model or an extracted lever-arm matrix) or otherwise independently confirm the dot interpretation.","section":"Measurement Results: Quantum Dot Array, Figs. 2 and 3"},{"comment":"The manuscript states, in the paragraph describing the double-dot SEB case, that 'Further analysis is needed to understand each transition in detail in this case and to fit using an appropriate theoretical framework.' This case is one of the two sensing modes claimed in the abstract ('sensing charge transitions in a single- and double quantum dots'), so the headline claim is not quantitatively supported for the double-dot configuration. The reflectometry response is presented only as raw phase and magnitude traces, with no calibration to electron number and no sensitivity or signal-to-noise quantification. To support the claim, the authors should either provide a model fit for the double-dot SEB response or explicitly restrict the central claim to the single-dot sensing mode that is quantitatively understood.","section":"Measurement Results: Single Electron Box, Fig. 4(c)/(f)"},{"comment":"The 'for the first time' claim is not benchmarked against ref. 4, which already reports p- and n-type quantum dot arrays manufactured in 22-nm FDSOI CMOS and measured at 2–4 K and 300 K. The authors need to state explicitly what is new relative to ref. 4: for instance, whether the new element is the SEB charge sensing, the bias-triangle transport evidence, or the specific five-gate geometry. Without this comparison, the novelty assertion is not verifiable, and if ref. 4 already demonstrated QD arrays in the same process family, the claim should be revised accordingly.","section":"Abstract and Introduction"}],"minor_comments":[{"comment":"The text refers to 'Fig. 4(c) and (d)' when describing the triple/double quantum dot SEB configuration, while the Fig. 4 caption describes the double-dot sensing case as panels (c) and (f); the figure reference should be corrected for consistency.","section":"Measurement Results: Single Electron Box, paragraph after Fig. 4"},{"comment":"The phrase 'a combination of a back- and gate voltages' is ungrammatical and should read 'a combination of back-gate and gate voltages.'","section":"Abstract"},{"comment":"References 16 and 19 cite the same work (Vigneau et al., Probing quantum devices with radio-frequency reflectometry) and should be merged into a single reference.","section":"References"},{"comment":"The caption mentions 'blue circles in the side views of the device,' but the side-view insets are not clearly annotated in the figure; please add visible labels or arrows to the figure.","section":"Figure 2 caption"},{"comment":"There is a missing space in 'negativeVDS' in the Fig. 3 caption text, and the sentence 'The barrier in Fig.2(a) is such...' should read 'In Fig. 2(a), the barrier is such...'.","section":"Measurement Results: Single Electron Box, Fig. 3 caption and text"},{"comment":"The paper should state the number of measured devices and whether the data are representative or reproducible across multiple cooldowns; as written, all measurements appear to come from a single device, which limits the generality of the 'commercial process' claim.","section":"General"}],"recommendation":"major_revision","confidential_remarks":"The manuscript is a plausible experimental communication, but the central claim is broader than the evidence. The authors' own statement that the double-dot SEB case needs further analysis is particularly important, since that case is part of the headline claim. I would recommend a revision that adds quantitative analysis or carefully narrows the claims, and that explicitly differentiates the work from ref. 4. The high fraction of self-citations (refs. 5, 7, 9, 10, 11) is itself acceptable for a continuation of prior work, but the novelty assertion must be checked against ref. 4 and possibly other prior CMOS quantum-dot demonstrations."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Colleague,\n\nShort version: this is a solid engineering demonstration, not a physics breakthrough. The genuinely new thing is the combination—a double quantum dot and a single-electron box charge sensor integrated on the same device in an unmodified GlobalFoundries 22FDX process. That combination is worth reporting, and the measurements look consistent: the bias triangles in Fig. 3 flip with VDS sign and scale with its magnitude, and the barrier-voltage sweeps in Fig. 2 show a clear trend from decoupled dots to a merged single dot. The SEB sensing of single-dot transitions (Fig. 4a,b) also looks reasonable.\n\nThe soft spots are real but mostly about presentation and verification. There is no quantitative extraction anywhere: no charging energies, lever arms, tunnel couplings, or occupation numbers. The dot assignment rests on visual matching to textbook stability diagrams, and the paper's own text concedes that the double-dot SEB case (Fig. 4c/f) needs further analysis and fitting. That is a genuine gap, because the 'quantum dot array' claim in the headline includes that multi-dot sensing leg. I also agree with the reader that the 'first time' claim is not benchmarked against ref. 4, which already showed p- and n-type quantum dot arrays in 22 nm FDSOI; the authors should at least cite and discuss that work explicitly. The self-citations are to the group's own prior simulation and device papers, which is appropriate given they built on that work; I don't see a citation problem.\n\nThat said, I would not call this a load-bearing flaw. The transport data alone—bias triangle pairs with correct VDS dependence—is strong evidence for at least one double quantum dot, and the single-dot SEB data supports the sensing concept. The paper is short and does not pretend to be a full characterisation; it reads as a building-block demonstration. For that purpose, it succeeds.\n\nMy recommendation: send it to peer review. A good referee will ask for the missing quantitative analysis and a clearer novelty discussion, but the core result—an integrated QD array and SEB sensor in a commercial process—is worth publishing after revision. If the authors release raw data and extract even a charging energy or tunnel coupling, the paper becomes much stronger.\n\nI would bring this to a reading group focused on spin qubits or CMOS quantum devices. I probably would not cite it in my own work unless I specifically needed a reference for an FDSOI SEB implementation.","headline":"A plausible engineering demonstration of quantum dots plus SEB sensing in unmodified 22 nm FDSOI, but the multi-dot sensing leg is self-admittedly unmodeled and the 'first time' claim needs a benchmark.","tokens_in":6464,"tokens_out":2194,"would_cite":false,"duration_ms":21648,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":["73.63.Kv","85.35.Gv","03.67.Lx"],"model":"deepseek-v4-flash","headline":"Commercial 22 nm CMOS hosts quantum dots with an on-chip charge sensor","keywords":["quantum dots","silicon spin qubits","FDSOI CMOS","single-electron box","charge sensing","radio-frequency reflectometry","quantum dot array","cryogenic electronics"],"falsifier":"Run the same device at base temperature and extract charging energies and tunnel couplings from Coulomb diamond sizes, bias-triangle dimensions, and SEB phase shifts. If these disagree with the assigned dot geometry, or if the claimed double-dot pattern can be reproduced by a single large dot with charge traps, the central interpretation collapses; a minimal check is whether SEB response jumps land exactly on the transport-defined triple points.","tokens_in":5405,"feed_emoji":"⚛️","tokens_out":8409,"duration_ms":80195,"temperature":0.7,"pith_summary":"This paper reports that a quantum dot array can be operated inside a transistor-like structure made with an unmodified commercial 22 nm fully depleted silicon-on-insulator CMOS process. By biasing a combination of five electrostatic gates and a back gate, the authors form one or two quantum dots in the channel and control the tunnel barrier between them. They also reconfigure the same array into a single-electron box sensor at the array's edge and use it to detect charge transitions of neighboring single and double dots. If correct, this shows that the building blocks of a scalable spin-qubit processor, quantum dots plus integrated charge readout, can be produced in a standard chip foundry rather than in bespoke laboratory fabrication.","feed_headline":"Commercial 22 nm CMOS hosts quantum dots with an on-chip charge sensor","feed_subtitle":"A standard foundry process can form quantum dots with integrated charge sensing, a key step toward scalable spin-qubit chips.","key_machinery":"The working object is a five-gate quantum dot array in a 22 nm FDSOI transistor: raised source and drain, gates QA0, QT0, QT1, QT2, QA1, and a back gate beneath the buried oxide. Dots are not controlled by dedicated plunger gates; instead, the back-gate voltage and the barrier-gate voltages together define the confinement and detune the dot energy levels. The inter-dot coupling is tuned by the central barrier gate QT1. The charge sensor is a single-lead single-electron box formed at the array edge, read out by rf reflectometry through a 75.5 MHz tank circuit; its quantum capacitance response reveals the charge transitions of adjacent dots.","core_discovery":"The central claim is that a commercial 22 nm FD-SOI process can simultaneously support electrostatically defined quantum dots and integrated charge sensing. In transport mode, two dots form between the barrier gate pairs QT0/QT1 and QT1/QT2; increasing the central barrier gate voltage VQT1 first separates the bias-triangle pairs at the triple points and eventually merges the two dots into one, demonstrating inter-dot coupling control. The same device is then biased as a single-electron box (SEB) adjacent to the array, and its rf-reflectometry response shows discrete jumps and shifted charge transitions as electrons load into one or two neighboring quantum dots. The authors present this as the first demonstration in a commercial CMOS process of controlling a multi-dot array and sensing its charge state with a SEB.","pith_inferences":["A quantitative fit of charging energies and tunnel couplings from these diagrams would tell whether the array also supports more than two dots; the gate layout does not obviously limit the count.","The phase-sensitive reflectometry response to the double dot hints that quantum-capacitance readout could be used for spin-to-charge conversion, such as Pauli spin blockade, in this same process.","A natural cross-check is to compare the gate-voltage positions of SEB response jumps with the transport triple points while sweeping VQT1; a mismatch would show where the two interpretations diverge."],"forward_implications":["Quantum dot qubit hardware could be made in standard 22 nm FDSOI photolithography without changing the foundry process.","One device can be switched between transport operation, where bias triangles form, and sensing operation, where the SEB reads out the dots.","A single SEB at the array edge is sensitive enough to see charge transitions of both a single dot and a coupled double dot.","Barrier-gate and back-gate voltages together give enough control to detune dot levels and tune the inter-dot tunnel coupling, reducing the need for dedicated plunger gates."],"supporting_citations":[{"why":"Demonstrates quantum dot arrays in the same 22 nm FDSOI process, the baseline against which the integrated SEB sensing is new.","marker":"4"},{"why":"Provides the modelling and simulation that explains how the back-gate and barrier-gate voltages define the dots in this device.","marker":"7"},{"why":"Earlier single-electron device in the same 22 nm FD-SOI process that this SEB configuration builds on.","marker":"9"},{"why":"Modeling and characterization of a nanoscale single-electron box with a floating lead, the sensing concept used here.","marker":"10"},{"why":"Introduces the single-lead quantum dot as a scalable charge sensor, the basis of the SEB readout.","marker":"11"},{"why":"Supplies the rf-reflectometry technique used to read out the sensor at 75.5 MHz.","marker":"16"},{"why":"Provides the standard double-quantum-dot stability diagram and bias-triangle framework used to interpret the transport data.","marker":"17"},{"why":"Demonstrates single-shot readout with a single-electron box, the functionality toward which this SEB measurement points.","marker":"18"}],"fun_headline_variants":["Commercial 22nm CMOS integrates quantum dots and charge sensor","First quantum dots with sensing in commercial CMOS","22nm FD-SOI chip hosts tunable quantum dot arrays","Standard foundry process enables qubit dot control and sensing","Commercial CMOS proves quantum dots with integrated sensing"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The load-bearing premise is that the observed stability patterns and reflectometry responses are correctly read as electrostatically defined quantum dots and single-electron transitions; the identification rests on visual matching to standard diagrams, and for the SEB double-dot case the authors state that 'further analysis is needed to understand each transition in detail.'","fun_headline_variants_meta":{"raw":{"variants":["Commercial 22nm CMOS integrates quantum dots and charge sensor","First quantum dots with sensing in commercial CMOS","22nm FD-SOI chip hosts tunable quantum dot arrays","Standard foundry process enables qubit dot control and sensing","Commercial CMOS proves quantum dots with integrated sensing"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000179,"raw_usage":{"total_tokens":1297,"prompt_tokens":938,"completion_tokens":359,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":554,"completion_tokens_details":{"reasoning_tokens":283}},"tokens_in":554,"tokens_out":359,"duration_ms":4456,"temperature":1.0,"reasoning_tokens":283,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-11T17:50:30.636617+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Run the same device at base temperature and extract charging energies and tunnel couplings from Coulomb diamond sizes, bias-triangle dimensions, and SEB phase shifts. If these disagree with the assigned dot geometry, or if the claimed double-dot pattern can be reproduced by a single large dot with charge traps, the central interpretation collapses; a minimal check is whether SEB response jumps land exactly on the transport-defined triple points.","supporting_citations":[{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Provides the modelling and simulation that explains how the back-gate and barrier-gate voltages define the dots in this device."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Earlier single-electron device in the same 22 nm FD-SOI process that this SEB configuration builds on."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Modeling and characterization of a nanoscale single-electron box with a floating lead, the sensing concept used here."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Introduces the single-lead quantum dot as a scalable charge sensor, the basis of the SEB readout."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Provides the standard double-quantum-dot stability diagram and bias-triangle framework used to interpret the transport data."}],"review_version":1}