{"id":"f6c6a5f7-20b2-4f9f-b810-09930e72ce03","arxiv_id":"2412.14918","paper_version":3,"verdict":"REJECT","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"high","formal_verification":"none","parameter_count":2,"one_line_summary":"A shortest-path swap-routing method produces pulse sequences for two-qubit exchange-only gates on 450 planar six-dot topologies, with experimental truth-table checks on Intel hardware.","lead":"Intel researchers generate optimized pulse sequences for two-qubit exchange-only spin qubit gates across 450 six-dot layouts, and verify some of them on a silicon chip. The paper introduces a fast routing method that could help engineers choose quantum dot arrangements for future spin qubit processors.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Sec. IIIB2's correctness proof treats inserted π spin-swap pulses as free routing moves, but each such swap is a unitary that conjugates neighboring reference pulses; the claim that any path 'correctly implements the desired operation' is therefore unsupported and generally false.","rationale":"The reader's weakest assumption identifies the same load-bearing gap: inserted physical spin swaps are treated as routing operations without accounting for their unitary action. My independent analysis confirms this is not a minor missing step in the proof but a genuine correctness failure. The graph construction ensures only that the sequence of reference pulses is scheduled in the right order on the right spin labels and that spins return to their initial dots; it never constrains or compensates for the logical effect of the interleaved SWAP gates. A simple conjugation argument shows that the resulting total unitary generally differs from the intended all-to-all operation. The experimental validation via truth-table overlap in the computational basis is insufficient to rescue the claim, because it does not verify the full quantum gate and is not SPAM-corrected. Since the paper's main contribution—generating valid pulse sequences for 450 topologies and comparing their lengths—depends on the invalid correctness theorem, the verdict should remain REJECT unless the authors add a rigorous derivation or verification of the actual logical unitaries of the generated sequences.","tokens_in":21545,"tokens_out":9546,"duration_ms":98689,"concrete_test":"Analytically settle Section IIIB2 with a minimal counterexample: choose reference U = U12(π/2) U34(π/2) and a connectivity forcing the routing path that inserts S23 before the second pulse and then restores positions; multiply the resulting sequence S23 U34 S23 U12 and compare its local invariants with those of the target. Independently, take one generated CX sequence for the linear topology from the released pulse library, multiply all exchange pulses in order as a 64×64 six-spin unitary, project onto the two-qubit logical subspace, and compare with CX up to single-qubit corrections. If either comparison fails, the correctness claim is false.","verdict_should_be":"REJECT","load_bearing_attack":"The paper's central correctness claim is in Section IIIB2: it asserts that any path through the optimization graph correctly implements the desired operation because every reference pulse is applied to the correct pair of spins in the correct order and the initial and final configurations are guaranteed. This proof omits the unitary action of the inserted spin-swap pulses. A π-exchange is not a free relabeling; it is a SWAP operator on the two spin modes, and it does not commute with the reference exchange pulses. Concretely, if the reference sequence is U = U12(θ) U34(φ) and routing requires swapping spins 2 and 3 before the second pulse, the actual sequence is S23 U34 S23 U12 = U24(φ) U12(θ), not U12(θ) U34(φ). Returning all spins to their initial dots makes the product of the inserted swaps alone equal to identity, but it does not make the swaps commute past the reference pulses, so the total unitary is generally different from the target. The experimental validation in Section V uses SPAM-uncorrected classical truth-table overlap, which cannot certify a two-qubit unitary; different unitaries can have high basis-state overlap. Because every sequence-length result and the 450-topology pulse library rest on the invalid path-correctness claim, the paper's central contribution is not established.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The manuscript presents a swap-insertion (\"swap-adding\") optimization method for exchange-only two-qubit gates: starting from an all-to-all pulse sequence, it inserts π-exchange spin-swap pulses to route the six spins through a restricted dot connectivity, formulates the routing as a shortest-path problem on a layered directed acyclic graph, and generates a pulse library for CX, CZ, iSWAP, leakage-controlled CX, and leakage-controlled CZ on 450 planar six-dot topologies. The authors report sequence-length reductions across topology classes, introduce a CXSWAP operation and relaxed final-spin-permutation variants, validate selected sequences on an Intel Tunnel Falls device using truth-table overlap, and analyze teraquop footprints for four QEC layouts. The central correctness claim is that every path from source to destination in the optimization graph implements the desired operation because the reference pulses are applied in order to the correct spin labels with initial and final configurations fixed.","tokens_in":21801,"tokens_out":13802,"duration_ms":101792,"significance":"If the central correctness claim were established, the paper would be a useful engineering contribution: a fast topology-agnostic routing optimizer, a broad public pulse library, the CXSWAP abstraction, and a QEC-level comparison are all valuable steps for exchange-only spin-qubit architectures. The public release of the pulse library and the integration into the Intel quantum stack are concrete strengths. However, the correctness of the method is load-bearing for every reported result, and, as detailed below, the proof provided in Section IIIB2 does not establish it; the sequence lengths, the CXSWAP results, and the QEC conclusions all depend on swap-inserted sequences actually implementing the intended two-qubit unitaries. I do not see a parameter-fitting circularity; the reference-sequence dependence is acknowledged, though it should be stated more prominently.","major_comments":[{"comment":"The proof that \"any path ... correctly implements the desired operation\" is not valid. A spin swap is the unitary i·SWAP_{ab} on the two spin modes, not a free relabeling; inserting such a swap between reference pulses conjugates the neighboring reference pulse and generally changes the total unitary. For example, with a reference sequence U12(θ)U34(φ), routing that requires swapping spins 2 and 3 before the second pulse and swapping back afterward yields the physical sequence S23 U34(φ) S23 U12(θ) = U24(φ) U12(θ), which is not equal to U12(θ)U34(φ) unless the factors commute. The argument that \"every reference pulse is applied to the correct pair of spins in the correct order\" tracks only the spin labels on which the pulses act; it omits the unitary action of the inserted swaps themselves. The destination node enforcing the identity final permutation only makes the product of the inserted swaps alone equal to identity; it does not make the swaps commute with the reference pulses. Since every generated sequence is of this form, the correctness of the pulse library and all length comparisons in Sections IV and VI rest on an unproved and generally false assertion.","section":"IIIB2"},{"comment":"The experimental validation does not close the correctness gap and is not sufficient to certify the generated sequences. The reported truth-table overlaps are SPAM-uncorrected classical basis-state probability overlaps; for CX they are 79.4% and for iSWAP 81.2%, compared with an identity overlap of 87.9% (Section V). Basis-state truth tables are insensitive to relative phases and can give high overlap for unitaries different from the target (for example, a CZ gate has the same Z-basis truth table as the identity), so they cannot establish that a two-qubit unitary is the intended one. Given the proof gap in Section IIIB2, the experiment does not provide independent evidence that the swap-inserted sequences realize the claimed gates. A full process-tomography or randomized-benchmarking comparison, or at minimum a numerical check of the six-spin unitary of every generated sequence, would be needed.","section":"V"}],"minor_comments":[{"comment":"The acknowledged dependence of the reported \"optimal\" lengths on the chosen all-to-all reference sequence (e.g., the missed 22-pulse linear CX) should be stated in the abstract or conclusions, since the abstract's \"up to 43% reduction\" is relative to that particular reference and not an intrinsic property of the connectivities.","section":"IVA"},{"comment":"In the definition of edge weights, please state explicitly that each edge weight equals the number of inserted swap pulses after merging plus one for the reference pulse of the destination node; the current text says \"new pulses\" and the figure example is helpful but the general rule should be written out.","section":"IIIB1 / Figure 3"},{"comment":"Please report the number of experimental shots and statistical uncertainties for the truth-table overlaps, and clarify how post-selection interacts with the quoted identity overlap of 87.9%.","section":"V"},{"comment":"In Eq. (2), the units and distribution conventions for δJ_{ij} and δϵ^z_i should be given explicitly; the text says δJ is unitless, but the sampling distribution is only described informally via σ=ΔJ.","section":"VIC"}],"recommendation":"reject","confidential_remarks":"I recommend rejection because the central correctness claim is unsupported: the swap-insertion procedure as described does not generally implement the reference two-qubit gate, and the experimental truth-table data do not certify the unitaries. The authors could potentially repair the method by computing the actual unitary of each swap-inserted sequence and adding compensating corrections, or by numerically verifying all generated sequences, but that would be a substantial revision rather than a local fix."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Dear colleague,\n\nHere is my read of the EO pulse sequence paper. The routing idea is genuinely useful: start from an all-to-all exchange pulse sequence and map it to a restricted dot topology by inserting pi spin swaps, then formulate the search as a shortest-path problem. The systematic enumeration of 450 planar six-dot topologies is new, the CXSWAP construction (getting a logical SWAP nearly free alongside a CX) is a nice architectural insight, and the authors actually integrated the library into the Intel stack and ran experiments on Tunnel Falls. That is real work, and the public data release helps.\n\nThe soft spot is Section IIIB2, and it is load-bearing. The correctness proof asserts that any path through the graph implements the desired gate because every reference pulse is applied to the correct pair of spins in the correct order and the initial/final spin configurations match. That argument ignores the unitary action of the inserted swaps. A pi exchange is not a free relabeling; it is a SWAP operator on the two spin modes, and it conjugates the neighboring reference pulses. Concretely, if the reference sequence is U12(theta)U34(phi) and routing requires swapping spins 2 and 3 before the second pulse, the actual total unitary is S23 U34 S23 U12 = U24(phi)U12(theta), not U12(theta)U34(phi). Returning all spins to their initial dots makes the product of the inserted swaps alone equal to identity, but it does not make them commute past the reference pulses. So the central claim—that any path correctly implements the target gate—is generally false. The graph search finds the cheapest way to apply the reference pulses in order, but the resulting pulse sequence does not necessarily implement the reference unitary.\n\nThe experimental validation does not close this gap. Truth-table overlap on the computational basis, without SPAM correction, cannot certify a two-qubit unitary. The reported overlaps (79-84%) are not far from the identity baseline (88%), and different entangling gates can share the same classical basis-state mapping.\n\nI still think the paper deserves a serious referee. The method might be fixable by properly accounting for the permutation action, and the CXSWAP and QEC case study are worth preserving. But as it stands, the pulse library is not a reliable deliverable. I would not cite it in its current form. For a reading group, the paper is a good case study in why routing swaps are not free operations in an encoded qubit setting.","headline":"Useful routing idea and a nice CXSWAP, but the central correctness proof ignores the unitary action of inserted swaps, so the pulse library is not established.","tokens_in":22411,"tokens_out":8162,"would_cite":false,"duration_ms":65457,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":["03.67.Lx"],"model":"deepseek-v4-flash","headline":"A graph-based routing method maps any exchange-only two-qubit sequence to arbitrary six-dot layouts with optimal spin-swap insertion, generating valid pulses for 450 topologies.","keywords":["exchange-only spin qubits","quantum dot arrays","two-qubit gates","pulse sequence optimization","spin swaps","CXSWAP","surface code","quantum error correction"],"falsifier":"Compute the full 64-dimensional unitary of any generated sequence, such as the 25-pulse CX on a linear topology with intraqubit permutations, and compare it to the reference sequence conjugated by the swap permutation; any discrepancy beyond global phase, or any leakage outside the logical subspace, would refute the claim that every path correctly implements the gate.","tokens_in":1693,"feed_emoji":"⚛","tokens_out":9211,"duration_ms":96704,"temperature":0.7,"pith_summary":"This paper claims that exchange-only two-qubit gates can be efficiently adapted to nearly any planar arrangement of six quantum dots by inserting spin-swap pulses according to a shortest-path search, rather than reoptimizing each gate from scratch. It demonstrates this on 450 unique six-dot topologies, producing pulse sequences for CX, CZ, iSWAP, and leakage-controlled variants that are up to 43% shorter than on a linear chain. The central payoff is a design rule: denser dot connectivity shortens two-qubit operations, and a CXSWAP can be produced at almost the same cost as a CX. The authors also test the generated pulses on fabricated hardware and use them to compare surface-code resource estimates, arguing that layout choice should be guided by pulse-level and error-correction considerations.","feed_headline":"Spin-swap routing cuts two-qubit gate pulses by up to 43%","feed_subtitle":"A shortest-path search adapts exchange-only gates to 450 six-dot layouts and yields a nearly free CXSWAP.","key_machinery":"The optimization graph: a layered directed acyclic graph whose nodes are reference-pulse-plus-spin-configuration pairs and whose edges are minimal sequences of spin swaps between configurations. The source fixes initial spin locations, the destination requires return to those locations (or a specified permutation), and an edge weight is the number of new pulses added after absorbing any new pulse into the most recent unblocked exchange on the same dot pair. Shortest path equals the optimal swap-inserted schedule for a fixed reference sequence, with reference sequences for CX, CZ, iSWAP, LCCX, and LCCZ derived from prior constructions.","core_discovery":"The paper's central claim is that any exchange-only pulse sequence designed for all-to-all spin connectivity can be mapped to a restricted dot topology by inserting angle-pi spin swaps, and that the optimal such mapping is found as the shortest path in a layered directed acyclic graph. Each layer corresponds to one reference pulse; nodes are valid spin configurations in which the required spins sit on adjacent dots; edge weights count the additional pulses after merging new pulses with still-unblocked earlier ones. Because every path applies the reference pulses in order to correctly labeled spins and starts and ends at the same spin configuration, the paper asserts every path implements the desired logical gate. With this method the paper generates complete sequences for five two-qubit gates on 450 unique six-dot topologies, reports reductions in sequence length of up to 42.8%, and shows that relaxing final spin-location constraints shortens sequences further while a specific final permutation yields a CXSWAP gate at 7.34% average extra cost over CX. Experimental truth-table measurements on a linear six-dot device confirm the pulses act as expected.","pith_inferences":["A direct test of the correctness assumption is to simulate the full six-spin unitary of a generated sequence and verify it equals the reference unitary up to spin relabeling; doing this for all 450 topologies would settle whether every path really implements the intended gate.","The same shortest-path formulation could be extended to optimize over pulse-order permutations within the reference sequence, something the paper leaves for future work and observes can shorten sequences by 1 to 2 pulses.","The routing approach could in principle scale to multi-qubit operations such as parity-check gates by constructing the search graph on demand and using heuristic pathfinding.","The nearly free CXSWAP suggests that QEC circuits elsewhere built from CX might be recompiled with CXSWAP as the native two-qubit gate on sparse layouts, potentially reducing circuit depth on hardware with large readout components."],"forward_implications":["Hardware designers can choose any of the 450 planar six-dot topologies and obtain valid, near-optimal two-qubit pulses without running an expensive per-layout search.","Denser inter-qubit dot connections reduce pulse counts: for example, the linear-parallel class reaches a maximum of 22 CX pulses versus 28 for the fully linear class, and the densest triangular topology reaches 19 pulses.","Allowing the compiler to track intraqubit spin permutations shortens sequences for free, with reductions of 0 to 13% and a mean of 5.7%.","A CXSWAP gate costs on average only 7.34% more than a standard CX, making CXSWAP-based surface-code circuits practical without paying for a separate SWAP operation.","QEC resource estimates depend on parallelism restrictions, not just pulse count; denser layouts can perform worse under neighbor-based crosstalk restrictions."],"supporting_citations":[{"why":"Supplies the 12-pulse locally equivalent CX sequence that the paper's all-to-all reference extends to an exact CX via local corrections.","marker":"[46]"},{"why":"Provides the gauge-invariant Fong-Wandzura CX construction for linear arrays, the theory that motivates the swap-adding approach.","marker":"[47]"},{"why":"Demonstrates two-EO-qubit gates experimentally and provides the leakage-controlled CX and CZ reference sequences used in the optimization.","marker":"[32]"},{"why":"Formalizes the FW sequence in terms of quasi-Fredkin operations, the structure the method tries to preserve when mapping to restricted connectivities.","marker":"[50]"},{"why":"Provides earlier CX pulse sequences for nonlinear dot connectivities that this paper extends to a much larger topology set.","marker":"[45]"},{"why":"Shows that surface-code circuits can use CXSWAP or iSWAP as the two-qubit basis gate, grounding the CXSWAP application.","marker":"[58]"}],"fun_headline_variants":["Swap-insertion finds optimal pulse mappings for 450 layouts","Nearly free CXSWAP from relaxing spin constraints","Shortest-path search adapts exchange-only gates to 450 layouts","Five two-qubit gates optimized for 450 dot layouts","Leakage-controlled CX and CZ gates on 450 six-dot layouts"],"cache_read_input_tokens":24448,"weakest_assumption_plain":"Inserting complete spin swaps (exchange pulses of angle pi) between the reference pulses, with all six spins returned to their starting dots, leaves the logical two-qubit gate unchanged; the paper asserts this rather than proving it.","fun_headline_variants_meta":{"raw":{"variants":["Swap-insertion finds optimal pulse mappings for 450 layouts","Nearly free CXSWAP from relaxing spin constraints","Shortest-path search adapts exchange-only gates to 450 layouts","Five two-qubit gates optimized for 450 dot layouts","Leakage-controlled CX and CZ gates on 450 six-dot layouts"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000963,"raw_usage":{"total_tokens":4122,"prompt_tokens":992,"completion_tokens":3130,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":608,"completion_tokens_details":{"reasoning_tokens":3043}},"tokens_in":608,"tokens_out":3130,"duration_ms":15471,"temperature":1.0,"reasoning_tokens":3043,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-11T11:49:14.729414+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Compute the full 64-dimensional unitary of any generated sequence, such as the 25-pulse CX on a linear topology with intraqubit permutations, and compare it to the reference sequence conjugated by the swap permutation; any discrepancy beyond global phase, or any leakage outside the logical subspace, would refute the claim that every path correctly implements the gate.","supporting_citations":[{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Supplies the 12-pulse locally equivalent CX sequence that the paper's all-to-all reference extends to an exact CX via local corrections."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Provides the gauge-invariant Fong-Wandzura CX construction for linear arrays, the theory that motivates the swap-adding approach."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Demonstrates two-EO-qubit gates experimentally and provides the leakage-controlled CX and CZ reference sequences used in the optimization."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Formalizes the FW sequence in terms of quasi-Fredkin operations, the structure the method tries to preserve when mapping to restricted connectivities."}],"review_version":1}