{"id":"5a8d2e98-c4ac-49b4-a4b3-7c34f899bd92","arxiv_id":"2412.18533","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":5.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"A critical-path scheduler lets quantum circuits combine fast and robust gate pulses by using idle time, keeping latency unchanged and improving measured success rates.","lead":"Quantum circuits often have idle gaps while operations on different qubits synchronize. This paper introduces a scheduler that fills those gaps with longer, more robust pulse versions of quantum gates, while keeping the shortest gates on the critical path, so total circuit time stays the same. Experiments on IBM's Brisbane machine report success-probability gains above 25% in some circuits.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The >25% gain is contingent on longer pulses being higher fidelity; the paper's own dynamic results (Sec. VI.B) show this can fail, so the framework's benefit is not established as a general property.","rationale":"The scheduling algorithm itself is sound: CPM with slack-based extension preserves latency by construction, and the polynomial complexity claim is plausible. But the experimental section is the only support for the headline quantitative claim, and that support depends on a monotonic relation between pulse duration and fidelity. The paper's own Section VI.B shows that relation is not universal: dynamic gates generated by interpolation are not fine-tuned and their fidelity varies irregularly with duration, and the large gains occur only for the 32 dt minimum. This is exactly the condition the Reader identified. A framework that simply fills slack with longer pulses cannot guarantee improvement if longer pulses are noisier. The static experiments use carefully fine-tuned pulses, where longer durations may indeed be better, but that is an external property of the calibration, not of the framework. To claim robust and low-latency circuits with scaling gains, the authors need to show that the selected durations are fidelity-improving, or restrict the claim to calibrated gate sets. Error bars and more circuits would strengthen the statistics, but they do not remove the need for this per-duration fidelity check; hence the Reader's CONDITIONAL verdict remains appropriate.","tokens_in":14386,"tokens_out":7932,"duration_ms":83728,"concrete_test":"On the same Brisbane qubits and calibration, run interleaved randomized benchmarking for each single-qubit Gaussian duration in S = {32, 48, 64, 120, 256, 512} dt (static) and for each multiple-of-8 duration up to 128 dt (dynamic), then compare per-gate error rates. Re-run the 3-qubit RB comparison after restricting S to durations whose measured fidelity is at least as high as the fast baseline. If the >25% improvement disappears, or if the time-optimized schedule selects lower-fidelity durations, the central claim is not supported; if gains persist and all selected durations are higher fidelity, the concern is resolved.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim that the framework improves absolute success probability by more than 25% holds only if, for every gate the scheduler extends, the longer implementation actually has higher fidelity than the fast baseline. The paper never measures per-duration gate fidelity; it infers the mechanism from circuit-level randomized benchmarking. The dynamic experiments (Sec. VI.B, Fig. 5) directly undercut this premise: non-fine-tuned longer Gaussian pulses are not consistently more faithful, and time-optimized circuits with 48 and 64 dt minima show only slight gains. Algorithm 2 extends a gate whenever slack permits (g.ES + d <= g.LF), with no fidelity-based selection; if the next allowed duration is worse, the scheduler will still choose it and can degrade results. Thus the reported >25% improvement is not a property of the CPM scheduling method alone but of a gate set whose durations happen to be calibrated so that longer pulses are better. The static fine-tuning of 32-512 dt pulses may create such a set, but the paper does not compare against a gate set where monotonicity fails, nor does it report the fidelity of each allowed duration. Consequently, the claimed scalability and robustness benefits are conditional in exactly the regime the authors say they target.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes a compile-time pulse scheduling framework that models a quantum circuit as a quantum operation dependency graph and applies the Critical Path Method (CPM) to identify the critical path. The scheduler keeps fast pulses on the critical path and extends the duration of non-critical gates to the longest allowed implementation that fits in the available slack, thereby claiming to improve gate robustness without increasing circuit latency. The framework is validated with randomized benchmarking experiments on IBMQ Brisbane using both static fine-tuned Gaussian pulses (durations 32-512 dt) and dynamic interpolated Gaussian pulses (durations up to 128 dt for pi/2 rotations). The authors report improvements in absolute success probability exceeding 25% in some 3-qubit static cases and argue that the benefits grow with circuit width.","tokens_in":14655,"tokens_out":10118,"duration_ms":92929,"significance":"If the reported improvements are robust, the framework is a simple and practical compiler-level technique for pulse scheduling, allowing a trade-off between fast noisy gates and longer robust gates without latency penalty. The paper's strengths are a clearly specified polynomial-time algorithm (Algorithms 1-2), real-hardware randomized benchmarking, and an explicit acknowledgment that longer pulses are not always more faithful in the dynamic approach. However, the evidence is preliminary and conditional: only 2- and 3-qubit circuits are tested, no error bars or significance tests are provided, and the central mechanism—that longer pulses have higher fidelity in the tested duration range—is not directly measured and is contradicted by the paper's own dynamic results in some regimes. If the mechanism is verified and the statistics strengthened, the work would be a useful contribution to pulse-level compilation.","major_comments":[{"comment":"The dynamic experiments show that longer, non-fine-tuned Gaussian pulses are not consistently more faithful than shorter ones; indeed, the paper states that 'longer quantum gates do not necessarily have higher fidelity because they are not fine-tuned.' Algorithm 2 (line 34) extends a gate whenever g.ES + d <= g.LF, with no fidelity-based selection. If the next allowed duration for a gate has lower fidelity, the scheduler will still select it and can degrade overall performance. The reported >25% improvement is therefore not a property of the CPM scheduling method alone but of a gate set whose durations were fine-tuned so that longer pulses are better. To support the framework's generality, the authors should either (a) measure and report the fidelity of every allowed duration for the gates used, (b) make the scheduler fidelity-aware by optimizing an estimated success probability, or (c) explicitly state and verify the monotonicity assumption as a precondition for applying the framework.","section":"Sec. VI.B, Fig. 5 and Algorithm 2"},{"comment":"All results are means of 10 RB circuits with no error bars, confidence intervals, or significance tests. The headline 'more than 25%' improvement appears only in selected 3-qubit cases, and without statistical support the difference could be within shot noise or calibration drift. The authors should report standard deviations or standard errors, the number of shots per circuit, and ideally repeat the experiments on multiple days or backends.","section":"Sec. VI, Figs. 3 and 5"},{"comment":"The claim that 'performance gains scale as the number of qubits increases' is extrapolated from circuits with at most 3 qubits. While idle periods do tend to increase with qubit count, larger circuits also introduce more multi-qubit gate errors, crosstalk, and routing overhead. This claim should be tempered or supported by experiments on circuits with, say, 5-10 qubits.","section":"Abstract and Sec. VI.C"}],"minor_comments":[{"comment":"The text says the framework 'optimally' implements longer gates, but Algorithm 2 is a greedy heuristic with priority by rotation/duration ratio and no optimality proof. Suggest using 'heuristically' or adding an optimality analysis.","section":"Abstract and Sec. V"},{"comment":"References [17] and [33] appear to be the same work (Carvalho et al., Phys. Rev. Applied 15, 064054 (2021)), as do [18] and [34] (Baum et al., PRX Quantum 2, 040324 (2021)). These duplicates should be merged.","section":"References"},{"comment":"The empirical formula for sigma(d) contains fitted constants (68.51, 17.19, 1/5) with no fitting data or validation range. Provide the data points used or a reference to justify this heuristic.","section":"Eq. (9)"},{"comment":"The caption says results are 'averaged over subsequence durations with similar frequency values,' but the meaning of 'subsequence durations' is unclear. Please clarify how the averaging was performed.","section":"Fig. 7 caption"},{"comment":"The 2-qubit circuits use Clifford lengths 1, 41, 81, 121, 161 while the 3-qubit circuits use 1, 3, 5, 7. The difference makes cross-comparison of scaling trends difficult; please explain why these lengths were chosen.","section":"Sec. VI experimental setup"}],"recommendation":"major_revision","confidential_remarks":"The paper presents a neat scheduling idea that could be useful for pulse-level compilation, but the experimental evidence is currently too thin and the central monotonicity assumption is not verified. The authors should be asked to add statistical rigor, measure per-duration gate fidelities (or reframe the claims as conditional), and either provide larger-circuit data or remove the scaling claim. This fits a quantum software/compilation venue; with the requested changes, it could become a solid contribution."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Colleague, here's my read of arXiv:2412.18533.\n\nThe genuinely new piece is small but real: taking the Critical Path Method slack from a circuit dependency graph and using that slack to pick longer, more robust pulse implementations for off-critical gates, while keeping fast gates on the critical path. That specific combination—using CPM slack to choose among multiple pulse-duration implementations of the same gate—is not in the cited graph-scheduling work [24,26,27]. The algorithm is clearly specified and runs in polynomial time; the static experiments on Brisbane show the intended effect, with the 3-qubit circuits showing the largest gains. The authors also deserve credit for acknowledging in Sec. VI.B that longer dynamic pulses are not automatically more faithful, which partially anticipates the main concern.\n\nThe soft spots are real but not disqualifying. First, the headline \">25% improvement\" is not a general property. It appears in selected static 3-qubit configurations. The paper reports no error bars, no per-configuration variance, and no statistical test, so we can't tell which differences are stable. Second, the framework's benefit depends on the premise that each allowed longer duration is actually higher fidelity than the fast baseline. Algorithm 2 extends a gate whenever slack permits (g.ES + d <= g.LF), with no fidelity check. The dynamic results (Fig. 5) show exactly the failure mode: non-fine-tuned longer Gaussian pulses are not consistently better, and the time-optimized 48 and 64 dt cases show only slight gains. So the improvement is conditional on the gate set being calibrated such that longer equals better. That should be stated as a limitation, not a universal claim. Third, the experiments stop at 3 qubits; the scaling argument is extrapolation. On the citation side, the prior work is adequately cited; self-citations are fine.\n\nOverall, this is a modest, honest engineering contribution. It is not a physics breakthrough, and the authors do not oversell it that way. With code and data plus confidence intervals, the empirical claim would be much stronger. The scheduling idea is worth engaging.\n\nI'd send it to peer review. It is clearly specified and the experiments, while limited, support a conditional version of the claim. The authors should be pushed to release code and data and to be precise about which configurations actually improve by more than 25%.","headline":"A modest but real scheduling idea—using CPM slack to swap in longer, more robust pulses—supported by conditional hardware results that need error bars and a clearer statement of when longer pulses actually help.","tokens_in":15129,"tokens_out":1898,"would_cite":true,"duration_ms":17296,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":["03.67.Lx"],"model":"deepseek-v4-flash","headline":"This paper claims a critical-path pulse scheduler can mix fast and more faithful gates in one circuit with no latency cost, improving absolute success probability by over 25% on tested hardware.","keywords":["quantum circuit compilation","pulse-level scheduling","critical path method","error suppression","randomized benchmarking","idle periods","quantum control","low-latency quantum circuits"],"falsifier":"Measure the fidelity of each allowed pulse duration in the static gate set on a given device: if a 512 dt Gaussian pulse is not more faithful than a 32 dt pulse of the same rotation, the time-optimized schedule should show no gain over the fastest fixed schedule. A direct test is to run the paper's randomized-benchmarking comparison side by side with such per-duration fidelity measurements and check that the durations the scheduler chooses are exactly the higher-fidelity ones.","tokens_in":14226,"feed_emoji":"⚛️","tokens_out":9284,"duration_ms":79098,"temperature":0.7,"pith_summary":"This paper claims that a quantum circuit does not have to choose between fast gates and robust gates: both can be used together at no extra latency. The framework models the circuit as a dependency graph, identifies the critical path that determines total execution time, and schedules the fastest pulses only on that path. Idle periods outside the path are filled with longer, more faithful implementations of the same logical operations, using a project-management scheduling rule. Randomized benchmarking on a 127-qubit superconducting processor shows absolute success-probability gains above 25%, with larger gains as the number of qubits grows.","feed_headline":"Scheduling longer gates into idle time lifts success by 25%","feed_subtitle":"Fast pulses stay on the critical path; slower, faithful pulses fill the idle time at zero latency cost.","key_machinery":"The machinery is the Quantum Operation Dependency Graph combined with the Critical Path Method (CPM). Each gate is a node with a duration; each dependency is an edge; a forward pass computes the earliest start and finish times and a backward pass computes the latest start and finish times. The algorithm then applies an 'as long as possible' policy: a gate not on the critical path is lengthened to the next allowed duration whenever its earliest start plus the new duration still fits before its latest finish, with gates prioritized by rotation angle divided by duration. This converts otherwise wasted idle time into longer, more faithful pulses without moving the overall completion time.","core_discovery":"The central claim is that robustness and speed can be mixed at the pulse level rather than traded off globally. Given a gate set with several calibrated implementations of the same operation at different durations, the algorithm computes early and late start/finish times for every gate in the circuit, marks the critical path, and extends every non-critical gate to the longest duration that still finishes before its deadline. The ordering in which gates are extended uses the rotation-per-unit-duration ratio so that different rotation angles get fair access to slack. The result is a schedule with exactly the same latency as the fastest possible schedule, but with most gates carried out by longer pulses that are expected to be more faithful. The experiments support this by showing consistent gains in randomized benchmarking, with the strongest gains in larger circuits where idle time is more abundant.","pith_inferences":["A direct implication the paper does not pursue is that the real objective should be per-duration fidelity: if a backend's longer pulses are not more faithful than its short ones, the scheduler has nothing to gain and may simply run the same errors for longer.","The same critical-path machinery could be extended to choose among pulse shapes and error-suppression techniques rather than durations alone, using measured fidelity of each candidate implementation.","On large devices, filling every idle period with longer gates may crowd out dynamical decoupling sequences, so a practical compiler would need to decide how much slack to reserve for decoupling.","The reported gains use only Gaussian pulses; optimization-based robust waveforms with longer durations should make the framework's advantage larger, since the paper only tested a moderate robustness gap."],"forward_implications":["A compiler can produce a minimum-latency schedule in which most gates are actually the slower, higher-fidelity versions, so robust pulse-generation techniques no longer need to be fast to be usable.","The benefit should scale with qubit count, because larger circuits create more idle periods and leave a smaller fraction of gates on the critical path.","Calibration practice could shift from calibrating a single waveform per operation to calibrating a small family of implementations with different durations and robustness profiles.","The polynomial running time makes the gate-duration selection feasible as a compile-time optimization, not just a post-processing step."],"supporting_citations":[{"why":"Defines the Critical Path Method that the scheduling framework is built on.","marker":"[41]"},{"why":"Supplies the forward/backward pass calculations used to compute early and late times for each gate.","marker":"[42]"},{"why":"Provides randomized benchmarking, the experimental protocol used to measure success probability.","marker":"[46]"},{"why":"Demonstrates optimization-based robust gate generation, the class of longer, robust pulses this framework makes usable.","marker":"[17]"},{"why":"Shows how to scale default pulse calibrations to implement arbitrary rotations, which the dynamic scheduling approach relies on.","marker":"[25]"},{"why":"Introduces DRAG pulses and the leakage problem that motivates keeping fast pulses only on the critical path.","marker":"[28]"},{"why":"Prior dynamic pulse compilation that aggregates instructions, a related approach this framework extends with slack-based timing.","marker":"[24]"},{"why":"Shows idle periods can be used for error suppression, the same resource the framework repurposes for longer gates.","marker":"[44]"}],"fun_headline_variants":["Zero-latency robust gates: 25% better circuits","Mix fast and faithful pulses for 25% gain","Critical-path trick boosts quantum success 25%","Idle time hosts robust gates: success up 25%","Same speed, more robust: quantum circuits +25%"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The framework's measured gains rest on the premise that, within the allowed duration set, a longer pulse implementing the same rotation is more faithful than a shorter one; the paper's own dynamic experiments show this premise can fail when longer pulses are not fine-tuned.","fun_headline_variants_meta":{"raw":{"variants":["Zero-latency robust gates: 25% better circuits","Mix fast and faithful pulses for 25% gain","Critical-path trick boosts quantum success 25%","Idle time hosts robust gates: success up 25%","Same speed, more robust: quantum circuits +25%"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000663,"raw_usage":{"total_tokens":3018,"prompt_tokens":923,"completion_tokens":2095,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":539,"completion_tokens_details":{"reasoning_tokens":2015}},"tokens_in":539,"tokens_out":2095,"duration_ms":14951,"temperature":1.0,"reasoning_tokens":2015,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-11T04:41:15.446839+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Measure the fidelity of each allowed pulse duration in the static gate set on a given device: if a 512 dt Gaussian pulse is not more faithful than a 32 dt pulse of the same rotation, the time-optimized schedule should show no gain over the fastest fixed schedule. A direct test is to run the paper's randomized-benchmarking comparison side by side with such per-duration fidelity measurements and check that the durations the scheduler chooses are exactly the higher-fidelity ones.","supporting_citations":[{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Supplies the forward/backward pass calculations used to compute early and late times for each gate."},{"cited_title":"The topological sort offers an ordering of the vertices that respects the dependencies indicated by the edges","cited_arxiv_id":null,"evidence_quote":"Provides randomized benchmarking, the experimental protocol used to measure success probability."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Shows how to scale default pulse calibrations to implement arbitrary rotations, which the dynamic scheduling approach relies on."},{"cited_title":"Gokhale, A","cited_arxiv_id":null,"evidence_quote":"Introduces DRAG pulses and the leakage problem that motivates keeping fast pulses only on the critical path."},{"cited_title":"This approach often leads to much faster pulse se- quences compared to the original implementations","cited_arxiv_id":null,"evidence_quote":"Prior dynamic pulse compilation that aggregates instructions, a related approach this framework extends with slack-based timing."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Shows idle periods can be used for error suppression, the same resource the framework repurposes for longer gates."}],"review_version":1}