{"id":"707e5d2b-3f22-4bee-bd83-c1ceee12c5ac","arxiv_id":"2504.14956","paper_version":2,"verdict":"REJECT","confidence":"HIGH","novelty_score":4.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":5,"one_line_summary":"An approximate low-IF, crystal-less receiver with carrier-auxiliary IF feedback LO synthesis is proposed for Type-B/C Ambient IoT, with -88 dBm sensitivity estimated from a link budget rather than measured.","lead":"This paper proposes a crystal-less receiver for Ambient IoT that locks its oscillator to the incoming carrier through an IF feedback loop. A 55nm prototype is reported, but the headline -88 dBm sensitivity is calculated from assumed parameters and the lock loop is only simulated.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Headline sensitivity is a link-budget projection from post-sim NF and a behavioral loop simulation; no measured lock, BER, or sensitivity is reported, so the -88 dBm claim is unverified.","rationale":"The reader's weakest_assumption identifies exactly the same load-bearing concern: the -88 dBm sensitivity and crystal-less operation require the fabricated LO calibration loop to lock and hold the IF with low residual error and require the RFFE noise figure to be close to the 12 dB post-simulation value used in Eq. (4). The paper does not provide measured loop locking, phase noise, frequency error, or end-to-end BER, so the simulation-to-silicon transfer is indeed the critical unverified step. No internal inconsistency in the s-domain loop model or the link-budget arithmetic was found; the issue is purely that the empirical claim is unsupported by the evidence presented. Because the paper is framed as an initial draft and includes a self-acknowledged preliminary status, this is best read as an architecture proposal rather than a demonstrated transceiver. The correct verdict remains REJECT in the sense that the headline claim is not empirically supported, but a revised version with measured loop locking, BER, sensitivity, and power could reasonably be accepted. I therefore do not change the reader's verdict.","tokens_in":16579,"tokens_out":5694,"duration_ms":56397,"concrete_test":"On the fabricated die, transmit a 900 MHz OOK/PRDCH signal at -88 dBm, close the LO calibration loop, and measure the demodulated BER and the locked IF frequency over at least 10 seconds and across a temperature sweep. Compare the measured BER against the paper's stated BLER targets (1% or 10%) and the measured IF against 1.035 MHz plus the allowed guard band. If BER exceeds target or the IF drifts out of band, the headline sensitivity claim is not supported; if measurements are unavailable, the claim should be relabeled as a post-simulation projection.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim—that the fabricated 55nm receiver achieves better than -88 dBm sensitivity after LO calibration—depends on a chain that is not supported by measured data in the paper. Equation (4) combines a 12 dB noise figure that Fig. 12 explicitly labels 'Post-Simulation', an assumed 15 dB SNR, and an assumed 6 dB margin to arrive at -88 dBm. The LO calibration loop, the paper's key novelty, is validated only in behavioral simulation: Section VI-B and Fig. 13 show a simulated VCTRL and fIF settling to 1.035 MHz in about 12 us, with no measured locked-loop frequency error, hold range, phase noise, or temperature behavior from the fabricated die. The only silicon evidence is the die photo in Fig. 11. No end-to-end BER measurement at -88 dBm, or at any input level, is reported. The conclusion's statement that 'Experimental results validate the proposed architecture' overstates what Section VI actually contains. The architecture is plausible, but the headline sensitivity result is an unverified projection, not a demonstrated measurement. This is the load-bearing soft spot: if the fabricated loop does not lock and hold to the required IF accuracy, or if the measured NF is materially above 12 dB, the -88 dBm figure falls.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper discusses design considerations for Ambient IoT (A-IoT) transceivers and proposes a crystal-less receiver architecture for Type-B and Type-C devices. The architecture combines an approximate low-IF receiver with a carrier-auxiliary IF feedback LO frequency synthesizer that tracks the RF carrier and eliminates the external crystal. A prototype in 55 nm CMOS is described, and the abstract claims that after locking the LO calibration loop the receiver sensitivity is better than -88 dBm. The report of Section VI includes S11, frequency response, noise figure, and a behavioral simulation of the LO calibration loop, but the manuscript does not present measured end-to-end demodulation, bit-error-rate, sensitivity, phase noise, or locked-loop frequency-error results.","tokens_in":16722,"tokens_out":4251,"duration_ms":38264,"significance":"If fully validated, the proposed architecture could enable low-cost, sub-mW, crystal-less A-IoT receivers with sensitivity near -88 dBm, which would be a useful contribution to the A-IoT ecosystem. The paper also provides a helpful classification of A-IoT device types and a survey of design considerations. However, the central sensitivity and crystal-less-operation claims currently rest on the combination of a link-budget calculation and a behavioral simulation, so the significance is prospective rather than demonstrated. The transparent link-budget equation and the identification of the key loop dynamics are strengths, but the absence of measured silicon results is a major gap.","major_comments":[{"comment":"The headline sensitivity claim of better than -88 dBm is a link-budget projection, not a measured result. Equation (4) uses a noise figure of 12 dB that Figure 12 labels 'Post-Simulation', an assumed SNR of 15 dB, and an assumed margin of 6 dB. No measured sensitivity, bit-error-rate, or noise figure is reported anywhere in the manuscript. The abstract and conclusion state the -88 dBm value as a demonstrated outcome, which overstates the evidence. The claim should be rephrased as a simulation-based estimate unless the authors add measured sensitivity data.","section":"Section VI-C, Eq. (4)"},{"comment":"The LO calibration loop, which is the key enabling block for crystal-less operation, is validated only with a behavioral-level simulation. The paper does not report any measured locked-loop frequency error, hold range, phase noise, or temperature behavior from the fabricated 55 nm die. Whether the fabricated loop actually locks and maintains the IF at 1.035 MHz with sufficient accuracy is load-bearing for the central claim of crystal-less operation with -88 dBm sensitivity. This missing experimental validation cannot be replaced by a simulation-only figure in a paper that claims experimental verification.","section":"Section VI-B, Fig. 13"},{"comment":"The experimental section is misleadingly labeled 'Measurements and Experimental Results' when the NF curve and frequency response are explicitly marked 'Post-Simulation' and the image rejection ratio is also from simulation. The only silicon evidence is the die photo in Figure 11. Consequently, the conclusion's statement that 'Experimental results validate the proposed architecture' is not supported by the content of Section VI. The paper should either present actual measured results or clearly and consistently frame the results as simulation-based.","section":"Section VI-A, Fig. 12"},{"comment":"The paper states that the proposed architecture is improved based on the Class-AB crystal-less receiver defined in [53], which is the authors' own ISCAS 2025 paper. The manuscript should explicitly delineate the incremental contribution of this work over [53] and disclose the relationship to avoid self-overlap concerns. Without such a statement, readers cannot assess which contributions are new here relative to the prior conference publication.","section":"Section IV-A and Reference [53]"}],"minor_comments":[{"comment":"The data rate entry '1s kbps' appears to be a typo; it should read '1-10s kbps' or similar.","section":"Figure 1"},{"comment":"The IF selection formula is presented without derivation. The relationship between the channel bandwidth, guard band, and the chosen 1035 kHz IF should be spelled out so that the reader can verify the reasoning.","section":"Section IV-D, Eq. (3)"},{"comment":"The Schmitt trigger's programmable threshold is described, but the threshold range and its effect on the frequency detector's accuracy are not quantified. A brief design equation or simulation result would help.","section":"Section V-B"},{"comment":"The text says the LO calibration loop is evaluated by a 'behavioural-level simulation model' but Figure 13 might be mistaken for a measured waveform. State explicitly in the caption or text that this is a simulation result.","section":"Section VI-B"},{"comment":"The acknowledgment contains unusual copyright, licensing, and 'initial draft' notices that are not appropriate for a journal submission. These should be removed or replaced with a standard acknowledgment statement.","section":"Acknowledgment"},{"comment":"Reference [53] is listed as an ISCAS 2025 paper; if it is not yet published, the citation should indicate 'to appear' or include a preprint identifier so that the relationship with the present manuscript is transparent.","section":"References"}],"recommendation":"major_revision","confidential_remarks":"The manuscript's self-citation of the authors' ISCAS 2025 paper [53] and the description of the same architecture as being 'improved based on' it raise a potential dual-submission concern that the editor may wish to investigate. Additionally, the paper calls Section VI 'Measurements and Experimental Results' but reports no measured electrical results from the fabricated chip; this is a significant gap between the paper's claims and its evidence. If the authors cannot provide measured sensitivity, loop-lock, or BER data, they should substantially reframe the paper as a simulation-based design study and temper the abstract and conclusion accordingly."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"The thing to know: this is a system-level design paper whose central claim is not backed by measurement. The abstract says the fabricated 55nm receiver achieves better than -88 dBm sensitivity after LO calibration, but that figure comes from Eq. (4), which plugs a post-simulated 12 dB NF, an assumed 15 dB SNR, and a 6 dB margin into a standard link budget. The LO calibration loop—the paper's key contribution—is only exercised in behavioral simulation (Fig. 13), and the only silicon evidence is the die photo in Fig. 11. There is no measured BER, phase noise, locked-loop frequency error, or power consumption. So the headline number is an unverified projection, not an experimental result.\n\nWhat the paper does well is the system-level thinking. The IF selection derivation (must exceed 3× channel bandwidth, then chosen to land in a guard band) is clear and sensible. The carrier-auxiliary IF feedback idea is clever: using the downconverted IF rather than the GHz LO as the feedback signal saves power, and the first-order loop analysis is fine. The paper also gives a decent summary of 3GPP A-IoT device types and RF specs. Credit where due: the authors are transparent about labeling post-simulation curves, and the architecture is plausible.\n\nThe soft spots are in proportion: the biggest one is the overclaim in the conclusion that \"Experimental results validate the proposed architecture.\" They don't. Beyond that, novelty is modest because the core architecture was already presented in their own ISCAS 2025 paper; this version adds parameter choices and design details, not a new concept. The NF and image rejection numbers are from simulation, and the behavioral loop model is a long way from proving silicon lock.\n\nIf the authors report measured loop locking, sensitivity, BER, and power, this could become a solid journal paper. As it stands, it's a design study with a fabricated prototype but no electrical data. For an editor, I would not send this to peer review in its current form—the gap between claim and evidence is too large. A workshop or technical report venue would be more appropriate. I would read a revised version with measurements, but I wouldn't cite this one for the -88 dBm claim.","headline":"A plausible crystal-less A-IoT receiver architecture, but the headline -88 dBm sensitivity is a link-budget projection from post-sim data, not a measured result.","tokens_in":17397,"tokens_out":2315,"would_cite":false,"duration_ms":22990,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":false},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"This paper proposes a crystal-less Ambient IoT receiver whose local oscillator locks to the incoming RF carrier through a carrier-auxiliary IF feedback loop, reaching better than -88 dBm sensitivity in 55 nm CMOS.","keywords":["Ambient Internet of Things","crystal-less receiver","approximate low-IF receiver","carrier-auxiliary IF feedback","LO frequency calibration","mixer-first receiver","backscatter communication","sub-mW receiver"],"falsifier":"Take the fabricated 55 nm chip, feed it a 900 MHz OOK carrier, and measure the down-converted IF at the VCO control node while the loop is supposed to be locked: if the IF does not settle to $1.035$ MHz within about 12 microseconds and stay within a few tens of kHz across temperature, the crystal-free claim fails. Equivalently, an end-to-end demodulation test at an input power of $-88$ dBm over a $180$ kHz channel that fails to meet the 1-10% BLER target would falsify the sensitivity claim.","tokens_in":16264,"feed_emoji":"📡","tokens_out":9574,"duration_ms":80622,"temperature":0.7,"pith_summary":"The paper tries to establish that Ambient IoT devices in the semi-passive Type-B and active Type-C classes can receive downlink signals at sensitivities better than $-88$ dBm without any external crystal. The proposed architecture derives the local-oscillator frequency from the incoming RF carrier: a feedback loop locks the receiver's intermediate frequency (IF) to a reference generated by a cheap on-chip low-frequency oscillator, then switches from a wide uncertain-IF mode to a narrow approximate low-IF mode. If true, this matters because removing the crystal removes a major cost, volume, and power obstacle to the trillions-of-nodes, battery-free A-IoT vision. The paper reports a 55 nm CMOS prototype whose front-end has about 12 dB noise figure at the $1.035$ MHz IF, and behavioral simulation of the calibration loop locking in about 12 microseconds.","feed_headline":"Crystal-less A-IoT receiver locks in at -88 dBm sensitivity","feed_subtitle":"Carrier-auxiliary feedback tunes the local oscillator to the incoming RF signal, dropping the external crystal.","key_machinery":"The load-bearing mechanism is the carrier-auxiliary IF feedback frequency loop: the RF carrier is down-converted to an IF near $1.035$ MHz, a rotational frequency detector compares that IF against a low-frequency synthesizer reference, and a charge pump adjusts the VCO until the IF locks. The comparison happens at MHz rather than GHz, so the feedback path avoids a high-frequency divider and high-power phase tracking; because there is no frequency conversion inside the IF path, the loop transfer function is first-order, which the paper argues removes loop-stability concerns. The second element is the 'approximate low-IF' receiver itself, which operates in two bandwidth modes: a wide uncertain-IF mode for acquisition and a narrow low-IF mode for sensitivity after lock.","core_discovery":"The central claim is that a 'carrier-auxiliary IF feedback' LO synthesizer can replace the external crystal in a Type-B/C A-IoT receiver. The receiver starts in an uncertain-IF mode with a wide IF bandwidth to tolerate PVT-induced LO drift; once the on-off-keyed (OOK) carrier is present, a rotational frequency detector compares the down-converted IF with a reference derived from a temperature-compensated on-chip oscillator, and a charge pump tunes a ring VCO until the IF locks near $1.035$ MHz. With the loop locked, the receiver enters an approximate low-IF mode with a narrow IF path, and the paper's sensitivity calculation, assuming 15 dB required SNR, 12 dB noise figure, and 6 dB margin over a $180$ kHz channel, gives a sensitivity better than $-88$ dBm. The paper also claims the loop is first-order in the frequency domain, so it has no stability problem, and that the mixer-first 4-path RFFE with a gyrator provides image rejection and out-of-band suppression. Measurement results shown include S11, frequency response, and noise figure; the loop dynamics are demonstrated by behavioral simulation.","pith_inferences":["If the -88 dBm figure survives end-to-end silicon measurement, the same front-end could serve both wake-up reception and data reception in one radio, shrinking the bill of materials for battery-less nodes.","A natural testable extension is to apply the same carrier-auxiliary anchoring to other narrowband downlinks that provide a calibration carrier, such as BLE advertising or LoRa, though the paper's scheme is tied to A-IoT's OOK/PRDCH structure.","The paper's own proposed digital successors (SAR and counter-based digital FLL) suggest the analog loop's 12 microsecond lock time and power can be traded against digital area; whether that trade improves sensitivity depends on the digital blocks' added noise and current."],"forward_implications":["Type-B and Type-C A-IoT devices can drop the external crystal and still meet or exceed the Type-C sensitivity target, since $-88$ dBm is well below the $-70$ dBm level the paper associates with that class.","The two-mode receiver lets a free-running oscillator be used, avoiding the power cost of a PLL while still narrowing the IF bandwidth once locked.","The first-order loop with roughly 12 microsecond lock time supports duty-cycled, wake-up-style operation, since the device can re-lock quickly when it wakes.","The mixer-first RFFE with gyrator-tuned center frequency provides image rejection and out-of-band suppression, removing the need for a SAW filter."],"supporting_citations":[{"why":"Defines the A-IoT device types, physical channels, the carrier-frequency-offset calibration signal, and clock requirements that the architecture is built around.","marker":"[14]"},{"why":"Introduces the Class-AB crystal-less receiver concept from which the proposed carrier-auxiliary IF feedback architecture is developed.","marker":"[53]"},{"why":"Supplies the equivalence between an RF VCO plus down-conversion and an IF VCO, which underwrites the first-order frequency-loop model.","marker":"[60]"},{"why":"Provides the analysis of uncertain-IF versus low-IF tradeoffs that motivates switching from a wide acquisition mode to a narrow data mode.","marker":"[49]"},{"why":"Explains passive-mixer transparency and baseband impedance mapping, the basis for the 4-path mixer-first front-end.","marker":"[56]"},{"why":"Gives the IF frequency planning formula that selects 1.035 MHz as the target intermediate frequency.","marker":"[61]"}],"fun_headline_variants":["Crystal-less A-IoT receiver locks to carrier","A-IoT Rx: crystal-less, carrier-locked, -88 dBm","Zero-crystal A-IoT receiver senses -88 dBm","Carrier-auxiliary LO locks A-IoT Rx without crystal","A-IoT receiver drops crystal, locks to carrier"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The stated sensitivity and crystal-free operation rest on the fabricated calibration loop actually locking and holding the IF at $1.035$ MHz with small residual error, and on the measured front-end noise figure being close to the 12 dB post-simulation value; but the paper validates the loop only through behavioral simulation and reports no measured phase noise, locked-frequency error, or end-to-end bit-error rate.","fun_headline_variants_meta":{"raw":{"variants":["Crystal-less A-IoT receiver locks to carrier","A-IoT Rx: crystal-less, carrier-locked, -88 dBm","Zero-crystal A-IoT receiver senses -88 dBm","Carrier-auxiliary LO locks A-IoT Rx without crystal","A-IoT receiver drops crystal, locks to carrier"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000746,"raw_usage":{"total_tokens":3331,"prompt_tokens":958,"completion_tokens":2373,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":574,"completion_tokens_details":{"reasoning_tokens":2286}},"tokens_in":574,"tokens_out":2373,"duration_ms":15173,"temperature":1.0,"reasoning_tokens":2286,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-16T11:36:20.589443+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Take the fabricated 55 nm chip, feed it a 900 MHz OOK carrier, and measure the down-converted IF at the VCO control node while the loop is supposed to be locked: if the IF does not settle to $1.035$ MHz within about 12 microseconds and stay within a few tens of kHz across temperature, the crystal-free claim fails. Equivalently, an end-to-end demodulation test at an input power of $-88$ dBm over a $180$ kHz channel that fails to meet the 1-10% BLER target would falsify the sensitivity claim.","supporting_citations":[{"cited_title":"Study on solutions for ambient iot (internet of things) ran (release 19),","cited_arxiv_id":null,"evidence_quote":"Defines the A-IoT device types, physical channels, the carrier-frequency-offset calibration signal, and clock requirements that the architecture is built around."},{"cited_title":"Carrier-auxiliary if feedback crystal-less lo generator and approximate low-if receiver architecture for energy-efficient radio,","cited_arxiv_id":null,"evidence_quote":"Introduces the Class-AB crystal-less receiver concept from which the proposed carrier-auxiliary IF feedback architecture is developed."},{"cited_title":"A Fully Integrated 490-GHz CMOS Receiver Adopting Dual-Locking Receiver-Based FLL,","cited_arxiv_id":null,"evidence_quote":"Supplies the equivalence between an RF VCO plus down-conversion and an IF VCO, which underwrites the first-order frequency-loop model."},{"cited_title":"Low-power rf wake-up receivers: Analysis, tradeoffs, and design,","cited_arxiv_id":null,"evidence_quote":"Provides the analysis of uncertain-IF versus low-IF tradeoffs that motivates switching from a wide acquisition mode to a narrow data mode."},{"cited_title":"Implications of passive mixer trans- parency for impedance matching and noise figure in passive mixer- first receivers,","cited_arxiv_id":null,"evidence_quote":"Explains passive-mixer transparency and baseband impedance mapping, the basis for the 4-path mixer-first front-end."},{"cited_title":"A mixed-signal phase-domain fsk demodulator for ble single-path low-if receiver,","cited_arxiv_id":null,"evidence_quote":"Gives the IF frequency planning formula that selects 1.035 MHz as the target intermediate frequency."}],"review_version":1}