{"id":"c6aeba34-68a8-41c8-99a0-9249bb565803","arxiv_id":"2505.16445","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":5.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":4,"one_line_summary":"DAS-MP extracts macro-to-cell and cell-to-cell dataflow connections and adds area-aware and orientation fine-tuning, reporting 7.9% lower wirelength and 82.5% lower congestion overflow than RTL-MP on seven benchmarks.","lead":"The paper presents DAS-MP, a macro placement method that uses dataflow links between macros and standard-cell clusters to guide simulated annealing placement, then fine-tunes macro positions and orientations. On seven benchmark chips it reports shorter wirelength and better timing than RTL-MP, but the total runtime is about three times longer than the abstract suggests.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Reported 7.9% HPWL gain is an in-sample estimate: α/β/γ (Eq. 13) and k (Eq. 4) are tuned on the same seven benchmarks, whose selection followed 'extensive experiments'; no held-out data tests generalization.","rationale":"I read the paper as a serious EDA systems contribution: the dataflow-extraction ideas are clearly described, the ablation in Table VI supports the incremental value of each fine-tuning step, and the HPWL/timing tables are internally consistent with the stated improvement formulas. The strongest single threat to the central claim is not the method's internal logic but its external validity: the parameters that control the loss and flipping decisions, plus the benchmark set itself, were selected using the same seven designs that are then used for evaluation. The manuscript openly says the hyperparameters came from 'multiple trials across various design scales' and that benchmarks were chosen after 'extensive experiments.' Since k in Eq. 4 is never given a numeric value, the reader cannot even reproduce the loss function from the text. A 7.9% HPWL advantage could therefore be a tuned-in-sample optimum rather than a property of dataflow-aware placement in general. I do not see evidence of fabrication or deliberate cherry-picking; the concern is a standard overfitting/generalization risk, and the appropriate response is a conditional acceptance with a held-out evaluation requirement. The reader's weakest assumption already identified this exact issue, so the verdict should remain CONDITIONAL. A separate internal inconsistency, the 'less than 1.5% runtime overhead' claim contradicted by Table V's 3.12x average runtime ratio, further weakens the abstract's completeness but is not the main load-bearing issue for the quality claim.","tokens_in":23045,"tokens_out":5375,"duration_ms":43247,"concrete_test":"Freeze the published hyperparameters (α=0.55, β=0.3, γ=0.15) and one fixed value of k, then run DAS-MP and RTL-MP on at least five additional benchmarks from the same public suites (TILOS MacroPlacement testcases and OpenROAD-flow-scripts) that are not in Table II, comparing HPWL, congestion overflow, WNS, and TNS. If the average HPWL gain over RTL-MP falls clearly below 7.9% or any of the new designs regresses, the reported gains are at least partly in-sample tuning rather than a generalizable method improvement.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central quality claim depends on four free parameters: α=0.55, β=0.3, γ=0.15 in Eq. 13 and the unspecified constant k in Eq. 4. The paper states these values were 'determined based on multiple trials across various design scales' and that benchmarks were chosen after 'we run extensive experiments and end up picking seven benchmark designs.' No held-out set, cross-validation, seed variation, or error bars are reported. Eq. 4 introduces k without giving its value or how it was set, so the magnitude of cell-cluster-to-cell-cluster weights, and hence w2 in Eq. 5, is not reproducible from the paper. If α/β/γ/k were tuned to minimize HPWL and timing on exactly these designs, the average 7.9% HPWL, 82.5% overflow, 36.97% WNS, and 59.44% TNS improvements are in-sample estimates; on a new design the gains could shrink or reverse. This is the load-bearing weakness of the paper's core claim, and it is acknowledged in the manuscript itself rather than being an external assumption.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes DAS-MP, a macro placement methodology that augments a simulated-annealing-based dataflow-aware placer with additional dataflow relationships involving standard-cell clusters. Specifically, it extracts macro-to-cell, cell-to-cell, and two-hop macro-cell-cell connections, folds them into an SA loss function, and then applies two fine-tuning steps: an area-based weight feedback model intended to reduce congestion, and a dataflow-vector-based macro flipping heuristic intended to optimize macro orientation. The paper reports experiments on seven open-source designs, comparing against TMP, RTL-MP, and Hier-RTLMP, and claims average improvements of 7.9% in HPWL, 82.5% in congestion overflow, 36.97% in WNS, and 59.44% in TNS over RTL-MP, with a runtime overhead of less than 1.5%.","tokens_in":23352,"tokens_out":8584,"duration_ms":65825,"significance":"If the reported results hold, the paper makes a useful and practical contribution: it extends dataflow-aware macro placement beyond macro-to-macro relationships to include macro-cell and cell-cell dataflow, and it demonstrates that two light-weight fine-tuning mechanisms can further improve placement quality. The full-flow evaluation through routing, the ablation study in Table VI separating area-based and orientation-based fine-tuning, and the detailed connection-count statistics in Table II are strengths; the paper addresses a real gap in current macro placers and is compatible with the OpenROAD flow. The main reservations concern runtime accounting, reproducibility of the tuned weights, and the clarity of the timing/power notation, as detailed below.","major_comments":[{"comment":"The abstract's claim of 'less than a 1.5% runtime overhead' is contradicted by the paper's own Table V. The average total runtime of DAS-MP (DE+FT) is reported as 208.71 s versus 66.99 s for RTL-MP, a 3.12x increase (the text in Section VII-F says 3.21x, which is also inconsistent). The 1.38% figure in Fig. 12(a) is the fraction of DAS-MP's own total runtime spent on dataflow extraction and fine-tuning, not the overhead relative to RTL-MP. Please correct the abstract and Section VII-F, and report the end-to-end runtime ratio as a headline number instead of the share of runtime.","section":"Section VII-F and Table V"},{"comment":"The headline quality gains are in-sample estimates. The weights alpha=0.55, beta=0.3, and gamma=0.15 in Eq. 13 were 'determined based on multiple trials across various design scales,' and the seven benchmarks were selected after 'extensive experiments'; no held-out design, cross-validation, seed variation, or error bars are provided. In addition, the constant k in Eq. 4 is never given a numerical value or a selection procedure, so the two-hop weight w2 in Eq. 5 is not reproducible from the manuscript. Please add an out-of-sample evaluation (for example, leave-one-benchmark-out or a held-out design), report sensitivity of the results to alpha, beta, gamma, and k, and state the value of k.","section":"Section VII-A, Eq. 13, Eq. 4"},{"comment":"The notation for 'improvement' in the timing and power table is internally inconsistent. The text states that a positive 'improvement' in WNS/TNS denotes degradation, yet the 'Avg. Improv.*' row marks DAS-MP (DE+FT) as 36.97% and 59.44% with upward arrows while the individual rows show WNS and TNS moving toward zero, which is an improvement. The power and area entries are also labeled with downward arrows even though the accompanying text says power increases by 2.24% and area by 1.3%. Please define 'improvement' with one consistent convention, make the arrows match that convention, and recompute the average row accordingly.","section":"Section VII-E and Table IV"},{"comment":"The indirect macro-macro extraction in Algorithm 1 appears to add virtual connections for every shared cell cluster or shared cell instance, but the text in Section IV-B identifies the exclusion of clock, reset, and other common high-fanout signals as a key challenge. No filtering step is visible in Algorithm 1 or described in the surrounding text. If such signals are not excluded, the proposed indirect macro-macro connections will be created between all macros sharing these signals, and the strengths w_i in Eq. 2 will be dominated by spurious common signals. Please describe how common signals are filtered, or state explicitly that they are absent from the data structures used in Algorithm 1.","section":"Section IV-B and Algorithm 1"}],"minor_comments":[{"comment":"The text says 'wx is a weight factor defined by dataflow bit width,' but Eq. 1 uses w0 and w1; please make the notation consistent.","section":"Eq. 1"},{"comment":"The column headers for the two DAS-MP (DE+FT) subcolumns are ambiguous; please label them as 'optimized M-C-C extraction' and 'total with flipping,' and use a single consistent multiplier in the average row (3.12x, not 3.21x).","section":"Table V"},{"comment":"The transition from loss = w1*w2 in Eq. 6 to loss = sqrt(w1*w2)/A' in Eq. 8 is not motivated; a sentence explaining the role of the square root would improve reproducibility.","section":"Section VI-A, Eq. 6 and Eq. 8"},{"comment":"Table II reports counts of unique connections but no run-to-run variation for the SA-based placement; please state the number of seeds or the variance of the HPWL results reported in Tables III and IV.","section":"Section VII-B"}],"recommendation":"major_revision","confidential_remarks":"The manuscript extends the authors' prior publications [11] and [34], and a substantial part of the 'DAS-MP (DE)' baseline is credited to [11]. The contribution statement should more clearly separate what is new in this paper from those earlier works. In addition, the evaluation benchmarks are the same designs used to tune the hyperparameters, which makes the headline 7.9% HPWL improvement vulnerable to a reviewer reading it as an in-sample result; I would ask the authors to address this explicitly with a held-out analysis or a clearly framed limitation."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Quick take: this is a credible incremental EDA systems paper, but read the claims with a grain of salt. The genuinely new material is the area-aware weight feedback and the combination of it with orientation flipping on top of the authors' earlier dataflow extraction. The ablation is the most useful part: it separates the area term from the flipping term and shows each contributes a few percent of HPWL and modest timing/congestion gains, so the direction is plausible.\n\nWhat it does well: the evaluation goes through full P&R, compares against three placers, and reports HPWL, congestion overflow, WNS/TNS, power, area, and runtime breakdown. The tables are internally consistent. The idea of incorporating macro-cell and cell-cell dataflow into macro placement is from their DATE 2024 paper, but the area feedback that couples one-hop and two-hop weights with normalized macro area is a reasonable engineering addition. The flipping step is from their ISEDA 2025 paper, so the aggregate system is new even if the components are not.\n\nSoft spots, in order of importance. First, the runtime claim is contradicted by the paper's own Table V: the abstract says \"less than 1.5% runtime overhead,\" but DAS-MP (DE+FT) average total runtime is 3.12x RTL-MP. The 1.5% corresponds to the fraction of DAS-MP's own total runtime spent in extraction and fine-tuning, not the overhead relative to the baseline. That needs to be fixed.\n\nSecond, the central quality numbers are in-sample. Alpha=0.55, beta=0.3, gamma=0.15 in Eq. 13 and the constant k in Eq. 4 were set by trials on the same seven benchmarks, and benchmark selection itself followed \"extensive experiments.\" There is no held-out set, no cross-validation, no error bars. The gains could shrink on new designs; the ablation suggests the direction is probably right, but the 7.9% HPWL and 82.5% overflow reductions are best treated as upper bounds.\n\nThird, Eq. 4 defines w_j with an unspecified k, so the paper is not reproducible on that point. Minor: no released code, no seed variation for the SA, and the baselines do not include a stronger recent placer.\n\nOverall: this is a solid engineering paper that deserves a serious referee. The core idea holds up, but the runtime statement must be corrected and the tuning overfitting disclosed or mitigated by held-out experiments. I'd take it for review, not desk-reject.","headline":"Solid incremental EDA paper, but the headline gains are in-sample and the abstract's runtime claim is contradicted by its own Table V.","tokens_in":23882,"tokens_out":3022,"would_cite":true,"duration_ms":25288,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"DAS-MP claims that hidden dataflow between macros and standard-cell clusters, plus area- and orientation-aware fine-tuning, improves macro placement quality.","keywords":["macro placement","dataflow awareness","floorplanning","half-perimeter wirelength","congestion optimization","simulated annealing","standard cell clusters","macro orientation flipping"],"falsifier":"Run DAS-MP with the published hyperparameters on macro-heavy designs not used in tuning and compare HPWL, congestion overflow, and post-route WNS/TNS against the baseline dataflow-aware macro placer; if the average 7.9% HPWL improvement fails to reproduce or reverses on several of those designs, the reported gains are at least partly overfit to the benchmark suite.","tokens_in":22858,"feed_emoji":"📐","tokens_out":9363,"duration_ms":64618,"temperature":0.7,"pith_summary":"DAS-MP is a macro placement method whose central claim is that the dataflow connections between macros and standard-cell clusters are a largely untapped source of placement quality. The paper argues that previous dataflow-aware placers considered only direct macro-to-macro links and therefore missed constraints that standard-cell clusters impose on macro positions. DAS-MP extracts direct and indirect macro-macro connections, one-hop macro-cell connections, and two-hop macro-cell-cell connections, folds them into a weighted half-perimeter wirelength (HPWL) loss for simulated annealing, and then refines the placement with area-aware weighting and dataflow-directed macro flipping. On seven benchmark designs, the paper reports 7.9% average HPWL improvement, 82.5% lower congestion overflow, and post-route timing gains of 36.97% in worst negative slack and 59.44% in total negative slack over the baseline dataflow-aware macro placer, at under 1.5% runtime overhead. If true, this makes enhanced dataflow awareness a cheap and effective complement to existing macro placers.","feed_headline":"Macro placer cuts wirelength 7.9% by tracking dataflow through cells","feed_subtitle":"Standard-cell clusters become placement constraints, plus area- and orientation-aware fine-tuning, beating a dataflow-aware baseline.","key_machinery":"The load-bearing object is a weighted, directed dataflow graph whose nodes are macro clusters and standard-cell clusters, with edge weights derived from connection bit width and, for cell-cluster-to-cell-cluster edges, the product of a constant $k$, bit width, cluster area, and cluster instance count. This graph feeds a simulated-annealing loss with three HPWL terms, $\\mathrm{WL}_{m-m}$, $\\mathrm{WL}_{m-c}$, and $\\mathrm{WL}_{m-c-c}$, where the two-hop term is refined by a backward-feedback weight and a normalized macro-area divisor. The orientation fine-tuning step projects three vector types, $V_{\\mathrm{mm}}$, $V_{\\mathrm{mc}}$, and $V_{\\mathrm{mcc}}$, onto x and y axes with weights $\\alpha=0.55$, $\\beta=0.3$, and $\\gamma=0.15$, then flips each macro in the direction of larger total projection.","core_discovery":"The paper's central claim, stated on its own terms, is that macro placement quality can be improved substantially by treating hidden dataflow relationships between macros and standard-cell clusters, and among cell clusters themselves, as explicit placement constraints. The proposed DAS-MP pipeline first performs threshold-limited hierarchical clustering, then extracts four types of connections: one-hop direct macro-macro connections, one-hop indirect macro-macro connections through shared cell clusters, one-hop macro-cell connections, and two-hop macro-cell-cell connections. These connections are assigned weights based on bit width, cluster area, and instance count, and are combined into the simulated-annealing loss as three HPWL terms for macro-macro, macro-cell, and macro-cell-cell flows. Two fine-tuning steps follow: a backward-feedback model scales the two-hop weight by the one-hop weight and by normalized macro area so that larger macros are pushed toward boundaries while smaller macros stay near their cell clusters, and a dataflow-vector decomposition decides each macro's orientation by projecting macro-macro, macro-cell, and macro-cell-cell vectors onto the x and y axes and flipping in the dominant direction. The paper's experiments show that this complete pipeline beats the baseline on HPWL, congestion, and post-route timing across all seven tested designs.","pith_inferences":["Beyond the paper's claims, the alpha/beta/gamma weights and the constant k were selected by trials on the same seven benchmarks, so a held-out test is the natural next check of whether the improvements transfer.","The extracted macro-cell and cell-cell connections could also be exported as fence or guide constraints to downstream standard-cell placement, potentially improving the rest of the P&R flow rather than only the macro layer.","The dataflow-vector flipping rule acts like a principal-component alignment; it might be extended to weight timing-critical connections more heavily, trading some wirelength for slack improvements.","If the gains hold across diverse designs, dataflow extraction of this kind could become a standard preprocessing step for both analytical and RL-based macro placers, not just SA-based ones."],"forward_implications":["Standard-cell-aware dataflow can be added to an SA macro placer without retraining, improving HPWL and congestion at the same time.","The common practice of pushing macros to chip boundaries is not always optimal; dataflow intensity can justify interior macro locations.","Dataflow direction can be converted automatically into macro orientation decisions, so orientation need not be a manual or brute-force step.","Two-hop cell-cell connections carry enough placement-relevant information to influence macro placement, beyond one-hop macro-cell links.","Because the added extraction and fine-tuning runtime stays below 1.5% of the total macro placement time, the method is cheap enough for iterative physical design flows."],"supporting_citations":[{"why":"Supplies the baseline dataflow-aware macro placer and its hierarchical clustering and simulated-annealing setup, which DAS-MP extends and outperforms.","marker":"[8]"},{"why":"Prior work on extracting macro-cell and cell-cell dataflow connections; DAS-MP's dataflow extraction stage is built on it.","marker":"[11]"},{"why":"State-of-the-art hierarchical macro placer used as a comparison baseline in the experiments.","marker":"[10]"},{"why":"Default macro placer in the flow, used as another comparison baseline for HPWL and congestion.","marker":"[38]"},{"why":"Simulated annealing algorithm that carries the placement optimization in DAS-MP.","marker":"[32]"},{"why":"Sequence-pair representation used to encode macro placements during simulated annealing.","marker":"[33]"},{"why":"Prior work on dataflow-driven macro flipping that motivates the orientation fine-tuning step.","marker":"[34]"}],"fun_headline_variants":["DAS-MP: Dataflow through cells cuts wirelength 7.9%, overflow 82.5%","Cell-aware dataflow cuts macro wirelength 7.9%, overflow 82.5%","Hidden cell links guide macros to 7.9% wirelength cut","Macro placer flips by dataflow to cut wirelength and congestion","DAS-MP uses cell-cluster dataflow to slash wirelength 7.9%"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The numerical weights $\\alpha=0.55$, $\\beta=0.3$, $\\gamma=0.15$ and the constant $k$ in the cell-cluster edge weight were tuned on the same seven benchmarks, and the reported gains assume these values transfer to unseen designs.","fun_headline_variants_meta":{"raw":{"variants":["DAS-MP: Dataflow through cells cuts wirelength 7.9%, overflow 82.5%","Cell-aware dataflow cuts macro wirelength 7.9%, overflow 82.5%","Hidden cell links guide macros to 7.9% wirelength cut","Macro placer flips by dataflow to cut wirelength and congestion","DAS-MP uses cell-cluster dataflow to slash wirelength 7.9%"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.003056,"raw_usage":{"total_tokens":11657,"prompt_tokens":1107,"completion_tokens":10550,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":723,"completion_tokens_details":{"reasoning_tokens":10434}},"tokens_in":723,"tokens_out":10550,"duration_ms":59209,"temperature":1.0,"reasoning_tokens":10434,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-07T15:00:44.045446+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Run DAS-MP with the published hyperparameters on macro-heavy designs not used in tuning and compare HPWL, congestion overflow, and post-route WNS/TNS against the baseline dataflow-aware macro placer; if the average 7.9% HPWL improvement fails to reproduce or reverses on several of those designs, the reported gains are at least partly overfit to the benchmark suite.","supporting_citations":[{"cited_title":"Rtl-mp: toward practical, human-quality chip planning and macro placement,","cited_arxiv_id":null,"evidence_quote":"Supplies the baseline dataflow-aware macro placer and its hierarchical clustering and simulated-annealing setup, which DAS-MP extends and outperforms."},{"cited_title":"Standard cells do matter: Uncovering hidden connections for high-quality macro placement,","cited_arxiv_id":null,"evidence_quote":"Prior work on extracting macro-cell and cell-cell dataflow connections; DAS-MP's dataflow extraction stage is built on it."},{"cited_title":"Hier-rtlmp: A hierarchical automatic macro placer for large-scale complex ip blocks,","cited_arxiv_id":null,"evidence_quote":"State-of-the-art hierarchical macro placer used as a comparison baseline in the experiments."},{"cited_title":"Triton macro placer (tmp),","cited_arxiv_id":null,"evidence_quote":"Default macro placer in the flow, used as another comparison baseline for HPWL and congestion."},{"cited_title":"Optimization by simulated annealing,","cited_arxiv_id":null,"evidence_quote":"Simulated annealing algorithm that carries the placement optimization in DAS-MP."},{"cited_title":"Vlsi module placement based on rectangle-packing by the sequence-pair,","cited_arxiv_id":null,"evidence_quote":"Sequence-pair representation used to encode macro placements during simulated annealing."},{"cited_title":"Incredflip: Incre- mental dataflow-driven macro flipping for efficient macro placement refinement,","cited_arxiv_id":null,"evidence_quote":"Prior work on dataflow-driven macro flipping that motivates the orientation fine-tuning step."}],"review_version":1}