{"id":"5da26a2c-f6ce-4bf7-8930-8799a59f23d7","arxiv_id":"2506.01643","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":4.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"A prototype MAPS with large elongated pixels and column-drain readout passed electrical and laser tests, and is projected by simulation to run at 55.7 mW/cm2 at full scale.","lead":"This paper reports a first test chip for a silicon pixel detector that could sit at the heart of the proposed Super Tau-Charm Facility collider. The chip is designed to use very little power so the tracker can stay light enough to measure low-momentum particles cleanly.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The suitability claim overreaches on timing: the only timing number in the paper is a simulated >320 ns time walk for Sensor B (Sec. 3.1), well above the 50 ns STCF requirement, and no measured timing resolution appears in Sec. 4.","rationale":"I read the paper as claiming a complete low-power MAPS candidate for STCF ITK, with power, efficiency, and timing as coupled requirements. Post-layout PrimeTime PX power scaling to 2x2 cm is the reader's weakest assumption, and it is legitimate: no fabricated full-scale chip exists. However, signoff power simulation is standard practice and the prototype provides real silicon, so I would not hang the verdict on that alone. The timing gap is sharper: the paper itself gives a simulated time walk (Sec. 3.1) that exceeds the stated initial spec by a factor of ~6, and Section 4 reports no timing measurement. If ToT correction closes the gap, the authors can show it; without it, the conclusion overstates suitability. The reader's conditional verdict already lists timing as a reservation, so my concern does not change the verdict; I would keep CONDITIONAL rather than accept as-is. The power-scaling caveat remains a secondary issue worth noting in the final report.","tokens_in":6549,"tokens_out":8316,"duration_ms":85634,"concrete_test":"Perform a laser-triggered timing scan on the fabricated chip at the calibrated ~1 MIP intensity: record leading-edge ToA and ToT for many hits across both sensor types and over a range of laser intensities; construct a time-walk-vs-ToT correction from the data and compute the corrected timing resolution (sigma of corrected ToA) at the STCF operating threshold. If the corrected resolution does not meet 50 ns (and ideally approach 20 ns) for both Sensor B and Sensor D, the suitability claim must be narrowed to exclude timing.","verdict_should_be":"UNCHANGED","load_bearing_attack":"Section 1 specifies that STCF ITK timing resolution must be at least 50 ns initially, with a 20 ns goal, to mitigate pileup. The conclusion states the prototype sensors are 'validated suitability for the target application,' and the abstract foregrounds 'required spatial and timing resolutions.' Yet Section 4 contains no timing measurement at all. The only timing quantity reported anywhere is in Section 3.1: a simulated time walk of less than 320 ns for Sensor B, which is more than six times the initial 50 ns requirement. The ToA circuit has an LSB of 50 ns, but LSB is a bin size, not a resolution; jitter, threshold dispersion, and time walk all contribute to the measured ToA. The ToT output is mentioned as available but no ToT calibration, time-walk correction curve, or corrected timing distribution is shown. The laser test uses a 'specified time window' for valid detection, but never quantifies the width or the resulting timing precision. Therefore, for the central claim of satisfying STCF ITK requirements, the timing condition is the least secure: it is not demonstrated, and the one simulated timing figure is, on its face, incompatible with the uncorrected 50 ns target. This is a missing-evidence gap, not a demonstrated failure, but it is load-bearing because the design motivation and the suitability claim explicitly include timing.","agreement_with_reader":"partial"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper reports the design and preliminary characterization of CharTPix-TJ-v0.1, a monolithic active pixel sensor prototype for the STCF inner tracker. To reduce the power cost of timestamp distribution, the design uses laterally extended collection electrodes (active-connect and metal-connect sensor variants, B and D) with a column-drain readout. The paper presents TCAD-based sensor simulations, a front-end architecture derived from ALPIDE with ToA/ToT capability, and a full-scale power projection of 55.7 mW/cm2 obtained by scaling the prototype design to 2 cm x 2 cm in a PrimeTime PX simulation. Measured results include threshold and ENC distributions from charge-injection tests and infrared-laser efficiency maps, with the claim of >99.9% detection efficiency at approximately 1 MIP for both sensor types. The conclusion states that the prototype's performance validates its suitability for the STCF ITK.","tokens_in":6861,"tokens_out":4024,"duration_ms":43424,"significance":"If the reported results hold, the large-pixel MAPS architecture is a credible route toward the STCF ITK requirements of <100 mW/cm2 power and 50 ns timing resolution. The paper's strengths are that it presents a fabricated prototype, includes both electrical and laser-based measurements, and gives a transparent power breakdown with a specific simulation tool. The main significance lies in the architectural idea of reducing the number of columns by increasing pixel pitch in one direction, which is well motivated and quantified in the timestamp-distribution power formula. However, the central power claim is a simulation projection, and the timing performance—one of the two stated requirements—is not measured at all. The efficiency measurement at ~1 MIP is also reported without the corresponding map or uncertainty statement. These gaps prevent the paper from fully supporting the suitability claim, but they are addressable in revision.","major_comments":[{"comment":"The paper claims in the abstract that the design meets the 'required spatial and timing resolutions' and in the conclusion that the sensors are 'validated suitability for the target application,' yet no timing measurement appears anywhere in Section 4. The only timing quantity reported in the paper is a simulated time walk of less than 320 ns for Sensor B (Section 3.1), which is more than six times the initial 50 ns STCF timing requirement stated in Section 1. The ToA LSB of 50 ns is a bin size, not a resolution; jitter, threshold dispersion, and time walk all contribute. The laser test in Section 4.2 uses a 'specified time window' for valid detection, but the window width is never quantified. This is a load-bearing missing-evidence gap for the suitability claim and must either be filled with measured timing data or the claim must be explicitly softened to exclude timing.","section":"Section 4 and Section 3.1"},{"comment":"The quoted Sensor B performance numbers—mean threshold 312 e-, threshold dispersion 16.5 e-, and average ENC 17.9 e-—are computed from even-numbered columns only. The full-array threshold distribution shown in Figure 5(a) is bimodal with mean 430 e- and standard deviation 137 e-. The odd-even inconsistency is attributed to parasitic coupling of the PULSE injection signal and is said to be validated by the laser test, but the text does not report the even/odd separated statistics or the full-array values alongside the even-column values. Since the conclusion directly compares Sensor B and Sensor D using these numbers, the manuscript should report both the full-array and the selected-column values, and the conclusion should carry the qualification that the Sensor B figures are for a subset of columns.","section":"Section 4.1, Figures 5(a) and 6(a)"},{"comment":"The headline full-scale power consumption of 55.7 mW/cm2 is a simulation extrapolation, not a measurement. Section 3.2 states that the analysis was performed 'under the hypothesis of scaling the prototype design to a dimension of 2 cm x 2 cm' using PrimeTime PX on a placed-and-routed peripheral circuit. No measured power consumption of the prototype is reported. The scaling assumption—that the post-layout simulation of a scaled prototype predicts the power of a real full-size chip—is load-bearing for the central low-power claim. The abstract and conclusion should clearly label this as a simulation-based projection, and any measured prototype power should be reported for comparison.","section":"Section 3.2 and Abstract"},{"comment":"The efficiency claim of 'average charge collection efficiency exceeding 99.9%' at approximately 1 MIP is stated in the text and conclusion, but the efficiency maps shown in Figure 7 correspond to a laser intensity calibrated to 600 e- (<0.4 MIP), not to the 1600 e- (~1 MIP) level. No map or numerical distribution at 1600 e- is provided. In addition, the calibration of laser intensity to 600 e- and 1600 e- uses the threshold extracted from the same S-curve measurement, making the charge scale self-referential. Please provide the 1600 e- efficiency maps, the number of laser pulses per point, and the statistical uncertainty on the 99.9% value.","section":"Section 4.2 and Figure 7"}],"minor_comments":[{"comment":"There are typos: 'extremly' should be 'extremely' and 'effciency' should be 'efficiency' in Section 4.2.","section":"Section 1"},{"comment":"The simulated threshold (314 e-) and ENC (11 e-) for Sensor B are presented without comparison to the measured values in the same section; a small table comparing simulation and measurement for both sensors would improve clarity.","section":"Section 3.1"},{"comment":"The term 'specified time window' is used to define a valid detection, but its width is never given. Please state the window and, ideally, relate it to the 50 ns timing target.","section":"Section 4.2"},{"comment":"The histograms in Figure 5 are labeled 'Calibrated,' but the calibration procedure (injection capacitance value, number of pixels, and fit function) is not described in the text; a brief description would help reproducibility.","section":"Figure 5"}],"recommendation":"major_revision","confidential_remarks":"This is a preliminary prototype report, and the simulation-only nature of the power claim may be acceptable for a detector-development journal if clearly framed. The more serious issue for the suitability claim is the complete absence of measured timing performance; the one simulated time-walk figure is incompatible with the uncorrected 50 ns target. If timing data cannot be added, the authors should explicitly limit their conclusion to detection efficiency and power projections, not 'validated suitability' in full."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Honest take: this is a real prototype paper with a clever idea, and the measurements are genuine, but the authors push the conclusion past what the data support. The headline claim of meeting STCF timing is unbacked: there is no measured timing resolution in Section 4, and the only simulated time-walk figure for Sensor B is <320 ns, which is over six times the initial 50 ns spec. That number is not even discussed in the conclusion. So treat this as a promising architecture study, not a validated solution.\n\nWhat's genuinely new: the lateral electrode extension (active-connect) and metal-connect variants, with pixel dimensions 31x170 um, explicitly aimed at cutting the timestamp distribution power by reducing column count. The chip shows working electrical readout, clean threshold distributions (Sensor D looks good: 319e- mean, 10.8e- dispersion), and laser efficiency maps that favor the active-connect sensor, matching TCAD expectations. They also honestly report and diagnose the odd-even threshold issue in Sensor B via injection crosstalk. The power simulation is clearly labeled as a 2x2 cm2 scaling hypothesis using PrimeTime PX, not a fabricated-chip measurement.\n\nSoft spots: timing is the big one. The ToA LSB of 50 ns is just bin size; they don't report jitter, threshold dispersion effect, time-walk correction, or any measured ToA resolution. The laser test uses a 'specified time window' but never quantifies it. If the timing spec is load-bearing for STCF, this paper does not demonstrate it. Also, Sensor B's headline numbers (312e- threshold, 17.9e- ENC) are computed on even-numbered columns only after the full array shows a bimodal distribution with a 430e- mean; the conclusion repeats the even-only numbers without the caveat. That's a minor honesty slip, not a fatal flaw. The laser calibration is self-referential but standard.\n\nWho's it for: people working on MAPS for STCF or similar low-material inner trackers. It deserves a serious referee despite the gaps, because the silicon exists and the sensor comparison is useful. The authors should either measure timing or soften the suitability claim to 'preliminary feasibility.' I'd send it to review, and I'd cite the sensor design comparison.","headline":"Genuine MAPS prototype with a smart low-power readout idea, but the suitability claim overreaches: timing is never measured and the simulated time walk exceeds the spec.","tokens_in":7413,"tokens_out":2971,"would_cite":true,"duration_ms":29036,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"Large-pixel MAPS prototype reports 55.7 mW/cm2 and >99.9% detection efficiency for the STCF inner tracker.","keywords":["STCF","MAPS","pixel readout circuit","low power consumption","monolithic active pixel sensor","inner tracker","timestamp distribution","large pixel sensor"],"falsifier":"Fabricate a 2 cm by 2 cm version of this architecture and measure its average power draw at the design hit rate: if it exceeds 100 mW/cm2, the paper's central low-power claim is disproved. Independently, a beam test with real minimum-ionizing particles scanning the full pixel surface would check whether detection efficiency stays above 99.9% outside the laser spot, especially at corners.","tokens_in":6330,"feed_emoji":"⚡","tokens_out":5522,"duration_ms":50848,"temperature":0.7,"pith_summary":"This paper argues that a monolithic active pixel sensor (MAPS) with deliberately stretched pixel electrodes can satisfy the two hardest requirements of the proposed Super Tau-Charm Facility (STCF) inner tracker: staying below the 100 mW/cm2 power budget while adding 50 ns timing information. The design cuts power not by shrinking circuits but by enlarging the pixels, which reduces the number of readout columns and therefore the dominant timestamp-distribution power. Simulations scaled to a full 2 cm by 2 cm chip give 55.7 mW/cm2, and prototype laser tests at about 1 MIP show detection efficiency above 99.9% for both sensor variants. A sympathetic reader would take the paper as showing that a large-pixel MAPS architecture is a credible candidate for the STCF ITK, provided the scaled power figure holds in real silicon.","feed_headline":"Wide-pixel MAPS hits 55.7 mW/cm2, under tracker's power limit","feed_subtitle":"Stretched pixel electrodes slash timestamp-distribution power; laser tests show >99.9% efficiency at ~1 MIP.","key_machinery":"The load-bearing mechanism is the large-pixel 'column-drain' readout architecture. Pixel pitch is 31 µm by 170 µm, with the wide dimension along the row, so timestamp distribution power, which scales as $F_{clk} \\cdot N_{col} \\cdot C_{par} \\cdot V_{DD}^2$, is reduced by cutting the number of columns $N_{col}$. Each pixel integrates an open-loop front-end (derived from ALPIDE, with a MALTA2-style cascode for the larger input capacitance) and priority readout logic that transfers only hit pixels' leading-edge and trailing-edge timestamps to the periphery at 10 MHz per column. The peripheral circuit handles timestamp correction, aggregation, framing, 8b/10b encoding, and serialization, with the full-scale power simulation done in PrimeTime PX after place-and-route.","core_discovery":"On the paper's own terms, the central discovery is that extending the sensor electrode laterally to 70-140 µm and connecting it either actively (stretched n-well) or by metal jumpers reduces the number of pixel columns per unit width enough to cut timestamp-distribution power from roughly 80 mW/cm2 (the reference small-pixel design) to 12.2 mW/cm2, giving a total simulated full-scale power of 55.7 mW/cm2. The active-connect Sensor D combines this low power with a fast charge collection (about 35 ns in the worst corner case), a uniform threshold of 319e- with 10.8e- dispersion, and laser-verified detection efficiency above 99.9% at an injected charge of 1600 e- (about 1 MIP). The paper frames this as validating the large-pixel approach for the STCF inner tracker.","pith_inferences":["I would not treat the 55.7 mW/cm2 as a measured property until a full-scale chip is built and powered; the figure comes from scaling the prototype's post-layout simulation, so a real 2x2 cm2 chip could exceed the limit if clock distribution or IR-drop effects were underestimated.","The laser test is a proxy for ionizing particles, not a beam test; a real minimum-ionizing-particle beam could reveal edge or corner inefficiencies that the focused infrared spot misses.","The large-pixel trade deliberately gives up spatial resolution (170 µm pitch) in exchange for power; that is fine for STCF's relaxed 100 µm requirement, but the same design would not transfer to a vertex detector needing fine position.","Reaching the 20 ns timing goal would likely require a higher timestamp clock or a different distribution scheme, which would push power back up; the paper only demonstrates the 50 ns LSB."],"forward_implications":["If the scaled power simulation is accurate, a full 2x2 cm2 STCF ITK sensor would run at 55.7 mW/cm2, leaving margin under the 100 mW/cm2 cooling limit and enabling a lower material budget.","The 50 ns timestamp LSB meets the initial STCF timing requirement, so the same chip can provide time-of-arrival and time-over-threshold for pileup mitigation without a separate timing layer.","The two 800 Mbps LVDS links support event rates up to 8.7 MHz/cm2, more than ten times the innermost layer's average rate, so the readout will not be the bottleneck.","Sensor D (active-connect) appears preferable to Sensor B (metal-connect): similar power, faster charge collection, more uniform thresholds, and smaller efficiency loss at pixel edges."],"supporting_citations":[{"why":"Defines the STCF detector requirements (luminosity, material budget, detection efficiency) that motivate the MAPS design.","marker":"[1]"},{"why":"Provides the innermost-layer hit rate, TID, and NIEL environment used as the rate and radiation targets.","marker":"[2]"},{"why":"Supplies the reference design (TJ-Monopix2) whose 80 mW/cm2 timestamp-distribution power is the baseline the large-pixel approach reduces.","marker":"[3]"},{"why":"Source of the open-loop front-end circuit architecture that the pixel front-end adapts.","marker":"[4]"},{"why":"Source of the cascode transistor addition that lets the front-end handle the larger sensor capacitance.","marker":"[5]"},{"why":"Origin of the 'column-drain' readout protocol used to transfer only hit-pixel data to the periphery.","marker":"[6]"}],"fun_headline_variants":["Stretched-pixel MAPS cuts power to 55.7 mW/cm2 for STCF","Wide-pixel MAPS prototype: 55.7 mW/cm2, >99.9% efficiency","Large-pixel MAPS for STCF: 55.7 mW/cm2 total power","Sensor D: wide pixels, 55.7 mW/cm2, >99.9% efficiency for STCF","MAPS with stretched electrodes: 55.7 mW/cm2 for STCF ITK"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The full-scale power claim assumes that scaling the prototype's post-layout power simulation to a 2 cm by 2 cm chip, using PrimeTime PX, predicts the power of a real fabricated device; no full-scale silicon or direct power measurement is presented.","fun_headline_variants_meta":{"raw":{"variants":["Stretched-pixel MAPS cuts power to 55.7 mW/cm2 for STCF","Wide-pixel MAPS prototype: 55.7 mW/cm2, >99.9% efficiency","Large-pixel MAPS for STCF: 55.7 mW/cm2 total power","Sensor D: wide pixels, 55.7 mW/cm2, >99.9% efficiency for STCF","MAPS with stretched electrodes: 55.7 mW/cm2 for STCF ITK"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000721,"raw_usage":{"total_tokens":3250,"prompt_tokens":973,"completion_tokens":2277,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":589,"completion_tokens_details":{"reasoning_tokens":2146}},"tokens_in":589,"tokens_out":2277,"duration_ms":17298,"temperature":1.0,"reasoning_tokens":2146,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-07T11:36:45.403573+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Fabricate a 2 cm by 2 cm version of this architecture and measure its average power draw at the design hit rate: if it exceeds 100 mW/cm2, the paper's central low-power claim is disproved. Independently, a beam test with real minimum-ionizing particles scanning the full pixel surface would check whether detection efficiency stays above 99.9% outside the laser spot, especially at corners.","supporting_citations":[{"cited_title":"Achasov , author X","cited_arxiv_id":null,"evidence_quote":"Provides the innermost-layer hit rate, TID, and NIEL environment used as the rate and radiation targets."},{"cited_title":"Fang , author Y","cited_arxiv_id":null,"evidence_quote":"Supplies the reference design (TJ-Monopix2) whose 80 mW/cm2 timestamp-distribution power is the baseline the large-pixel approach reduces."},{"cited_title":"Moustakas , title Design and development of depleted monolithic active pixel sensors with small collection electrode for high-radiation applications , Ph.D","cited_arxiv_id":null,"evidence_quote":"Source of the open-loop front-end circuit architecture that the pixel front-end adapts."},{"cited_title":"Kim , author G","cited_arxiv_id":null,"evidence_quote":"Source of the cascode transistor addition that lets the front-end handle the larger sensor capacitance."}],"review_version":1}