{"id":"7483ce0c-008f-4440-a20e-e1e2e826ba9a","arxiv_id":"2506.18041","paper_version":1,"verdict":"REJECT","confidence":"MODERATE","novelty_score":5.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"A 2-weight photonic microring weight bank is trained online with multiplexed gradient descent, achieving adaptive classification, although the training loop relies on digital FPGA computation.","lead":"This paper reports a silicon photonic chip whose microring-resonator weights are trained in real time with a perturbative algorithm called multiplexed gradient descent. The authors claim fully analog, end-to-end online learning, but the loss function and nonlinearity are actually computed on a digital FPGA, weakening the central claim.","discovery_kind":"new_application","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The paper's own Methods contradict its central 'fully analog' claim: the loss is computed digitally on an RFSoC FPGA after ADC sampling, and the nonlinearity is programmed on the FPGA.","rationale":"The reader's weakest assumption correctly identifies that the claimed 'fully analog' training is contradicted by the Methods. The paper's own text states that the RFSoC FPGA is used to modulate inputs and measure outputs, including ADC sampling of photodetector signals, and that the nonlinearity is programmed on the FPGA. These are digital operations. The load-bearing concern is exactly that the training loop and the nonlinear activation are not fully analog, which directly undermines the central claim. The paper does contain a real experimental demonstration of a multiplexed gradient descent approach on a photonic weight bank, but the experiments are computer-in-the-loop, and the 'fully analog' label is an overstatement. A more modest claim about in-situ training with digital assistance could be supported, but as written the central claim is not. Therefore, the reader's REJECT verdict remains appropriate; no further adjustment is needed.","tokens_in":14392,"tokens_out":4096,"duration_ms":43581,"concrete_test":"Inspect the RFSoC FPGA firmware and the host control code to verify whether the loss is computed in digital logic from the ADC samples and whether the weight-update signals sent to the SMUs are generated digitally. If the loss and gradient are computed in software/firmware after ADC, the central 'fully analog' claim fails.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The paper's central claim is 'fully analog end-to-end online training' with 'the entire training pipeline remains within the analog domain' (Section 2). The experimental setup in Section 6.2 explicitly uses an RFSoC FPGA to modulate inputs and measure outputs, with ADCs sampling the photodetector signals. The loss function is computed after these digital samples, and the gradient is obtained by subtracting perturbed and unperturbed loss values in the digital domain. Furthermore, the nonlinear classification experiment 'programs' the quadratic nonlinearity on the RFSoC FPGA (Section 3.1), so the activation is not performed by the photonic hardware. The weights are also controlled by external SMUs (Keithley 2606B), meaning the weight updates are generated off-chip and applied via digital-to-analog conversion. Thus the training pipeline is a computer-in-the-loop with a fast FPGA, not a fully analog system. This is not a matter of interpretation: the Methods explicitly describe digital loss computation. Without analog loss measurement and local weight update, the headline capability is unsupported.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The manuscript reports a silicon photonic integrated circuit with a microring-resonator weight bank and balanced photodetectors, trained online by multiplexed gradient descent. The authors claim fully analog end-to-end training, demonstrating linear and nonlinear classification, online tracking of a rotating decision boundary, and real-time adaptation to temperature and crosstalk. A simulation of a 4-30-3 network on the Yin-Yang dataset is presented to support scalability.","tokens_in":14579,"tokens_out":4976,"duration_ms":51779,"significance":"The experimental system is a useful testbed: it is a foundry-manufactured chip with integrated MRR weights and balanced photodetectors, and the demonstrations that a perturbative weight-update rule can track a slowly rotating decision boundary and recover from temperature and crosstalk perturbations are concrete and potentially valuable. However, the headline claims of fully analog, end-to-end, on-chip training and on-chip nonlinearity are not supported by the Methods, so the significance of the work as presented is substantially lower than claimed. The paper would need to be reframed as a hybrid electronic-photonic system with an FPGA in the training loop, and even then the novelty relative to prior computer-in-the-loop perturbative training should be assessed.","major_comments":[{"comment":"The central claim that the entire training pipeline remains in the analog domain is contradicted by the experimental description. Section 6.2 states that the RFSoC FPGA modulates inputs and measures outputs, that the baseline loss is first measured, then after perturbing the weights the loss is measured again, and the difference is used as the gradient; this requires digital storage and subtraction of the sampled loss values. Section 2 also states that the weights are controlled by SMUs that communicate with the RFSoC FPGA, so weight updates are not generated or applied locally on the photonic chip. The abstract's 'fully analog end-to-end training' and the statement in §2 that 'the entire training pipeline remains within the analog domain' are therefore unsupported.","section":"§2 and §6.2"},{"comment":"The nonlinear classification experiment does not demonstrate a photonic nonlinearity. The text says the quadratic nonlinearity was 'programmed on the RFSoC FPGA,' and Fig. 2(a)'s vision of microring-modulator-based nonlinear activation is not the implemented setup. Consequently, the paper does not show end-to-end analog training with an on-chip nonlinearity; it shows a linear optical weighting operation followed by a digital nonlinearity.","section":"§3.1"},{"comment":"The scalability simulation uses a ReLU nonlinearity that 'can be realized by appropriately biasing the microring modulator neurons' (Ref. [48]) but was not experimentally validated in this paper. Because the only experimental nonlinearity was digital, the simulation does not demonstrate that the fabricated hardware scales to the 4-30-3 network. The comparison with a PyTorch/ADAM baseline does not compensate for this missing experimental link.","section":"§4, Fig. 6"},{"comment":"The speed claims are not supported by the reported data. The DAC runs at 1 GBaud with 8 samples per symbol, which corresponds to a 125 Mbaud symbol rate rather than 1 GBaud; the training updates in the online-tracking demonstration occur on a timescale of hundreds of seconds with a recovery time of about 20 s; and the 16 GBaud figure used in the energy-efficiency estimate in §4 is the photodetector bandwidth, not the demonstrated operational speed. These quantitative claims should be reconciled with the experimental parameters.","section":"§2, §3.2, §4"}],"minor_comments":[{"comment":"There are several typos, including 'adaptibility' in the title, 'anolog' in the abstract, and 'in-resonantor' in §6.1; these should be corrected.","section":"Title and Abstract"},{"comment":"The conclusion reports 86.5% accuracy for online tracking, while §3.2 reports '>85% within a few epochs' and angle-specific best accuracies; the definition of the single 86.5% figure should be clarified.","section":"§3.2 and §5"},{"comment":"The 'rate of equivalent weight change' formula lacks a clear definition of t_T and the units of the reported values; please define the quantity precisely and state how it was measured.","section":"§3.3"},{"comment":"The caption says 'three different angles' while the text describes thirteen shuffled angles ranging from 15° to 255°; the caption should be made consistent with the text and with the subplot.","section":"Fig. 4 caption"},{"comment":"The statement that 'the difference between the perturbed and unperturbed loss function corresponds to the gradient' is an oversimplification of the MGD update rule; a precise equation with sign and normalization would improve reproducibility.","section":"§6.2"}],"recommendation":"reject","confidential_remarks":"The manuscript's own Methods contradict its headline claim. If the authors wish to resubmit a revised version, I would recommend a thorough reframing as a hybrid FPGA-in-the-loop system, with the 'fully analog' language removed, and a comparison with prior computer-in-the-loop photonic training work. The current version overstates its contribution and is unlikely to meet the standards of the journal."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Colleague —\n\nYou should know two things about arXiv:2506.18041. The hardware demonstration is genuine: this is the first integrated silicon photonic implementation of multiplexed gradient descent on a microring weight bank with on-chip balanced photodetectors for gradient readout, and the online tracking and temperature/crosstalk recovery experiments look plausible. But the paper's central claim—'fully analog end-to-end online training' with 'the entire training pipeline remains within the analog domain'—is contradicted by the paper's own Methods, and that gap is load-bearing, not a matter of wording.\n\nWhat the paper does well: the chip is real, the experiments are non-trivial, and the adaptation results (rotating decision boundary, temperature swings, thermal crosstalk) are worth having. The MGD algorithm itself is from McCaughan et al. [38], and citing that is appropriate; the new contribution is the hardware realization, which is a legitimate extension of an established program, not a new algorithm.\n\nWhere it falls down: Section 6.2 says the RFSoC FPGA modulates the inputs, the ADC samples the photodetector outputs, and the loss is computed digitally. The quadratic nonlinearity in the nonlinear classification task is 'programmed on the RFSoC FPGA,' not realized in the photonic hardware. Weight updates go through external SMUs and DACs. So the training loop is computer-in-the-loop with a fast FPGA, not fully analog. The 'gigabaud' figure applies to the DAC symbol rate, not to the training; convergence takes 15–20 seconds. The energy-efficiency numbers (853 fJ/Op, 3,000 GOPS/W) are extrapolations from component specs and simulations, not end-to-end measurements. The Yin-Yang scalability experiment is a simulation, not hardware.\n\nThis is a real gap between headline and evidence. The paper could be fixed by rewriting the abstract and introduction to claim what is actually demonstrated: a fast FPGA-assisted perturbative training loop with analog gradient readout on an integrated photonic platform. That is still valuable.\n\nWho would benefit? Researchers working on photonic neuromorphic hardware and in-situ training. I would send it to peer review: the experimental work is substantive and the authors are credible, and a good referee will force the claims into line with the data. I would not cite it in its current form, but I'd watch for the revised version.\n\nRecommendation: send to review, expect heavy revision or rejection as a result of overclaiming.","headline":"Real integrated MGD training on silicon photonics, but 'fully analog' is contradicted by the paper's own Methods; worth refereeing for the hardware, not for the abstraction.","tokens_in":15120,"tokens_out":2977,"would_cite":false,"duration_ms":32722,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"The paper demonstrates a silicon photonic chip that trains a neural network end-to-end in real time, using optically measured gradients so that all learning happens in the analog domain.","keywords":["analog training","online learning","photonic neuromorphic processing","microring resonator","multiplexed gradient descent","in-situ training","adaptive learning","integrated photonics"],"falsifier":"Trace the training data path on the experimental setup: if every weight update requires the photodetector outputs to be digitized by the RFSoC ADC and the loss to be computed on the FPGA, then the 'fully analog' claim is falsified. A direct test would be to disable the FPGA's loss computation and show that no learning occurs, or to show that training continues with the ADC removed.","tokens_in":14164,"feed_emoji":"🧠","tokens_out":6166,"duration_ms":61329,"temperature":0.7,"pith_summary":"The paper claims that a silicon photonic chip can train a neural network fully in the analog domain, in real time, without digital matrix multiplications. The chip uses multiplexed gradient descent: small perturbations are added to microring-resonator weights, and the change in loss is read directly from on-chip balanced photodetectors, so gradients are measured optically. The authors report over 90% accuracy on linear classification, over 80% on a quadratic (nonlinear) task, and adaptive re-training that tracks a rotating decision boundary and recovers from temperature and crosstalk disturbances. If correct, this would be a step toward neuromorphic processors that learn continuously at gigabaud rates while staying robust to hardware drift.","feed_headline":"Photonic chip self-trains at gigabaud rates","feed_subtitle":"Microring weight bank and on-chip detectors make gradient updates without digital matrix math.","key_machinery":"The load-bearing object is the multiplexed gradient descent (MGD) algorithm, a perturbative scheme in which each weight is jittered by a random binary sequence and the instantaneous loss variation is multiplied by that sequence to estimate the gradient without backpropagation. On the hardware side, the machinery is the monolithically integrated photonic processor: microring resonator (MRR) weight banks tuned by in-resonator photoconductive heaters, balanced photodetectors that sum weighted optical signals on-chip, and microring modulator neurons that supply the nonlinear activation. The MGD update rule lets the chip update weights using only locally measured optical signals rather than digital matrix multiplications.","core_discovery":"The central discovery claimed is that multiplexed gradient descent turns the photonic processor itself into a trainer: because the gradient of the loss with respect to each weight is proportional to the product of the weight perturbation and the resulting loss variation, the chip can measure that product at the output photodetectors and update weights locally. The integrated device combines a wavelength-multiplexed microring weight bank, balanced photodetectors, and modulator neurons on one foundry-fabricated chip. Experimentally, the authors report linear classification accuracy above 90%, nonlinear (quadratic) classification above 80%, online tracking of thirteen rotated decision boundaries with recovery in under ten epochs, and stable operation under a ±2 °C temperature change and sustained thermal crosstalk. A simulation of a 4-30-3 network on the Yin-Yang dataset reaches 97.9% accuracy.","pith_inferences":["The paper's 'fully analog' claim is stronger than what the Methods section shows: the loss is computed on the RFSoC FPGA after the photodetector outputs are digitized, and the quadratic nonlinearity is programmed digitally, so a strict reading is that the demonstration is 'analog forward pass, digitally assisted training' until the loss function itself is computed by analog circuitry.","A natural test of the approach is to lower the ADC resolution and see where training accuracy collapses; this would quantify how much digital precision is actually required and whether the analog gradient estimate is the limiting factor.","The online-tracking experiment is essentially a continual-learning benchmark; connecting it to established continual-learning metrics such as forgetting and plasticity could sharpen what 'adaptivity' means here.","The authors note that PN-junction electro-optic tuning could cut convergence times by a factor of 1,000; if realized, this would open applications in high-speed adaptive filtering and control."],"forward_implications":["Training no longer requires a separate digital computer for gradient computation, which removes a major latency and bandwidth bottleneck in photonic neural networks.","Because updates are local and perturbative, the same hardware can keep learning while doing inference, enabling continuous adaptation to changing data and drift.","The demonstrated recovery times (about 20 seconds after a task change) and the projected speedup with electro-optic tuning suggest online learning at rates useful for real-time signal processing.","The method is hardware-agnostic, so the same algorithm should transfer to memristors, analog CMOS, and spintronic platforms.","The 97.9% accuracy in the simulated 4-30-3 network indicates the approach scales beyond two-neuron demonstrations."],"supporting_citations":[{"why":"Supplies the multiplexed gradient descent algorithm that the paper implements on chip.","marker":"[38]"},{"why":"Provides the perturbative, model-free distributed learning technique from which the gradient-estimation method derives.","marker":"[42]"},{"why":"The in-resonator photoconductive heater used to actuate the microring weights.","marker":"[41]"},{"why":"The 16 GHz balanced photodetector integrated on chip for output summation and gradient readout.","marker":"[53]"},{"why":"The Yin-Yang dataset used in the multi-layer scaling simulation.","marker":"[39]"},{"why":"The silicon photonic modulator neuron that provides the nonlinear activation function in the architecture.","marker":"[48]"},{"why":"Scaling analysis of perturbative training used to argue the algorithm extends to larger networks.","marker":"[47]"},{"why":"An experimental in-situ backpropagation photonic network used as a comparison baseline for hardware training.","marker":"[34]"}],"fun_headline_variants":["Photonic chip self-trains at gigabaud speeds","Real-time adaptive learning on an integrated photonic chip","Self-learning photonic processor, no digital math","On-chip photonic trainer adapts to changing inputs"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The demonstration depends on the assumption that the loss and gradient can be measured and applied entirely in the analog domain, with no digital computation inside the training loop.","fun_headline_variants_meta":{"raw":{"variants":["Photonic chip self-trains at gigabaud speeds","Real-time adaptive learning on an integrated photonic chip","Self-learning photonic processor, no digital math","On-chip photonic trainer adapts to changing inputs"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000749,"raw_usage":{"total_tokens":3356,"prompt_tokens":985,"completion_tokens":2371,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":601,"completion_tokens_details":{"reasoning_tokens":2308}},"tokens_in":601,"tokens_out":2371,"duration_ms":21669,"temperature":1.0,"reasoning_tokens":2308,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-06T23:23:14.234772+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Trace the training data path on the experimental setup: if every weight update requires the photodetector outputs to be digitized by the RFSoC ADC and the loss to be computed on the FPGA, then the 'fully analog' claim is falsified. A direct test would be to disable the FPGA's loss computation and show that no learning occurs, or to show that training continues with the ADC removed.","supporting_citations":[{"cited_title":"APL Machine Learning1(2), 026118 (2023) https://doi.org/10.1063/5.0157645 https://pubs.aip.org/aip/aml/article- pdf/doi/10.1063/5.0157645/18017061/026118 1 5.0157645.pdf","cited_arxiv_id":null,"evidence_quote":"Supplies the multiplexed gradient descent algorithm that the paper implements on chip."},{"cited_title":"IEEE Transactions on Neural Networks 1(1), 58–70 (1990) https://doi.org/10.1109/72.80205","cited_arxiv_id":null,"evidence_quote":"Provides the perturbative, model-free distributed learning technique from which the gradient-estimation method derives."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"The in-resonator photoconductive heater used to actuate the microring weights."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"The 16 GHz balanced photodetector integrated on chip for output summation and gradient readout."},{"cited_title":"https://arxiv.org/abs/2102","cited_arxiv_id":null,"evidence_quote":"The Yin-Yang dataset used in the multi-layer scaling simulation."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"The silicon photonic modulator neuron that provides the nonlinear activation function in the architecture."},{"cited_title":"APL Machine Learning3(2), 026107 (2025) https://doi.org/10.1063/5.0258271 https://pubs.aip.org/aip/aml/article- pdf/doi/10.1063/5.0258271/20492805/026107 1 5.0258271.pdf","cited_arxiv_id":null,"evidence_quote":"Scaling analysis of perturbative training used to argue the algorithm extends to larger networks."}],"review_version":1}