{"id":"7c91c23a-e512-4733-a672-213c99cfafc5","arxiv_id":"2506.24041","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":10,"one_line_summary":"NSS, a two-layer LCA-based spiking neural network with 2-bit graded spikes, sorts tetrode spikes unsupervised and runs inference on Loihi 2, improving drift F1 over a LIF version at modest power cost.","lead":"A two-layer spiking neural network called NSS sorts neural spike waveforms online and unsupervised, using sparse coding and graded spikes on Intel's Loihi 2 chip. It reports competitive accuracy at low dynamic power, but the headline real-time and drift results depend on excluding a 117 ms input/output latency and on learning performed off-chip.","discovery_kind":"new_application","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The real-time claim hinges on excluding 117.5 ms off-chip I/O per waveform; at 6–10 Hz firing rates that latency alone can exceed the inter-spike interval.","rationale":"The reader's weakest assumption identifies the same load-bearing concern: the real-time claim depends on excluding the 117.5 ms I/O transfer time. This is the single most damaging issue because it directly invalidates the abstract's central framing for the current hardware, independent of any improvements to clustering accuracy or power measurements. The paper is otherwise transparent about the limitation, and the authors propose that future hardware will correct it, so the work remains a promising proof-of-concept. However, the submitted abstract and conclusion should be revised to present the I/O-inclusive latency and to remove or qualify the real-time and power-enhancement claims. Since the reader already reached CONDITIONAL on this basis, I do not recommend changing the verdict.","tokens_in":20745,"tokens_out":5287,"duration_ms":63086,"concrete_test":"Measure end-to-end wall-clock latency on Loihi 2 in a streaming configuration: feed TR1 samples continuously through the Lava host interface for 60 seconds, with detection and alignment performed on the host, and record the per-waveform latency including all off-chip transfers. If the median per-waveform I/O-plus-compute time exceeds the inverse firing rate (approximately 100–166 ms at 6–10 Hz), the real-time claim fails. A simpler analytical check is to recompute per-inference latency as 117.5 ms + 0.25 ms and compare it with the spike intervals reported in Table 1.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central real-time claim in the abstract (0.25 ms per inference) is supported only by neurocore computation time. Section 2.3.4 explicitly states that the average I/O transfer time to send one spike waveform to Loihi 2 and read the NSS output is 117.5 ms, and that all subsequent inference time measurements exclude this I/O latency. For the reported 6–10 Hz bioneuron firing rates, the inter-spike interval is roughly 100–166 ms, so adding the measured I/O time to the 0.25 ms neurocore time yields approximately 117.75 ms per waveform, which is at or above the biological event interval. Real-time spike sorting on the current Loihi 2 mapping is therefore not demonstrated. The host-side detection and alignment stages are also not included, so the 0.25 ms figure is not an end-to-end budget. In addition, the abstract reports 77% F1 and +1.65 mW, whereas Table 3 gives 71.4% F1 after drift and +0.65 mW dynamic power increase; this internal inconsistency makes the headline quantitative claim unreliable as stated. These limitations are disclosed in the text, but disclosure does not make the abstract's real-time and low-power claims true for the system as built.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The manuscript proposes the Neuromorphic Sparse Sorter (NSS), a two-layer spiking neural network based on the Locally Competitive Algorithm (LCA) for unsupervised spike sorting of tetrode recordings. NSS uses a first LCA layer for sparse feature extraction and a second LCA layer for clustering, with a rectified softshrink activation and the Temporally Diffused Quantizer (TDQ) to produce graded spikes. The method is evaluated on five synthetic and four real tetrode recordings against PCA+KMeans, WaveClus3, and other sorters, and a Loihi 2 implementation with a custom neuron model is benchmarked against a LIF version. The central claim is that NSS is a real-time, low-power, unsupervised sorter whose 2-bit graded-spike version improves spike-sorting F1 from 59.0% to 71.4% on a drifting recording at small additional power.","tokens_in":20929,"tokens_out":6427,"duration_ms":60520,"significance":"If the claims were fully supported, the paper would be a valuable demonstration of a digital neuromorphic implementation of an unsupervised sparse-coding spike sorter, and the graded-spike trade-off would be practically useful for edge BMI systems. The authors release their code, provide CPU and hardware measurements, compare against several established baselines, and include sensitivity analyses, which are strengths of the submission. However, as submitted, the headline contributions are weakened by inconsistencies between the abstract and the body, an excluded I/O latency that undermines the real-time claim, unclear power units, and a hyperparameter selected on the evaluation data.","major_comments":[{"comment":"The abstract reports an F1-score of 77% with a +10% improvement, +1.65 mW, and 0.25 ms (+60 µs) per inference, but Table 3 reports 71.4% F1 after drift and 8.60 versus 7.95 (units unclear) dynamic power for the same comparison; the 77% value appears nowhere in the body. Please correct the abstract to match the measured values and state the exact evaluation conditions (before/after drift, number of waveforms, and confidence intervals).","section":"Abstract and Table 3"},{"comment":"The real-time claim is not demonstrated for the system as built. Section 2.3.4 states that the measured I/O transfer time for one spike waveform and its outputs is 117.5 ms, and that all inference time measurements exclude this latency; Section 3.3 repeats that the sub-0.4 ms processing time excludes I/O communication. For the reported 6–10 Hz firing rates, the inter-spike interval is roughly 100–166 ms, so adding the 117.5 ms I/O time to the 0.25 ms neurocore time yields approximately 118 ms per waveform, which is at or above the biological event interval. The host-side detection and alignment stages are also excluded. Please provide an end-to-end latency budget that includes detection, alignment, I/O, and inference, or remove the real-time claim from the abstract and conclusion.","section":"Sections 2.3.4 and 3.3"},{"comment":"The power and energy figures are internally inconsistent. Table 3 labels dynamic power in µW and reports values of 5.20–18.30, while the abstract states 8.6 mW (+1.65 mW) and Section 3.3 refers to “mW/channel”. If the measured values are µW, the abstract overstates power by a factor of 1000; if the values are mW, the table header is wrong. The dynamic energy and energy-delay-product columns also mix units in a way that makes the reported EDP values difficult to reproduce. Please state the exact units for every quantity and compute energy and EDP from a single consistent set of base units.","section":"Table 3 and Section 3.3"},{"comment":"The choice of S=2 is made after observing the F1-score improvements on the evaluation datasets, including the real drifting recording TR1, in Figure 4, and the same S=2 is then used for the headline Loihi 2 comparison in Table 3. Since the spike bit-width is a hyperparameter selected on test data, the reported 71.4% versus 59.0% advantage over NSS-LIF may be optimistic. Please select S on the held-out TS0 dataset or report the full bit-width sweep on the Loihi benchmark with estimates of variability.","section":"Section 3.1"},{"comment":"The statements that NSS “learns to sort” and “operates entirely unsupervised” apply to the CPU-based algorithm, but the Loihi 2 demonstration does not include on-chip learning: Section 2.3.4 states that NSS was trained offline on a CPU with S=8 and the frozen weights were then transferred to the chip. Moreover, the custom neuron model was programmed manually, and no on-chip dictionary updates were performed. Please distinguish the offline-trained hardware inference from the online learning algorithm and state this limitation explicitly in the abstract and conclusion.","section":"Sections 2.3.4 and 3.3"},{"comment":"The broad claim that NSS outperforms established pipelines such as WaveClus3 and PCA+KMeans is not supported by the reported results. Section 3.2 states that WaveClus3 is better on the drifting real recording, and Table 4 shows that NSS-2bit is below Tridesclous, Spyking-Circus, and Kilosort on several datasets. Please restrict the performance claims to the specific regimes where they are supported, or qualify them as “competitive” rather than “superior”.","section":"Sections 3.2 and 4, Table 4"}],"minor_comments":[{"comment":"The real-world dataset rows list “TR2” twice, with different spike rates and durations; this appears to be a labeling error, and the mapping between dataset names and the TR1–TR4 labels used in the text should be clarified.","section":"Table 1"},{"comment":"Reference [40] (Gold et al., 2006) is cited for the statement that Loihi 2 and SpiNNaker support multi-bit spikes, but that reference is a modeling study of extracellular action potentials; the citation appears to be incorrect and should be replaced with the appropriate hardware references.","section":"Introduction and References"},{"comment":"The after-drift F1-score for TR1 is computed on only the last 100 spike waveforms; given the small sample, confidence intervals or a bootstrap estimate should be reported for the headline F1 comparison.","section":"Table 3"},{"comment":"Equation (4) and the surrounding text contain typesetting artifacts (missing characters and undefined notation such as “∙” and “v(t)”) that make the TDQ recurrence difficult to read; the equation should be rewritten cleanly with all variables defined.","section":"Section 2.2.5"}],"recommendation":"major_revision","confidential_remarks":"The paper has a real contribution in the CPU-level algorithm and the Loihi 2 graded-spike implementation, but the abstract and conclusion overstate the real-time, low-power, and performance claims relative to the body. The authors should be asked to correct the numerical inconsistencies, provide an honest end-to-end latency budget or remove the real-time claim, clarify units, and report the S selection procedure transparently. These are fixable within the manuscript's scope, so I do not recommend rejection."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Colleague, here's my read on the NSS paper. The actual engineering is real and worth knowing about: it's the first spike-sorting pipeline I know of on a digital neuromorphic chip (Loihi 2) that uses graded spikes, with a custom TDQ-based neuron model and a two-layer LCA network trained unsupervised in simulation. The CPU benchmarks are careful, the comparison to PCA+KMeans, WaveClus3, Kilosort, etc. is honest, and the authors are transparent about big limitations, including no on-chip learning and the I/O problem. That is a solid contribution to the neuromorphic spike-sorting subfield, not a revolution, but a useful step.\n\nThe soft spots are real and mostly concentrated in the abstract and the real-time claim. The abstract's 77% F1 and +1.65 mW do not match Table 3's 71.4% and +0.65 mW, and 77% appears nowhere in the body. That's a serious internal inconsistency. More important, the paper's real-time claim depends on excluding the measured 117.5 ms I/O transfer time per waveform. At 6-10 Hz firing rates, that latency is comparable to the inter-spike interval, so the system as built is not real-time in any end-to-end sense. The authors disclose this in Section 2.3.4, but then the abstract still says 0.25 ms per inference. The S=2 bit-width is also selected after looking at test recordings, which is a mild fitting-to-data issue, and the Loihi drift numbers rest on only 100 waveforms.\n\nNone of this kills the core idea. The two-layer LCA with TDQ graded spikes does beat the LIF version on drift and is competitive with established offline sorters on several datasets. The paper would be fine if the abstract were rewritten to match the tables, the I/O latency were either included or clearly labeled as a separate hardware bottleneck, and the S=2 selection were acknowledged as a limitation. I'd send it to peer review - it deserves referee time - but the reviewers should push on those specific points.\n\nWho's this for? People working on edge spike sorting, neuromorphic hardware, or unsupervised SNNs. If you're in that area, the measured Loihi 2 numbers are worth citing even in the current form. I'd bring it to a reading group, mostly to discuss how the field should handle I/O latency in real-time claims.","headline":"A genuine Loihi 2 spike-sorting implementation with graded spikes, undermined by an abstract whose numbers don't match the paper's own tables.","tokens_in":776,"tokens_out":997,"would_cite":true,"duration_ms":28351,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"A two-layer spiking sparse coder can sort tetrode spikes online, unsupervised, and on-chip, with 2-bit graded spikes beating LIF neurons on drifting data.","keywords":["spiking neural network","spike sorting","sparse coding","locally competitive algorithm","unsupervised learning","neuromorphic computing","graded spikes","brain-machine interfaces"],"falsifier":"Run the same NSS-2bit configuration on Loihi 2 and measure wall-clock latency from spike waveform arrival to sorted label, including the documented 117.5 ms I/O transfer; if that latency exceeds the roughly 100-170 ms interval between spikes of a 6-10 Hz neuron, the system is not real-time for the tested recordings.","tokens_in":20413,"feed_emoji":"🧠","tokens_out":9900,"duration_ms":108123,"temperature":0.7,"pith_summary":"This paper introduces the Neuromorphic Sparse Sorter (NSS), a two-layer spiking neural network that sorts extracellular tetrode spikes without labels and without offline batch training. The central claim is that a spiking version of the Locally Competitive Algorithm, running on a neuromorphic chip that supports graded spikes, can give the accuracy of conventional sparse-coding spike sorters while staying fast and low-power enough for edge use in brain-machine interfaces. With 2-bit graded spikes, NSS on Loihi 2 outperforms the same network built from leaky integrate-and-fire neurons, reaching an F1-score of 77% on a drifting real recording at 8.6 mW dynamic power and 0.25 ms per waveform, though the timing figure excludes off-chip input/output latency. If the claim holds, NSS is a path to on-chip, in situ spike sorting that transmits only sorted action potentials rather than raw multichannel data, and the paper is explicit that its accuracy still trails offline sorters such as Kilosort on several benchmarks.","feed_headline":"Two-bit spikes beat LIF for on-chip spike sorting","feed_subtitle":"Unsupervised neuromorphic sparse coder reports 77% F1 on drifting tetrode data at 8.6 mW, with each neurocore inference at 0.25 ms.","key_machinery":"The load-bearing object is the two-layer spiking Locally Competitive Algorithm network. LCA is a recurrent neural circuit that solves the LASSO sparse-coding problem by letting neurons compete through lateral inhibition; the first NSS layer encodes each 120-dimensional spike waveform as a sparse code, and the second layer clusters by taking the index of the most active neuron. A custom neuron model applies the Temporally Diffused Quantizer (TDQ) to the rectified softshrink activation, quantizing continuous coefficients into N-bit graded spikes while carrying quantization error forward in time. The bit-width S is the single knob that trades temporal sparsity and energy against sorting accuracy, and S=2 is chosen as the sweet spot.","core_discovery":"The paper's claim, on its own terms, is that a compact two-layer LCA network can replace the feature-extraction and clustering stages of a spike-sorting pipeline, and that quantized graded spikes make that network implementable on digital neuromorphic hardware. The first layer learns a dictionary of waveform atoms from incoming spike waveforms and outputs sparse codes; the second layer acts as a clustering stage whose label is the index of its most active neuron. A custom neuron model applies the Temporally Diffused Quantizer to the rectified softshrink activation, converting continuous coefficients into graded spikes while propagating quantization error forward in time, and the authors show that 2-bit spikes capture most of the accuracy gain of higher precision while keeping temporal sparsity high. On Loihi 2 the network occupies two neurocores and runs in the single-digit milliwatt dynamic-power range, with the largest F1 gain over LIF neurons appearing on the recording with biological drift. The learning rule is Hebbian-like and the design is meant to run online and unsupervised, though the Loihi 2 runs use weights trained off-chip and frozen because the chip does not support the layerwise learning rule.","pith_inferences":["If the off-chip I/O latency is fixed in future hardware, the same architecture would run end-to-end well inside a typical inter-spike interval, since the neurocore computation itself is under 0.4 ms; the prototype's 117.5 ms transfer is not intrinsic to the algorithm.","The bit-width dial generalizes: any LCA-based neuromorphic task could use the same TDQ quantization to sweep from continuous accuracy to binary spiking efficiency by changing one parameter.","A testable extension is to keep the dictionary learning running during the drift phase rather than freezing weights; the paper's online-adaptation rationale predicts slower F1 decay than the frozen Loihi implementation."],"forward_implications":["On the drifting real recording, the 2-bit graded-spike NSS on Loihi 2 raised F1 after drift from 59.0% for the LIF version to 71.4%, with dynamic power rising only from 7.95 mW to 8.60 mW and neurocore inference time at 0.26 ms per waveform.","NSS is competitive with WaveClus3 and above PCA+KMeans across most synthetic and real tetrode recordings, despite processing online and without labels.","Because the second layer labels by the most active neuron and needs no cluster count, NSS avoids the parameterization requirement of KMeans-based pipelines.","The whole network uses two neurocores of a Loihi 2 chip and about 30,100 synapses, and the authors estimate that a hypothetical 64-channel version would use about 7.6 million synapses, still within one chip.","On several benchmark datasets, NSS remains less accurate than offline sorters such as Kilosort and Spyking-Circus, a trade-off the authors attribute to the simpler pipeline."],"supporting_citations":[{"why":"Defines the Locally Competitive Algorithm neuron dynamics and lateral inhibition that NSS uses as its inference machinery.","marker":"[35]"},{"why":"The authors' earlier study showing LCA sparse coding outperforms PCA and K-SVD for multichannel spike sorting, motivating the architecture.","marker":"[34]"},{"why":"Introduces the Temporally Diffused Quantizer used to quantize LCA activations into graded spikes with a derivative of one.","marker":"[61]"},{"why":"Documents Loihi 2 and its multi-bit graded spike support, the hardware platform for the energy and timing measurements.","marker":"[32]"},{"why":"Provides the spikeinterface simulation library used to generate the synthetic tetrode recordings in the benchmarks.","marker":"[8]"},{"why":"NeuSort is the adaptive Hebbian spike sorter that motivates the drift-handling comparison and is discussed in the introduction.","marker":"[44]"},{"why":"WaveClus3 is one of the offline spike-sorting pipelines NSS is benchmarked against.","marker":"[63]"},{"why":"Kilosort is one of the offline state-of-the-art sorters whose accuracy NSS is compared with.","marker":"[6]"},{"why":"Spyking-Circus is another offline sorter in the comparison and handles overlapping spikes, which NSS does not.","marker":"[7]"}],"fun_headline_variants":["2-bit graded spikes beat LIF for spike sorting","Unsupervised SNN sorts spikes in real time on Loihi 2","Neuromorphic spike sorter: 77% F1 at 8.6 mW on drift","Two-bit spikes yield 10% F1 gain over LIF for spike sorting","Spiking network sorts drifting spikes on Loihi at 8.6 mW"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The real-time claim stands on counting only neurocore computation time and excluding the paper's own measured 117.5 ms input/output transfer per spike waveform, which would otherwise push each inference to about 118 ms.","fun_headline_variants_meta":{"raw":{"variants":["2-bit graded spikes beat LIF for spike sorting","Unsupervised SNN sorts spikes in real time on Loihi 2","Neuromorphic spike sorter: 77% F1 at 8.6 mW on drift","Two-bit spikes yield 10% F1 gain over LIF for spike sorting","Spiking network sorts drifting spikes on Loihi at 8.6 mW"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000841,"raw_usage":{"total_tokens":3713,"prompt_tokens":1045,"completion_tokens":2668,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":661,"completion_tokens_details":{"reasoning_tokens":2564}},"tokens_in":661,"tokens_out":2668,"duration_ms":21764,"temperature":1.0,"reasoning_tokens":2564,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-06T21:26:49.368520+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Run the same NSS-2bit configuration on Loihi 2 and measure wall-clock latency from spike waveform arrival to sorted label, including the documented 117.5 ms I/O transfer; if that latency exceeds the roughly 100-170 ms interval between spikes of a 6-10 Hz neuron, the system is not real-time for the tested recordings.","supporting_citations":[{"cited_title":"A Spike in Performance: Training Hybrid-Spiking Neural Networks with Quantized Activation Functions","cited_arxiv_id":"2002.03553","evidence_quote":"Introduces the Temporally Diffused Quantizer used to quantize LCA activations into graded spikes with a derivative of one."},{"cited_title":"Spikeinterface, a unified framework for spike sorting","cited_arxiv_id":null,"evidence_quote":"Provides the spikeinterface simulation library used to generate the synthetic tetrode recordings in the benchmarks."},{"cited_title":"NeuSort: an automatic adaptive spike sorting approach with neuromorphic models","cited_arxiv_id":null,"evidence_quote":"NeuSort is the adaptive Hebbian spike sorter that motivates the drift-handling comparison and is discussed in the introduction."},{"cited_title":"Kilosort: realtime spike-sorting for extracellular electrophysiology with hundreds of channels","cited_arxiv_id":null,"evidence_quote":"Kilosort is one of the offline state-of-the-art sorters whose accuracy NSS is compared with."},{"cited_title":"A spike sorting toolbox for up to thousands of electrodes validated with ground truth recordings in vitro and in vivo","cited_arxiv_id":null,"evidence_quote":"Spyking-Circus is another offline sorter in the comparison and handles overlapping spikes, which NSS does not."}],"review_version":1}