{"id":"f3671c43-bb1f-4e37-a484-69774322fb4c","arxiv_id":"2509.02224","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":3.0,"correctness_risk":"low","formal_verification":"none","parameter_count":2,"one_line_summary":"A 130 nm CMOS inductively-degenerated cascode LNA for 2.4 GHz ZigBee meets its power, gain, noise, and matching specs in simulation, with measured S-parameters consistent with simulations.","lead":"This paper reports the design, fabrication, and measurement of a 2.4 GHz low-noise amplifier chip in 130 nm CMOS for ZigBee receivers. The chip draws 505 µW and its measured radio-frequency behavior closely tracks the post-layout simulations.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Gain claim rests on unverified 0.5 dB offset extrapolation from -13 dBm to normal input levels; needs a low-power S21 measurement.","rationale":"The paper's stated ambition is to show an LNA that meets IEEE 802.15.4 specifications. Since NF and IIP3 are simulation-only and disclosed, the only measured bridge to specification compliance is S-parameter consistency. Of the measured S-parameters, gain is the one with a hard spec (>=10 dB) and the one that is extrapolated. S11 is measured to meet the spec, S12 has no explicit spec, and S22 is described as acceptable though shifted. Therefore the gain extrapolation is the critical pivot. The reader's weakest assumption identifies exactly this; I confirm it. A direct low-power S21 measurement would settle it. The paper's disclosed caveats make this a conditional result, not a fatal flaw, so the reader's CONDITIONAL verdict stands.","tokens_in":6274,"tokens_out":7060,"duration_ms":82964,"concrete_test":"Measure S21 of the fabricated chip at 2.45 GHz as a function of input power from -45 dBm to -10 dBm (e.g., using a calibrated signal generator plus spectrum analyzer, or a VNA with external attenuation and through-calibration). Compare measured small-signal gain (at <= -30 dBm, where no compression) with post-layout LSSP simulation at the same power. If measured S21 at -30 dBm is >= 10 dB and within 0.5 dB of simulation, the extrapolation holds; if it is below 10 dB or the offset grows, the fabricated LNA's gain spec is not verified.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim that the fabricated LNA meets IEEE 802.15.4 requires gain >= 10 dB at 2.45 GHz under normal input levels (below -20 dBm). This is never measured: the VNA's minimum drive is -13 dBm, where compression and the 0.6 V DC bias on the ESD diodes already change S21. The measured S21 at -13 dBm is 0.5 dB below the LSSP simulation at that level. Section IV-B then assumes 'a similar difference' will hold below -20 dBm, where the simulated small-signal gain is 10.7 dB, implying expected measured gain ~10.2 dB. However, the 0.5 dB offset at -13 dBm is an aggregate of nonlinear compression, ESD-diode loading, and model/pad parasitics. Nothing guarantees the same absolute offset in the linear regime; the offset could be larger, especially since the paper itself attributes gain roll-off and S22 shift to 'parasitic capacitances higher than modeled.' Those same parasitics could reduce small-signal gain by more than 0.5 dB. Thus the headline specification-compliance depends on an untested extrapolation. The paper is transparent about this, but the claim is conditional on it.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper reports the analysis, design, fabrication, and measurement of a 2.4 GHz common-source CMOS LNA with inductive degeneration in 130 nm CMOS, targeting IEEE 802.15.4. A design-space exploration over bias current and M1 width, with passive values synthesized per candidate, yields a 505 µW LNA with post-layout simulated gain 10.7 dB, NF 2.7 dB, IIP3 0.9 dBm, S11=-24 dB, S22=-30 dB, and S12=-41 dB. On-wafer S-parameter measurements were performed at the analyzer's minimum drive of -13 dBm, i.e., outside the LNA's linear range; the paper compares these with large-signal (LSSP) simulations at the same drive and reports consistency, then extrapolates that gain exceeds 10 dB under normal operating input levels. The conclusions state that the fabricated LNA meets the IEEE 802.15.4 specifications.","tokens_in":6556,"tokens_out":3635,"duration_ms":44617,"significance":"If the claims are fully supported, this is a solid, low-power LNA data point for 2.4 GHz short-range receivers and a meaningful contribution to RF IC research infrastructure in Cuba. The paper's strengths include a systematic design-space exploration, post-layout simulations that include pads and ESD protection, and a transparent attempt to compare measured S-parameters with large-signal simulations at the actual measurement drive level rather than with idealized small-signal predictions. The manuscript also candidly discusses deviations attributed to parasitic capacitances and magnetic coupling. However, complete specification compliance of the fabricated chip is not directly demonstrated: NF and IIP3 are simulation-only, and the only measured forward gain was obtained under compression, so the key gain claim rests on an extrapolation. These issues are identifiable and addressable with wording changes or additional measurements.","major_comments":[{"comment":"The central claim that the fabricated LNA has gain ≥10 dB under normal IEEE 802.15.4 input levels rests on an untested extrapolation. The measured S21 at -13 dBm is 0.5 dB below the LSSP simulation at that drive, and the paper states: \"Assuming a similar difference when the circuit operates with input levels below -20 dBm, the gain is expected to remain above 10 dB.\" The -13 dBm offset, however, is an aggregate of compression, forward-biased ESD diodes (0.6 V DC), parasitic capacitances, and magnetic coupling. Nothing in the manuscript guarantees that this aggregate remains a constant 0.5 dB in the linear regime; in fact, the paper attributes S21 roll-off to \"parasitic capacitances higher than modeled\" and S22/S12 deviations to unmodeled coupling. A direct low-level S21 measurement (for example, with an external attenuator to reach roughly -40 dBm) is required to support the gain specifi","section":"Section IV-B"},{"comment":"Only S-parameters were measured; NF and IIP3 appear exclusively as post-layout simulation results (Table III). The abstract carefully attributes NF and IIP3 to simulation, but the Conclusions state \"Measurements confirmed simulations within expected deviations,\" which overstates the evidence. The measurements can confirm S-parameter behavior (and even that at a compressed drive), but they do not confirm the fabricated chip's NF or IIP3. The manuscript should either add on-wafer NF/IIP3 measurements or explicitly state in the conclusions that NF and IIP3 specifications are simulation-based and that the measured chip's compliance for those metrics is not experimentally verified.","section":"Section IV-B and Conclusions"}],"minor_comments":[{"comment":"The header \"Frecuency\" should read \"Frequency.\"","section":"Table I"},{"comment":"The sentence beginning \"balancing the criteria chosen by the designer (in addition to power, noise...\" is duplicated verbatim in the same paragraph.","section":"Section II"},{"comment":"The sentence about using free area between pads for decoupling capacitors is repeated verbatim in two consecutive paragraphs.","section":"Section IV-B"},{"comment":"For reproducibility and verification, a small table with the measured S-parameter values (S11, S21, S22, S12) at 2.45 GHz would be more useful than relying only on the plotted curves, whose quantitative values are hard to extract.","section":"Section IV-B / Figure 7"}],"recommendation":"major_revision","confidential_remarks":"The manuscript is an English translation of a 2016 conference paper. The core design and simulation work is competent, and the measured S-parameters are honestly compared to large-signal simulations at the same drive. The main risk is overclaiming experimental verification of the full IEEE 802.15.4 specification; the paper should be revised to clearly separate simulated metrics (gain under linear operation, NF, IIP3) from measured S-parameters at -13 dBm, or supplemented with a low-level S21 measurement."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Short version: this is a well-behaved engineering report, not a breakthrough. The new thing is a fabricated 130-nm 2.4-GHz LNA with measured S-parameters: 10.7 dB simulated gain, 2.7 dB NF, 0.9 dBm IIP3, 505 microwatts. The topology and design-space method are textbook; the chip and its measurements are the contribution.\n\nWhat it does well: it is transparent about the gap between simulation and measurement. The authors run large-signal S-parameter (LSSP) simulations at the same -13 dBm drive used by the network analyzer, explain that the ESD diodes get forward-biased by the analyzer's DC component, and explicitly say NF and IIP3 are simulation-only. The simplified equations in Section III are labeled as design guidance, not predictions, so there is no circularity. The citation pattern is appropriate, including the relevant self-citations.\n\nThe main soft spot is the one the stress-test note flags. Measured S21 at -13 dBm is 0.5 dB below the LSSP simulation, and the paper then assumes \"a similar difference\" holds below -20 dBm, concluding gain stays above 10 dB under normal operating conditions. That assumption is not guaranteed. The -13 dBm measurement includes compression, ESD diode loading, and parasitics; the paper itself attributes the S22 shift to parasitic capacitances higher than modeled. The same parasitics could lower small-signal gain by more than 0.5 dB. So the specification-compliance claim is conditional, not fully verified. Also, power consumption is reported only from simulation, not measured. These are all disclosed, so the paper is not misleading, but it should be read as a design validation with documented deviations, not as complete experimental verification.\n\nBottom line: this work deserves a serious referee. It is a real chip, clearly written, and honest about its limits. I would ask the authors to either measure S21 at a lower input drive (if the setup ever allows) or re-scope the conclusion to say that simulation meets the specification and measured S-parameters are consistent within documented deviations. That is a conditional acceptance, not a rejection. The paper is most useful for RF IC designers and graduate students as a concrete example of CS-LNA design and of how to report measurement limitations. I would probably not cite it in my own work unless I specifically needed a 130-nm, 505-uW 2.4-GHz data point.","headline":"A working 2.4-GHz CMOS LNA with honest measurements and no overclaiming, but the 'meets IEEE 802.15.4 specs' headline rests partly on an untested gain extrapolation.","tokens_in":7070,"tokens_out":3099,"would_cite":false,"duration_ms":34749,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"A 130 nm CMOS LNA for 2.4 GHz ZigBee meets the IEEE 802.15.4 RF specifications at 505 µW, with measured S-parameters consistent with post-layout simulations.","keywords":["low-noise amplifier","CMOS LNA","IEEE 802.15.4","ZigBee","2.4 GHz","inductive degeneration","low-power RF","130 nm CMOS"],"falsifier":"Drive the fabricated LNA with a calibrated input below -20 dBm, for example by inserting a precision attenuator and correcting for the analyzer floor, and measure S21 at 2.45 GHz; if the gain falls below 10 dB, the claim that the LNA meets the 802.15.4 gain requirement under normal operation fails.","tokens_in":6181,"feed_emoji":"📡","tokens_out":6556,"duration_ms":63461,"temperature":0.7,"pith_summary":"This paper reports a 2.4 GHz low-noise amplifier for ZigBee receivers, built in 130 nm CMOS, and claims it meets the IEEE 802.15.4 front-end specifications. Post-layout simulations give 10.7 dB gain, 2.7 dB noise figure, 0.9 dBm IIP3, input and output matching better than -20 dB, at 505 µW from a 1.2 V supply. The fabricated chip's measured S-parameters track the simulations; the remaining difference is explained by the analyzer forcing -13 dBm, well above the LNA's intended operating range. If the claim holds, this is a concrete, low-power RF front-end that can sit ahead of a ZigBee receiver with modest area and consumption.","feed_headline":"CMOS LNA hits ZigBee specs at 505 microwatts","feed_subtitle":"Post-layout simulations show 10.7 dB gain and 2.7 dB noise; measured S-parameters track them.","key_machinery":"The load-bearing structure is the common-source LNA with inductive degeneration: the source inductor Ls generates the resistive input match without adding thermal noise, the gate inductor Lg tunes it, the cascode transistor M2 cuts Miller effect and improves reverse isolation, and the drain inductor LD forms the output resonance. Its governing trade-off is captured in the gain relation G = Gm² RS / G'o with Gm ≈ 1/(2ω0Ls): gain is set mainly by Ls, while LD's quality factor determines output loss, so the design fixes LD first and then synthesizes the input passives. A sweep over bias current and M1 width then uses the moderate-inversion IIP3 peak, which appears at approximately one current d","core_discovery":"On its own terms, the paper establishes that a common-source LNA with inductive degeneration can be systematically designed to satisfy all ZigBee/IEEE 802.15.4 RF requirements at sub-milliwatt power in a 130 nm process. The demonstration combines a design-space sweep over bias current and transistor width, a synthesis step that derives the passive elements for each candidate, and a sizing rule that uses the moderate-inversion IIP3 sweet spot. The selected point, ID = 0.4 mA and W1 = 40 µm, yields a post-layout gain of 10.7 dB, noise figure of 2.7 dB, IIP3 of 0.9 dBm, matching below -20 dB, and 505 µW consumption. Measurements of the fabricated die confirm the S-parameter behavior; the slight","pith_inferences":["My inference: the same sizing recipe should transfer to the 868/915 MHz ZigBee bands by rescaling the passives, since the linearity sweet spot is tied to current density rather than frequency.","My inference: the measured downward frequency shift in S22, attributed to parasitics and inductor coupling, is a testable target for an electromagnetic-extracted redesign; the paper gives a plausible cause, not a proven one.","My inference: the 505 µW figure sets a concrete budget challenge for the rest of the receiver chain; a full 802.15.4 radio would need mixer, local oscillator, and baseband to fit in a similar or smaller fraction of the total power."],"forward_implications":["A ZigBee receiver front-end can be implemented with a 505 µW LNA while still leaving gain margin above the standard's 10 dB minimum.","The same design flow—sweep current and width, synthesize passives, then pick the point at the moderate-inversion IIP3 current density—yields compliant designs without iterative manual tuning.","The measured S-parameter consistency means post-layout simulation including ESD pads is a reliable predictor for this topology at 2.4 GHz, provided the test signal stays in the linear range.","Because gain at the analyzer's minimum drive is only 0.5 dB below simulation, the paper expects normal sub -20 dBm operation to meet the >10 dB gain specification."],"supporting_citations":[{"why":"Supplies the common-source cascode topology and the inductor design choices that ground the LNA architecture.","marker":"[5]"},{"why":"Provides the LNA-ESD co-design approach used to include ESD diode protection on the fabricated pads.","marker":"[6]"},{"why":"Defines the ZigBee/IEEE 802.15.4 standard specifications the LNA is designed to meet.","marker":"[7]"},{"why":"Supplies the noise-optimization method behind the CX noise-figure capacitor.","marker":"[11]"},{"why":"Establishes the inductively degenerated input matching principle used to set Ls and Lg.","marker":"[12]"},{"why":"Shows gate biasing can linearize CMOS LNAs, supporting the IIP3 optimization strategy.","marker":"[14]"},{"why":"Locates the IIP3 peak at a specific current density, used to choose the bias and transistor width.","marker":"[15]"},{"why":"Provides the 2.4 GHz IEEE 802.15.4 receiver specification reference used for the design targets.","marker":"[17]"},{"why":"Supplies the moderate-weak inversion design zone and the state-of-the-art comparison point for 2.4 GHz CMOS CS-LNAs.","marker":"[21]"},{"why":"Supplies the large-signal S-parameter technique used to model the -13 dBm measurement condition.","marker":"[23]"}],"fun_headline_variants":["Sub-mW CMOS LNA meets ZigBee RF specs","130nm LNA hits ZigBee at 505µW","Design sweep yields 505µW ZigBee LNA","LNA design hits all ZigBee targets under 1mW","10.7dB gain LNA meets ZigBee with 505µW"],"cache_read_input_tokens":2688,"weakest_assumption_plain":"The specification-compliance claim depends on the assumption that the gain measured at -13 dBm, which is 0.5 dB below simulation, stays similarly close at the real operating inputs below -20 dBm; that low-level behavior was extrapolated, not measured.","fun_headline_variants_meta":{"raw":{"variants":["Sub-mW CMOS LNA meets ZigBee RF specs","130nm LNA hits ZigBee at 505µW","Design sweep yields 505µW ZigBee LNA","LNA design hits all ZigBee targets under 1mW","10.7dB gain LNA meets ZigBee with 505µW"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000369,"raw_usage":{"total_tokens":1830,"prompt_tokens":776,"completion_tokens":1054,"prompt_tokens_details":{"cached_tokens":256},"prompt_cache_hit_tokens":256,"prompt_cache_miss_tokens":520,"completion_tokens_details":{"reasoning_tokens":966}},"tokens_in":520,"tokens_out":1054,"duration_ms":9118,"temperature":1.0,"reasoning_tokens":966,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-05T11:43:46.863153+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Drive the fabricated LNA with a calibrated input below -20 dBm, for example by inserting a precision attenuator and correcting for the analyzer floor, and measure S21 at 2.45 GHz; if the gain falls below 10 dB, the claim that the LNA meets the 802.15.4 gain requirement under normal operation fails.","supporting_citations":[{"cited_title":"Lee, The Design of CMOS Radio-Frequency Integrated Circuits , 2nd ed","cited_arxiv_id":null,"evidence_quote":"Supplies the common-source cascode topology and the inductor design choices that ground the LNA architecture."},{"cited_title":"Leroux and M","cited_arxiv_id":null,"evidence_quote":"Provides the LNA-ESD co-design approach used to include ESD diode protection on the fabricated pads."},{"cited_title":"Farahani, ZigBee Wireless Networks and Transceivers","cited_arxiv_id":null,"evidence_quote":"Defines the ZigBee/IEEE 802.15.4 standard specifications the LNA is designed to meet."},{"cited_title":"Noise Optimization of an Inductively Degenerated CMOS Low Noise Amplifier,","cited_arxiv_id":null,"evidence_quote":"Supplies the noise-optimization method behind the CX noise-figure capacitor."},{"cited_title":"A 1.5-V , 1.5-GHz CMOS Low Noise Ampli- fier,","cited_arxiv_id":null,"evidence_quote":"Establishes the inductively degenerated input matching principle used to set Ls and Lg."},{"cited_title":"Linearization of CMOS LNA’s via Optimum Gate Biasing,","cited_arxiv_id":null,"evidence_quote":"Shows gate biasing can linearize CMOS LNAs, supporting the IIP3 optimization strategy."},{"cited_title":"Intermodulation Linearity Characteristics of CMOS Transistors in a 0.13 µm Process,","cited_arxiv_id":null,"evidence_quote":"Locates the IIP3 peak at a specific current density, used to choose the bias and transistor width."},{"cited_title":"A Low-Power RF Direct-Conversion Re- ceiver/Transmitter for 2.4-GHz-Band IEEE 802.15.4 Standard in 0.18- µm CMOS Technology,","cited_arxiv_id":null,"evidence_quote":"Provides the 2.4 GHz IEEE 802.15.4 receiver specification reference used for the design targets."},{"cited_title":"MOST Moderate-Weak- Inversion Region as the Optimum Design Zone for CMOS 2.4-GHz CS-LNAs,","cited_arxiv_id":null,"evidence_quote":"Supplies the moderate-weak inversion design zone and the state-of-the-art comparison point for 2.4 GHz CMOS CS-LNAs."},{"cited_title":"Computation of Large-Signal S-parameters by Harmonic-Balance Techniques,","cited_arxiv_id":null,"evidence_quote":"Supplies the large-signal S-parameter technique used to model the -13 dBm measurement condition."}],"review_version":1}