{"id":"cfc57c47-b57a-4726-9f85-a7ace70cc2bd","arxiv_id":"2509.08092","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":7.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":0,"one_line_summary":"Monolithic 3D stacking of tantala photonics onto lithium niobate enables low-loss interlayer routing and combined second- and third-order nonlinear frequency conversion on a single wafer.","lead":"This paper reports a way to build photonic circuits made of tantalum pentoxide directly on top of an existing lithium niobate chip, mixing two nonlinear optical materials in one 3D stack. It demonstrates low-loss waveguides, light routing between layers, and several types of frequency conversion in the same device.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The 'arbitrary substrates' claim rests on one LN-on-Si demonstration, while Sec. 3's 500 °C/12 h anneal and CMP impose thermal/mechanical budgets not shown to be compatible with any other substrate; the broad claim is unsupported.","rationale":"I read the paper in good faith. The experimental core is credible: the authors show low-loss tantala waveguides and resonators, functional interlayer tapers, PPLN SHG, OPO, and soliton combs on the tantala-LN platform. These results independently support the value of the specific LN-based integration, and the reader's CONDITIONAL verdict is appropriate. However, the strongest_claim includes 'arbitrary substrates,' and that is the load-bearing part of the title and abstract. The paper's own process description undercuts the universal wording: a 500 °C/12 h anneal and CMP are not compatible with 'arbitrary' substrates without evidence. The reader's weakest_assumption identifies exactly this gap, and I agree. No amount of excellent data on LN-on-Si can establish arbitrary-substrate compatibility by itself. The concrete test above would either substantiate the broad claim or force a precise restriction to known thermal/mechanical budgets.","tokens_in":11747,"tokens_out":5463,"duration_ms":66751,"concrete_test":"Run the full Sec. 3 flow (CMP, room-temperature IBS, patterning, ALD SiO2, and 500 °C/12 h anneal) on a second substrate class with a strictly lower thermal budget, e.g., a fused-silica wafer coated with a polymer lower cladding or a CMOS-like wafer with Al/Cu metallization, and quantify before/after: lower-layer device loss or electrical resistivity, tantala film stress/cracking, and adhesion. If any metric degrades or the film delaminates, the 'arbitrary substrates' claim must be restricted to high-thermal-budget substrates; if it survives unchanged, the claim gains real support.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim (title, abstract, conclusion) is that tantala photonics can be monolithically 3D-integrated onto arbitrary substrates without compromising substrate performance. The only demonstration is thin-film LN-on-Si. The process in Sec. 3, however, is not substrate-agnostic as presented: after room-temperature IBS, the wafer receives a conformal ALD SiO2 layer and a 500 °C, 12 h anneal, and before that the surface is planarized by CMP. A 500 °C/12 h thermal step exceeds the budget of many photonic platforms (polymers, InP with backend metals, CMOS BEOL Cu/low-k), and CMP imposes mechanical and chemical constraints. No second substrate is tested, and no lower-layer device is characterized before/after the full stack. The conclusion's 'low-temperature processing' wording is therefore an overstatement for the pure-tantala process used here; the titanium-doped bypass of the anneal [39] is not used in the reported devices. If 'arbitrary' is narrowed to high-thermal-budget, oxide-clad substrates such as LN-on-Si, the demonstrated results stand, but the broad claim as written is load-bearing and unsupported.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper introduces a monolithic 3D integration process in which tantala photonics are deposited by room-temperature ion-beam sputtering onto a patterned thin-film lithium niobate (LN) substrate, with oxide planarization and a 500 °C / 12 h anneal. The authors demonstrate low-loss tantala waveguides with intrinsic quality factors on the order of 5 million, interlayer taper losses below 0.2 dB at 1550 nm and 0.5 dB at 780 nm, quasi-phase-matched SHG in poled LN with geometry-normalized efficiencies up to 13000 %W−1cm−2, octave-spanning χ(3) OPO, dark-pulse soliton microcombs, and a cascaded χ(3)–χ(2) device. The central claim is that this constitutes full-wafer, monolithic 3D integration of tantala photonics onto arbitrary substrates, with thin-film LN on silicon as the demonstration platform.","tokens_in":12055,"tokens_out":6253,"duration_ms":72018,"significance":"If the central claim is accepted, this is a significant advance: it provides a wafer-level route to combine a low-loss χ(3) tantala platform with a χ(2) LN platform, including efficient vertical interlayer tapers and a broad nonlinear device palette. The paper is strong on experimental breadth and on transparent use of prior Sellmeier data and FEM simulation for dispersion and quasi-phase-matching design, with the acknowledged phase-matching offset a sign of honest reporting. The main weakness is that the 'arbitrary substrates' claim is supported by only one substrate and by a process that includes a 500 °C anneal and CMP, which are not substrate-agnostic. The quantitative headliner metrics also lack uncertainty analysis.","major_comments":[{"comment":"The central, load-bearing claim is monolithic 3D integration of tantala photonics onto 'arbitrary substrates'. The only demonstration is thin-film LN on silicon. The process flow includes ALD SiO2 deposition, CMP planarization, and a 500 °C / 12 h anneal after room-temperature IBS. A 500 °C step exceeds the thermal budget of many platforms (polymers, III–V with backend metals, CMOS BEOL Cu/low-k), and CMP imposes mechanical/chemical constraints that are not substrate-agnostic. The anneal-free titanium-doped variant [39] is mentioned but not used. The conclusion's 'low-temperature processing' is therefore an overstatement for the demonstrated process. Either demonstrate a second substrate or lower-layer device before/after processing, or revise the title/abstract/conclusion to the demonstrated LNOI-compatible process.","section":"Sec. 3 / Fig. 2a; title/abstract/conclusion"},{"comment":"The phrase 'without compromising substrate performance or compatibility' is not directly evidenced. No identical lower-layer device (e.g., a PPLN waveguide or high-Q LN resonator) is characterized before and after tantala deposition, CMP, and the 500 °C anneal. The reported SHG after integration is impressive, but it does not show that the lower layer is unaffected. Provide comparative Q and SHG efficiency measurements with and without the upper tantala stack, or state that this compatibility has not yet been tested. This is load-bearing for the integration claim.","section":"Sec. 3 (fabrication) and Sec. 4 (SHG)"},{"comment":"Quantitative headline metrics are given without error bars or uncertainty analysis: Q_i 'on the order of 5 million' and ~7×10^5–1×10^6 in Fig. 2b; loss per taper transition '<0.2 dB' (1550 nm) and '<0.5 dB' (780 nm) in Fig. 2e; SHG conversion efficiencies 13000/2200/4500 %W−1cm−2 in Fig. 3f. The number of devices, fit residuals, and calibration uncertainties are not reported. Since these values are the evidence for 'low-loss' and 'efficient' performance, the paper should provide uncertainty and sample-size information or clearly state that the values are representative single-device measurements.","section":"Secs. 3–4; Figs. 2b, 2e, 3f"}],"minor_comments":[{"comment":"'fluorene-based plasma' is likely a typo for 'fluorine-based plasma'; please correct.","section":"Sec. 3"},{"comment":"The introduction says Q_i 'exceeding 5 million' while Sec. 3 says 'on the order of 5 Million'. Make these consistent and report the maximum measured value.","section":"Introduction vs Sec. 3"},{"comment":"Please describe how the loss-per-transition is extracted from the serially cascaded taper test structures (fit model, calibration procedure, number of transitions per device).","section":"Fig. 2e"},{"comment":"State explicitly the quadratic fit form, whether pump depletion is negligible at the highest powers, and how the on-chip pump power calibration accounts for coupling uncertainty.","section":"Fig. 3f / Methods"},{"comment":"Define k_ω and k_2ω explicitly and specify the mode order used in the QPM calculation.","section":"Eq. (1)"},{"comment":"Reference [39] is cited as an arXiv preprint; update if it has been accepted in a peer-reviewed venue.","section":"References"},{"comment":"The statement 'All data necessary to evaluate the conclusions' would be more useful with a supplementary table listing the individual Q_i, taper-loss, and SHG-efficiency values.","section":"Data availability"}],"recommendation":"major_revision","confidential_remarks":"The paper is experimentally strong and likely to be of interest, but the 'arbitrary substrates' wording in the title and abstract will draw criticism because the demonstrated process includes a 500 °C anneal and CMP, and only LN-on-Si is tested. The anneal-free variant in [39] is not used in the reported devices. I recommend major revision: either add a second substrate/compatibility test or carefully scope the claims to the demonstrated LNOI platform. No ethical concerns; self-citations are appropriate given prior work from the same group."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"You should know this one is real in what it actually demonstrates. The authors deposit 570 nm of tantala directly on top of a processed LNOI wafer, route light between the layers with inverse tapers, and show a full nonlinear device palette: high-Q resonators (Qi ~5 million), <0.2 dB taper loss at 1550 nm, SHG in poled LN with thousands of %/W/cm2, octave-spanning OPO, dark-pulse solitons, and a cascaded chi(3)OPO-to-chi(2)SHG circuit. That is a solid experimental package, and the cascaded device is a nice first.\n\nThe modeling is clean: no fitted dispersion parameters, just prior Sellmeier data and a standard FEM mode solver. They even acknowledge a slight QPM wavelength offset and trace it to wafer-level thickness variation, which is the right way to handle that. The citation pattern looks fair, and the self-citations are to the tantala platform work they build on.\n\nWhere I wince is the title and abstract. \"Arbitrary substrates\" is a big claim for a process that includes a 500 °C, 12-hour anneal and CMP. The paper only demonstrates LNOI, and the anneal alone rules out polymers, InP with backend metal, and CMOS BEOL copper. The authors mention that titanium-doped tantala can bypass the anneal (ref 39), but they don’t use it in any reported device. So the compelling claim is not yet supported. That’s the main soft spot.\n\nSecond, the measurements lack error bars and device counts. The Qi values are given as single examples, the taper-loss points are scattered with no uncertainty, and the SHG efficiencies are extracted from single devices. For a platform paper that is supposed to establish manufacturability, that is a real omission, though not a fatal one.\n\nThird, there is no before/after characterization of the LN layer to show the tantala process doesn’t degrade the underlying devices. The fact that SHG works after the full stack is indirect evidence, but it isn’t a quantitative comparison.\n\nOverall: the core technical achievement holds up, and the \"arbitrary substrates\" overclaim is fixable in revision by either narrowing the claim to high-thermal-budget substrates or adding a second demonstration, say on fused silica or SiN. A serious referee should absolutely engage with this—it’s the kind of paper that pushes a platform forward. I’d accept it for review and push for the claims to be brought in line with the evidence.","headline":"A credible and significant demonstration of monolithic tantala-on-LNOI 3D photonic integration, but the 'arbitrary substrates' claim overreaches given the 500 °C anneal and absence of a second substrate test.","tokens_in":12550,"tokens_out":2262,"would_cite":true,"duration_ms":29487,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"Monolithic 3D integration lets tantalum pentoxide photonics be deposited directly onto arbitrary substrates, demonstrated here on lithium niobate, and enables combined second- and third-order nonlinear devices on a single chip.","keywords":["monolithic 3D integration","tantala photonics","lithium niobate","nonlinear optics","optical parametric oscillation","soliton microcombs","second-harmonic generation","interlayer routing"],"falsifier":"Run the identical tantala deposition and 500 °C/12 h anneal on a different photonic platform, for example a silicon-nitride chip or a wafer with pre-patterned electro-optic devices, and compare the lower-layer device's optical loss and electrical performance before and after; any measurable degradation would falsify the 'arbitrary substrate' claim.","tokens_in":11684,"feed_emoji":"🔬","tokens_out":5083,"duration_ms":50159,"temperature":0.7,"pith_summary":"Monolithic 3D integration usually requires bonding or substrate-specific processing. This paper claims that tantalum pentoxide (tantala) photonics can be deposited directly on top of arbitrary photonic substrates at room temperature, with only low-temperature anneals, and still deliver high-performance devices. On a lithium niobate platform, the authors show low-loss tantala waveguides with quality factors above five million, efficient routing between the tantala and LN layers, and simultaneous operation of third-order nonlinear tantala devices and second-order nonlinear poled-LN devices. If the approach generalizes to other substrates, it would let fab-scale foundries add nonlinear and visible-light photonics to existing chip platforms without changing the substrate. The paper only demonstrates the process on LN-on-silicon, so the 'arbitrary substrate' claim rests on compatibility assumptions that remain untested.","feed_headline":"Tantala photonics stacks in 3D directly on lithium niobate","feed_subtitle":"Room-temperature deposition and interlayer tapers put χ(3) and χ(2) nonlinear optics on one chip.","key_machinery":"The process is the mechanism: direct ion-beam sputtering of tantala onto an already-processed wafer, followed by an oxide filler layer, chemical-mechanical planarization, and lithographic patterning of the tantala. The load-bearing parts are the low-stress, low-temperature tantala film, which lets the upper layer be built without disturbing the substrate, and vertically coupled inverse tapers in both layers, which adiabatically transfer the optical mode between the tantala and LN waveguides with measured loss below 0.2 dB at 1550 nm.","core_discovery":"The central discovery is a wafer-scale process flow in which tantala is sputtered and patterned directly on top of a prefabricated photonic substrate—demonstrated with thin-film lithium niobate on silicon—and then used to make high-Q microresonators, photonic-crystal resonators, and interlayer tapers. Because tantala is deposited at room temperature, annealed at only 500 °C, and has low residual stress, the upper layer can be built without removing or reflowing the lower substrate. The paper demonstrates the payoff: a single chip that does χ(3) optical parametric oscillation and soliton comb generation in tantala, χ(2) second-harmonic generation in poled LN, and cascaded χ(3)→χ(2) conversion","pith_inferences":["The 'arbitrary substrate' claim is broader than what is demonstrated; a natural next test would run the same flow on silicon nitride or on a wafer containing pre-patterned electro-optic devices, measuring lower-layer performance before and after.","The measured SHG phase-matching offset between chips hints at wafer-level thickness variations; adapting the poling pitch to measured thickness maps could close that gap and is a cheap, testable improvement.","If tantala can be doped (e.g., with titanium) to relax the anneal, the thermal budget drops further, making the process plausible on temperature-sensitive substrates such as polymer or III-V wafers.","Interlayer taper loss at 780 nm is higher than at 1550 nm; extending the taper length or optimizing modal overlap specifically in the visible could yield visible-band 3D routing that is loss-competitive with single-layer guides."],"forward_implications":["If the process transfers to other substrates, a single foundry line could add broadband visible and SWIR nonlinear photonics to silicon nitride, silicon, or lithium tantalate platforms without bonding steps.","The demonstrated cascaded χ(3)-χ(2) device shows that interlayer routing can combine nonlinear processes that no single material supports efficiently.","Low-loss interlayer tapers make 3D routing a practical tool for dense photonic circuits, not just a research demo.","Quality factors above 5 million in the upper tantala layer indicate that the integration process does not catastrophically degrade the deposited tantala's loss, preserving low parametric-oscillation thresholds.","Room-temperature deposition and low annealing temperatures keep the process compatible in principle with backend-of-line CMOS-style integration, opening a path to photonics directly on electronics wafers if thermal-budget constraints are met."],"supporting_citations":[{"why":"Establishes tantala as a low-loss χ(3) nonlinear integrated photonics platform, the material foundation for the upper layer.","marker":"[6]"},{"why":"Provides tantala group-velocity-dispersion and refractive-index data used to design waveguides and resonators.","marker":"[37]"},{"why":"Supplies the MgO-doped LiNbO3 refractive-index model used to compute quasi-phase-matching pitch and SHG wavelengths.","marker":"[38]"},{"why":"Demonstrates periodic poling with micrometer-range period in thin-film lithium niobate, the poling method adopted here.","marker":"[16]"},{"why":"Introduces edgeless photonic-crystal resonators used for the dark-pulse soliton generation demonstrated in this work.","marker":"[33]"},{"why":"Shows nanopatterned parametric oscillators in tantala, the baseline design for the octave-spanning OPO and microcomb devices.","marker":"[45]"},{"why":"Demonstrates heterogeneous tantala photonic integrated circuits, the contrasting integration approach this work aims to supersede with a monolithic flow.","marker":"[20]"},{"why":"Provides actively monitored periodic-poling in thin-film lithium niobate with high conversion efficiency, informing the poling process used here.","marker":"[40]"}],"fun_headline_variants":["Monolithic 3D tantala photonics on any substrate","3D tantala photonics stack on lithium niobate","Tantala photonics: 3D integration for χ(2) and χ(3)","Room-temp tantala 3D integration enables dual nonlinear optics","Wafer-scale 3D tantala photonics on arbitrary substrates"],"cache_read_input_tokens":2688,"weakest_assumption_plain":"The process can be applied to 'arbitrary substrates' without degrading them—specifically, the 500 °C anneal and chemical-mechanical planarization step have only been tested on lithium niobate on silicon, and nothing in the paper shows they leave other optical materials or prefabricated devices unharmed.","fun_headline_variants_meta":{"raw":{"variants":["Monolithic 3D tantala photonics on any substrate","3D tantala photonics stack on lithium niobate","Tantala photonics: 3D integration for χ(2) and χ(3)","Room-temp tantala 3D integration enables dual nonlinear optics","Wafer-scale 3D tantala photonics on arbitrary substrates"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000324,"raw_usage":{"total_tokens":1705,"prompt_tokens":843,"completion_tokens":862,"prompt_tokens_details":{"cached_tokens":256},"prompt_cache_hit_tokens":256,"prompt_cache_miss_tokens":587,"completion_tokens_details":{"reasoning_tokens":767}},"tokens_in":587,"tokens_out":862,"duration_ms":9355,"temperature":1.0,"reasoning_tokens":767,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-04T21:16:08.723032+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Run the identical tantala deposition and 500 °C/12 h anneal on a different photonic platform, for example a silicon-nitride chip or a wafer with pre-patterned electro-optic devices, and compare the lower-layer device's optical loss and electrical performance before and after; any measurable degradation would falsify the 'arbitrary substrate' claim.","supporting_citations":[{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Establishes tantala as a low-loss χ(3) nonlinear integrated photonics platform, the material foundation for the upper layer."},{"cited_title":"A.et al.Group-velocity-dispersion en- gineering of tantala integrated photonics.Optics Letters46, 817 (2021)","cited_arxiv_id":null,"evidence_quote":"Provides tantala group-velocity-dispersion and refractive-index data used to design waveguides and resonators."},{"cited_title":"& Arie, A","cited_arxiv_id":null,"evidence_quote":"Supplies the MgO-doped LiNbO3 refractive-index model used to compute quasi-phase-matching pitch and SHG wavelengths."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Demonstrates periodic poling with micrometer-range period in thin-film lithium niobate, the poling method adopted here."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Introduces edgeless photonic-crystal resonators used for the dark-pulse soliton generation demonstrated in this work."},{"cited_title":"M., Liu, H., Carlson, D","cited_arxiv_id":null,"evidence_quote":"Shows nanopatterned parametric oscillators in tantala, the baseline design for the octave-spanning OPO and microcomb devices."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Demonstrates heterogeneous tantala photonic integrated circuits, the contrasting integration approach this work aims to supersede with a monolithic flow."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Provides actively monitored periodic-poling in thin-film lithium niobate with high conversion efficiency, informing the poling process used here."}],"review_version":1}