{"id":"e8c2aa31-9e69-4d27-a7fc-26b0e72eb8fc","arxiv_id":"2509.09964","paper_version":3,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":7.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":0,"one_line_summary":"Monolayer MoS2, WS2, and WSe2 nanoribbons with widths down to 25 nm reach record current densities, including above 400 µA/µm in enhancement-mode WS2 devices.","lead":"This study reports nanoribbon transistors made from atomically thin molybdenum and tungsten dichalcogenides, with channel widths down to 25 nm, reaching record on-state currents for single-gated devices. A multi-patterning fabrication process and anchored contacts improve yield, pointing toward a scalable path for 2D semiconductor nanosheet transistors.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Width-normalization uncertainty undermines quantitative record claims: 3–5 nm AFM/SEM width error is 10–20% at 25 nm, and the WS2 '>100×' benchmark lacks a published comparison table.","rationale":"The central claim is a set of record current densities at specific widths. All of these numbers are computed by dividing ID by Wch, so the validity of the width extraction is the hinge on which the quantitative records turn. The paper itself admits a 3–5 nm width uncertainty, which is 10–20% at 25 nm, yet the abstract and benchmarking figures present the numbers as sharp values. The bias direction is ambiguous: AFM convolution could make the quoted densities conservative, while edge depletion could make the physical-width normalization poorly defined. Neither possibility is ruled out by the TEPL/TEM data because those were taken on wider or transferred ribbons. The '>100×' WS2 comparison is also not verifiable in the provided text because Supplementary Table S1 is absent. These are addressable, not fatal; the qualitative demonstration remains credible. The reader's CONDITIONAL verdict is appropriate; the proposed width-series experiment would resolve the condition. Therefore UNCHANGED.","tokens_in":14919,"tokens_out":9581,"duration_ms":113678,"concrete_test":"Fabricate a width series (e.g., ~25, 43, 60, 75, 150, 300, 850 nm) with identical Lch (~300 nm) and the same SiO2 back-gate, at least 5 devices per width. Measure ID at VDS=1 V at a fixed gate overdrive, and plot raw ID versus the AFM/SEM FWHM width and versus an independent width measured by TEM or high-resolution SEM on the same devices. Fit ID = g_m (W - δW). If δW is consistent with zero within fit error, the width normalization is unbiased; if δW is positive (negative), the active/physical width offset should be applied to all record currents, including the 25 nm and 50 nm values, and the reported µA/µm should be corrected. This would directly test whether the 10–20% uncertainty changes the record claims.","verdict_should_be":"UNCHANGED","load_bearing_attack":"All quoted current densities (560/420/130/310 µA/µm) are ID divided by a channel width extracted from AFM/SEM contrast line profiles fitted to a Gaussian, with the width defined as the FWHM. The paper explicitly acknowledges a 3–5 nm uncertainty in this extraction ('which implies 10 to 20% uncertainty of current density'), but the abstract and record claims are quoted without error bars and the 'surpass ... by over 100 times' language does not propagate this uncertainty. The bias can be signed: AFM tip convolution generally broadens sub-50 nm features, so the FWHM may overestimate the true ribbon width, making the quoted current density an underestimate (conservative); however, if the electrically active width is narrower than the physical ribbon because of edge depletion or mixed zigzag/armchair edge disorder, then the physical-width-normalized value is not a measure of the active-channel current density, and the comparison to prior work is sensitive to how prior widths were measured. The edge-quality evidence (TEPL, Raman, TEM) is obtained on 75 nm or transferred ribbons, not on the specific 25 nm or 50 nm high-κ record devices, so we cannot rule out that the narrowest devices have different edge conduction/depletion. Finally, the WS2 '>100×' claim is supported only by a reference to Supplementary Table S1, which is not present in the text provided, so the fairness of the comparison (VDS, VGS range, width definition, enhancement vs depletion mode) cannot be independently checked. The central qualitative conclusion — top-down TMD nanoribbons can carry high current — is credible, but the quantitative record values are conditional on resolving the width normalization.","agreement_with_reader":"partial"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper reports top-down fabricated monolayer MoS2, WS2, and WSe2 nanoribbon transistors with channel widths down to 25 nm and lengths down to 50 nm, using 'anchored' contacts and a litho-etch-litho-etch (LELE) multi-patterning approach. The central claim is that these devices reach on-state current densities of 560, 420, and 130 µA/µm at VDS = 1 V for MoS2, WS2, and WSe2, respectively, when integrated with thin HfO2, and that the WS2 value surpasses previous single-gated monolayer TMD nanoribbons by over 100×, even in enhancement-mode operation. The paper also presents TLM contact-resistance extraction on ~30 devices, low-temperature transport, Raman/TEPL/TEM edge characterization, and off-state array measurements, and concludes that nanoribbon width scaling down to ~25 nm does not degrade transport, supporting the viability of TMD nanoribbons for future nanosheet transistors.","tokens_in":15205,"tokens_out":3356,"duration_ms":42240,"significance":"If the quantitative claims hold, the paper is significant: it would be one of the first demonstrations that top-down patterned monolayer TMD nanoribbons retain high current density at widths relevant to future gate-all-around nanosheet transistors, and it extends the material set to n-type MoS2, n-type WS2, and p-type WSe2. The fabrication advances (anchored contacts, LELE patterning) and the combination of electrical, optical, and structural characterization are genuine strengths. The TLM dataset with 30 devices and the low-temperature measurements add statistical and physical depth. However, the headline record claims depend on width-normalization assumptions and on single devices at the smallest widths, and the '>100×' benchmark is not independently verifiable from the provided text. These issues are load-bearing for the paper's central advertised conclusions, so the significance is conditional on their resolution.","major_comments":[{"comment":"The record current densities are normalized by channel widths extracted from Gaussian FWHM fits to AFM/SEM contrast line profiles. The paper acknowledges '3-5 nm uncertainty of our nanoribbon width estimates... which implies 10 to 20% uncertainty of current density,' but neither the abstract nor Fig. 2d propagates this uncertainty into the reported 560/420/130 µA/µm values or the 'over 100×' benchmark. At 25 nm width, a 3-5 nm error is 12-20%, comparable to or larger than the claimed record margins. The bias could also be signed: AFM tip convolution may overestimate width (making the quoted current density conservative), while edge depletion or reduced active width would make it an overestimate of active-channel current density. Please provide explicit error bars or ranges on all quoted current densities, state the direction of the likely bias, and discuss whether the electrically active","section":"MoS2 nanoribbons (Fig. 2d) and Methods (width extraction)"},{"comment":"The 43 nm and 25 nm MoS2 devices in Fig. 2d are described as 'two such devices' with no statistics, and the high-κ devices in Fig. 4c are presented as single representative curves without error bars or replicate counts. The robust 30-device TLM dataset is at 75 nm width, not at the 25-50 nm widths that support the 'record' and 'no degradation' claims. For load-bearing quantitative claims, either provide multiple devices at each width/dielectric condition with mean±spread, or explicitly state in the abstract and conclusions that the sub-50 nm and high-κ values are single-device demonstrations subject to width uncertainty. Without this, the 'highest current density reported to date' and 'no performance degradation' statements overreach the presented data.","section":"Figs. 2d and 4c; conclusions"},{"comment":"The claim that the WS2 nanoribbon exceeds prior reports 'by over 100 times' is supported only by a reference to Supplementary Table S1, which is not present in the provided manuscript text. The main-text benchmarking plots (Fig. 4e/f) do not let the reader reproduce the comparison: prior values are shown as unlabeled/small markers with no numerical values, and the conditions (VDS, VGS range, width definition, enhancement vs. depletion mode) are not tabulated. Since this is the paper's most striking quantitative benchmark, the comparison must be made verifiable: add the supplementary table, list the prior WS2 device parameters and measured currents, and specify the normalization conventions used. Otherwise the '>100×' claim cannot be independently assessed.","section":"High-κ dielectric integration and benchmarking (Fig. 4e/f)"},{"comment":"The edge-quality evidence (Raman down to ~45 nm, TEPL on ~75 nm ribbons, TEM on transferred arrays) is presented as supporting the absence of edge degradation at the record dimensions, but it is not obtained on the specific 25 nm or 50 nm high-κ devices that carry the headline claims. The TEM samples also underwent an additional transfer step that could alter edge structure. Please either provide edge characterization on ribbons at/near the record widths, or temper the conclusion that 'minimal edge degradation' is verified at the dimensions claimed in the abstract. This distinction matters because the width-dependence of edge conduction/depletion is one of the key physics questions motivating the study.","section":"Material characterization (Fig. 3) and conclusions"}],"minor_comments":[{"comment":"The abstract reports 560 µA/µm for MoS2 with HfO2, while the introduction states 'over 600 μA μm-1 with SiO2 gate dielectric (560 μA μm-1 with HfO2 dielectric)' and Fig. 2d shows ~620 µA/µm for the 43 nm SiO2 device. Please make the dielectric/width conditions consistent across abstract, introduction, and figure captions to avoid apparent mismatches.","section":"Abstract and Introduction"},{"comment":"The transfer curves for the 43 nm and 25 nm devices are individual curves with no markers indicating sample count. Even if replicate data are not shown, the caption should state explicitly how many devices were measured and whether the curves are representative or best-case.","section":"Fig. 2d caption"},{"comment":"The caption says 'Unlabeled symbols are MoS2' but several symbols in the plotted region are not individually distinguished; adding a legend or listing the numerical values of prior works in the text or a table would improve reproducibility of the benchmark.","section":"Fig. 4e/f caption"},{"comment":"The width extraction description states that AFM and/or SEM were used, but it is not stated how the two techniques were cross-calibrated or whether the Gaussian FWHM was measured on the channel region or on a wider pad. A sentence clarifying the extraction protocol and its validation would help the reader judge the 3-5 nm uncertainty estimate.","section":"Methods"}],"recommendation":"major_revision","confidential_remarks":"The paper has strong experimental content and the fabrication/characterization suite is appropriate for the journal. My main concern is that the abstract and conclusions assert quantitative records that rest on single devices and a width-normalization convention with 10-20% uncertainty, and the '>100×' WS2 benchmark is not verifiable without the missing Supplementary Table S1. These are fixable with additional measurements, explicit error propagation, and a complete benchmark table. If the authors can provide those, the paper would be a strong candidate for acceptance. If the benchmark table is not available or the single-device claims cannot be supported, the claims should be scaled back accordingly."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Short version: this is a genuine advance for 2D nanosheet transistors, and the main claim holds up—top-down monolayer TMD nanoribbons can carry high current density at 25-50 nm widths. But the record numbers are softer than the abstract suggests, for two specific reasons: single-device statistics at the narrowest widths, and a 10-20% width-normalization uncertainty that never reaches the headline.\n\nWhat's new and good: the anchored dog-bone contacts solve a real delamination problem and boost yield; the LELE multi-patterning is a sensible way to get below 50 nm without high e-beam dose; this is the first enhancement-mode WS2 nanoribbon above 400 µA/µm and the first p-type WSe2 nanoribbon at these dimensions. The 75 nm data set is properly done: 30 devices, TLM with channel-length scaling, contact resistance comparable to best MoS2/Au, low-temperature and off-state checks. The TEPL and TEM work is careful and gives credibility to the claim that edges aren't degrading transport. No fitted parameters; these are direct measurements.\n\nSoft spots: the 560/420/130 µA/µm headline numbers are each from a single device. The authors admit they can't get statistically meaningful sets below 75 nm, which is honest, but it means the records are proof-of-principle, not established values. Second, width extraction from AFM/SEM Gaussian FWHM carries a 3-5 nm error, which they disclose in the Methods but never attach to the record claims. At 25 nm that's 10-20%, and the direction isn't calibratable from the text. Third, the 'over 100x' WS2 benchmark is referenced to a Supplementary Table that wasn't in the text I saw; I could not check the VDS, overdrive, or width definitions used for the prior devices. The comparison may be fair, but it's not auditable as presented. Minor point: edge-quality evidence is mostly on 75 nm or transferred ribbons, not on the 25 nm high-κ device itself.\n\nWhether you agree with the quantitative framing or not, the paper deserves a serious referee. I'd recommend conditional acceptance: propagate the width uncertainty, label single devices clearly, and put the comparison table in the main text. Anyone working on 2D logic or nanosheets should read it.","headline":"Strong experimental paper; the central claim is credible, but the headline records rest on single devices and a 10-20% width uncertainty that isn't propagated.","tokens_in":15869,"tokens_out":3567,"would_cite":true,"duration_ms":38865,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"Top-down patterned monolayer transition-metal dichalcogenide nanoribbons retain high current density down to 25 nm channel widths, setting records for single-gated nanoribbons.","keywords":["two-dimensional semiconductors","transition metal dichalcogenides","nanoribbon transistor","MoS2","WS2","WSe2","tip-enhanced photoluminescence","gate-all-around nanosheet"],"falsifier":"Fabricate a width series of monolayer MoS2 nanoribbons from ~20 to ~100 nm on one chip, extract physical widths by the paper's Gaussian FWHM method, and plot saturation current per micron at fixed gate overdrive. If the points do not scale linearly with width, or if the 25 nm device's current density is not reproducible across several nominally identical devices, the claim that width scaling preserves current density would be contradicted. A gated Hall measurement that independently determines the conducting width would cross-check the normalization directly.","tokens_in":14771,"feed_emoji":"⚡","tokens_out":7186,"duration_ms":74943,"temperature":0.7,"pith_summary":"This paper reports that monolayer transition-metal dichalcogenide (TMD) nanoribbons can be scaled to channel widths of 25 nm and lengths of 50 nm without losing the high on-state currents seen in micrometer-wide devices. Using a top-down multi-patterning process with 'anchored' contacts that hold the fragile monolayer to the substrate, the authors fabricate n-type MoS2 and WS2 and p-type WSe2 nanoribbons and measure on-state currents of 560, 420, and 130 µA/µm at 1 V drain bias, respectively. The WS2 result is more than 100 times higher than prior single-gated WS2 nanoribbons and comes in a normally-off (enhancement-mode) device. Nanoscale imaging with tip-enhanced photoluminescence, Raman spectroscopy, and electron microscopy shows no obvious edge damage, which the authors take as evidence that edge effects are not limiting at these dimensions. If correct, this clears a major obstacle to using monolayer TMDs as channels in future gate-all-around nanosheet transistors.","feed_headline":"Nanoribbon transistors hit record currents at 25 nm width","feed_subtitle":"Top-down patterning of monolayer TMDs keeps currents high at 25 nm widths, a step toward gate-all-around nanosheet transistors.","key_machinery":"Two fabrication innovations carry the argument. The 'anchored' contact uses a dog-bone-shaped TMD pattern, in which the ribbon widens into micrometer-scale pads under the source and drain contacts; this prevents delamination and yields over 90% working devices at 75 nm width. A litho-etch-litho-etch (LELE) multi-patterning scheme defines ribbons down to ~25 nm while keeping electron-beam dose low and thus limiting lithographic damage. Supporting evidence comes from tip-enhanced photoluminescence and electron microscopy, which show minimal edge degradation, and from transfer-length-method measurements giving contact resistance comparable to the best reported MoS2/Au contacts. Current densitie","core_discovery":"The central claim is that top-down patterned monolayer TMD nanoribbons with channel widths down to 25 nm and lengths down to 50 nm achieve on-state currents of 560, 420, and 130 µA/µm at VDS = 1 V for MoS2, WS2, and WSe2, respectively, surpassing prior reports for single-gated nanoribbons, the WS2 by over 100 times, even in normally-off (enhancement-mode) transistors. The authors further claim that these narrow ribbons perform as well as co-fabricated micrometer-wide control devices, and that their edges remain smooth at the few-nanometer scale with mixed zigzag/armchair termination. Taken together, the paper argues that width scaling does not degrade transport in monolayer TMDs at these dim","pith_inferences":["My inference: the same process should be pushed to ~10 nm widths; below some width the mixed zigzag/armchair edges that suppress leakage will likely start scattering carriers, setting a lower limit the paper does not sample.","My inference: the single-gate geometry used here is a test vehicle; moving to gate-all-around nanosheet transistors will change electrostatics and contact geometry, so the exact current-density numbers may not carry over.","My inference: the >100x benchmark improvement over prior WS2 nanoribbons may partly reflect different width definitions across laboratories; a standardized width metrology would make such comparisons trustworthy.","My inference: the low off-state leakage in nanoribbon arrays suggests dense packing is feasible; measuring threshold-voltage variation across many 25 nm devices would test manufacturability."],"forward_implications":["If correct, top-down monolayer TMD nanoribbons can serve as the channel building block for gate-all-around nanosheet transistors, since sub-50 nm widths do not cost current density.","Monolayer WS2 nanoribbons combine normally-off operation with current densities over 100 times larger than prior single-gated WS2 nanoribbons, making WS2 viable for low-power logic.","The p-type WSe2 nanoribbon result at 130 µA/µm with enhancement-mode behavior narrows the historical performance gap between n- and p-type 2D transistors.","The absence of measurable edge conduction in the off-state (on/off ratios above 10^8) implies that top-down edges do not create leakage paths at these widths.","Because the process works for three different TMDs and with thin HfO2 dielectrics, the anchored-contact and multi-patterning approach should transfer to other monolayer semiconductors."],"fun_headline_variants":["25-nm TMD nanoribbon transistors set record on-currents","WS2 nanoribbon transistor surpasses prior record by 100x","Both n- and p-type TMD nanoribbons reach record currents at 25 nm","Top-down monolayer TMD nanoribbons outperform at 25 nm"],"cache_read_input_tokens":2304,"weakest_assumption_plain":"The load-bearing premise is that the electrically active channel width equals the physical width read from AFM/SEM contrast profiles; if the conducting path is narrower (edge depletion or reduced carrier density at mixed zigzag/armchair edges), the reported current densities are systematically overestimated by 10–20%.","fun_headline_variants_meta":{"raw":{"variants":["25-nm TMD nanoribbon transistors set record on-currents","WS2 nanoribbon transistor surpasses prior record by 100x","Both n- and p-type TMD nanoribbons reach record currents at 25 nm","Top-down monolayer TMD nanoribbons outperform at 25 nm"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.001387,"raw_usage":{"total_tokens":5483,"prompt_tokens":805,"completion_tokens":4678,"prompt_tokens_details":{"cached_tokens":256},"prompt_cache_hit_tokens":256,"prompt_cache_miss_tokens":549,"completion_tokens_details":{"reasoning_tokens":4592}},"tokens_in":549,"tokens_out":4678,"duration_ms":36657,"temperature":1.0,"reasoning_tokens":4592,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-04T18:22:58.932525+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Fabricate a width series of monolayer MoS2 nanoribbons from ~20 to ~100 nm on one chip, extract physical widths by the paper's Gaussian FWHM method, and plot saturation current per micron at fixed gate overdrive. If the points do not scale linearly with width, or if the 25 nm device's current density is not reproducible across several nominally identical devices, the claim that width scaling preserves current density would be contradicted. A gated Hall measurement that independently determines the conducting width would cross-check the normalization directly.","supporting_citations":[],"review_version":1}