{"id":"f0ec96a4-dadf-4167-801c-2a8645a35830","arxiv_id":"2509.10627","paper_version":1,"verdict":"REJECT","confidence":"MODERATE","novelty_score":5.0,"correctness_risk":"high","formal_verification":"none","parameter_count":4,"one_line_summary":"ReCross combines co-occurrence grouping, log-scaled duplication, and a dynamic read/MAC ADC to cut DLRM embedding reduction time by 3.97x and energy by 2.35x against nMARS in NeuroSim simulations.","lead":"ReCross is a hardware/software scheme that stores recommendation-model embeddings in ReRAM crossbars, groups embeddings that are looked up together, duplicates popular ones, and switches between read and add modes to save energy. If it works, it could make large recommendation systems faster and cheaper to run, though the paper's headline efficiency gain conflicts with its own later numbers.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Missing accuracy evaluation for 3-bit read / 6-bit MAC quantization leaves the efficiency claim untethered to deployable quality.","rationale":"The reader's weakest_assumption identified the same gap: no accuracy evaluation after quantization to 6-bit ADC and 3-bit read mode. I agree this is the most load-bearing concern because it is a prerequisite for the entire approach. Other issues are also present: the abstract's 6.1x energy claim is contradicted by the 2.35x average in Section VI, the offline tuning uses the same dataset as evaluation, and REREC is omitted from comparison. But the accuracy gap is the most fundamental: the design explicitly trades precision for energy, and without demonstrating that output quality is preserved, the central efficiency claim lacks real-world significance. The proposed concrete test would directly settle whether the quantization is acceptable.","tokens_in":12103,"tokens_out":5949,"duration_ms":59093,"concrete_test":"Run a standard DLRM on the same Amazon Review data and compute embedding reductions in (a) full float32 precision, (b) 6-bit quantized MAC, and (c) 3-bit read for single-embedding accesses; then measure AUC or Recall@k for each. If the quantized versions change the ranking metric by more than a small threshold (e.g., 1% relative), the efficiency claims do not translate to a deployable system.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The paper's design deliberately reduces ADC precision: full MAC operations use 6-bit ADCs, and single-embedding accesses (25.9%–53.5% of crossbar activations per Fig. 6) use a 3-bit read mode (Section IV-B). The abstract's claimed 6.1x energy improvement hinges on these lower-precision reads producing acceptable embedding sums. However, the paper never evaluates DLRM accuracy, recall, or ranking quality after quantization; it only reports latency and energy (Section IV-B). If the 3-bit read path or 6-bit MAC path materially corrupts embedding reductions, the accelerator's outputs are unusable, and the efficiency gains are irrelevant. This is a load-bearing gap because the energy savings come directly from reducing ADC resolution, and the paper provides no evidence that the precision/accuracy trade-off is acceptable.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"ReCross proposes a ReRAM-based in-memory computing scheme for DLRM embedding reduction. The offline phase constructs a co-occurrence graph from embedding lookup history, groups correlated embeddings to reduce crossbar activations, and duplicates frequently accessed embeddings using a log-scaling formula. The online phase uses a dynamic switch ADC to choose between full MAC operations and lower-cost read operations when only a single embedding is accessed. The system is evaluated in NeuroSim on five Amazon Review workloads, reporting speedup and energy-efficiency improvements against a naive baseline and the nMARS architecture.","tokens_in":12248,"tokens_out":4627,"duration_ms":47837,"significance":"If the claims are validated, the main contribution is a hardware/software co-design that targets the embedding-reduction bottleneck with ReRAM crossbars, combining correlation-based grouping and runtime read/MAC switching. The dynamic switch ADC idea is plausible and the NeuroSim-based evaluation is a reasonable first-order estimate. However, the current manuscript does not provide enough evidence to establish the central efficiency claims as deployable: the headline energy number is internally inconsistent, the quantization is never validated against recommendation quality, and the offline optimization is evaluated on the same data used to derive it.","major_comments":[{"comment":"The abstract states a 6.1x improvement in energy efficiency compared to state-of-the-art IMC approaches, and the introduction repeats '8.4x (6.1x)' versus nMARS. However, Section VI reports only 2.35x average energy improvement over nMARS, and the per-workload numbers in Section IV-B (1.39, 1.64, 2.43, 3.65, 2.62) average to 2.35. The 6.1x value appears nowhere in the actual results against nMARS. The claimed headline result is contradicted by the paper's own data and must be corrected.","section":"Abstract vs. Section VI"},{"comment":"No accuracy or recommendation-quality evaluation is provided for the 6-bit ADC quantization or the 3-bit read mode. The design explicitly reduces ADC resolution to save energy, and Section IV-B claims a large fraction of single-embedding accesses use the 3-bit read path. The paper measures only latency and energy, never AUC, recall, or any ranking metric. If quantization materially changes the embedding sums, the efficiency gains do not translate to a usable accelerator. This is a load-bearing gap because the energy savings stem directly from precision reduction.","section":"Section IV-A/IV-B"},{"comment":"The offline grouping and duplication strategies are derived from the same Amazon Review data used for evaluation, with no temporal split, workload split, or held-out validation described. The co-occurrence graph (Section III-B) and duplication decisions (Section III-C) are optimized on the exact workloads reported in Fig. 8. The reported 3.97x/2.35x improvements are therefore in-sample and may not generalize to future inference traces. A train/test split or evaluation on an unseen workload is necessary to support the central claim.","section":"Section III-B/III-C vs. Section IV-A"},{"comment":"The log-scaling duplication formula Num_copies = floor(log(freq)/log(freq_total)*log(batch_size)) is introduced without derivation or validation. The experiments in Fig. 10 evaluate fixed duplication ratios (5%, 10%, 20%) as area overhead, not the formula's behavior. It is unclear whether Eq. (1) is actually used in the reported results and whether its specific form (e.g., log(batch_size)) is justified. The authors should either derive the formula from an optimization objective or evaluate it directly and compare against fixed-ratio baselines.","section":"Section III-C, Eq. (1)"}],"minor_comments":[{"comment":"The phrase 'reduce energy consumption by 100% per ADC activation' is technically incorrect. Switching from 6-bit to 3-bit read mode reduces the number of comparators from 63 to 7, an 89% reduction, not 100%. Please rephrase.","section":"Section IV-B"},{"comment":"The legend uses 'iMARS' while the text consistently uses 'nMARS'. Also, 'Naïve' is spelled inconsistently across figures.","section":"Fig. 8(a)"},{"comment":"There is a duplicated heading: 'Differences against ReCross. Differences Against ReCross.' Also, the claim that ReCross is 'the first' to explore this direction is too strong given nMARS and REREC are discussed in the same section; please soften.","section":"Section V"},{"comment":"Typo: 'dynamnic' should be 'dynamic'.","section":"Section VI"},{"comment":"The table header is malformed: 'Component Specification' is followed by 'Dataset # of Embedding Avg. Lat' without clear column separators or units for latency. Please format as a proper table.","section":"Table I"},{"comment":"Reference [28] is given as 'Amazon [online]' with a URL to amazon.com; this should be replaced by a proper citation to the Amazon Review dataset (e.g., the Ni et al. paper already cited as [29]).","section":"References"}],"recommendation":"major_revision","confidential_remarks":"The core ideas are interesting and potentially publishable after substantial revision. The most critical issue is the missing accuracy validation: the architecture deliberately reduces ADC precision, and the paper must show that recommendation quality is preserved. The in-sample evaluation methodology is also a serious concern. The internal inconsistency in the headline energy number should be fixed before resubmission. I believe these are addressable within the scope of a major revision, as opposed to being fundamental errors requiring rejection."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"ReCross is a plausible systems contribution; the integrated scheme is not in the prior papers I know, but each element has precedent. The genuinely new pieces are the log-scaled duplication formula and the popcount-driven dynamic switch ADC. Both are simple, sensible moves. The Section VI numbers (3.97x time, 2.35x energy vs nMARS) actually match averages of Fig. 8, so the internally consistent version of the claim is supported by the simulation data.\n\nWhat bothers me, in order.\n\n1. No accuracy evaluation. The design deliberately uses 6-bit ADC for MAC and 3-bit read mode for single embeddings; energy savings come directly from lower precision. The paper only reports latency and energy. For a recommendation accelerator, the whole point is preserving recommendation quality. This is a load-bearing gap, not a stylistic one. They should run at least one DLRM accuracy/ranking experiment or give a numerical error analysis.\n\n2. The abstract's 6.1x energy improvement contradicts Section VI's 2.35x and Fig. 8. The intro also throws around 8.4x (6.1x) with an unclear baseline. That is a real error in the headline claim.\n\n3. The offline grouping and duplication are tuned on the same Amazon Review data used for evaluation, with no temporal split or sensitivity analysis. For workload-adaptive mapping that is a limitation, not a fatal one, but it should be acknowledged.\n\n4. No comparison to REREC, the closest prior ReRAM embedding accelerator, and no NeuroSim configs or code released. Reproducibility is thin.\n\nI don't think this should be desk-rejected. The scheme is coherent, the simulation methodology is standard for the subfield, and the missing accuracy evaluation is fixable. With corrected numbers and a real end-to-end quality check, it becomes a solid paper for the architecture/IMC community. I'd send it to peer review demanding major revision. I wouldn't cite it in its current form, and I wouldn't take the 6.1x number at face value.","headline":"A coherent ReRAM/DLRM embedding-scheme paper with a real accuracy-evaluation gap and an overstated energy number in the abstract; deserves major-revision peer review, not desk rejection.","tokens_in":12825,"tokens_out":5018,"would_cite":false,"duration_ms":52674,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"ReCross claims a 3.97x speedup and 6.1x energy-efficiency gain for DLRM embedding reduction on ReRAM crossbars by co-optimizing embedding grouping, duplication, and ADC switching.","keywords":["embedding reduction","ReRAM crossbar","in-memory computing","DLRM inference","co-occurrence grouping","dynamic switch ADC","crossbar utilization","power-law access"],"falsifier":"Measure recommendation quality (e.g., AUC or recall) on the same workloads with the 6-bit ADC and 3-bit read path versus full-precision embedding reduction. If quality drops materially, the efficiency claims do not translate into a usable accelerator.","tokens_in":11921,"feed_emoji":"⚡","tokens_out":4741,"duration_ms":42793,"temperature":0.7,"pith_summary":"The paper proposes ReCross, a scheme to run the embedding-reduction step of deep recommendation models directly on ReRAM crossbar arrays. It argues that naively mapping embeddings to crossbars wastes activations because co-occurring embeddings are scattered across arrays and a few embeddings are accessed far more often than others. ReCross groups embeddings by co-occurrence frequency, duplicates heavily accessed embeddings using a log-scaled replication formula, and adds a dynamic-switch ADC that skips full MAC conversion when only one embedding is retrieved. In circuit-level simulations on five recommendation workloads, ReCross reports a 3.97x reduction in execution time and a 6.1x improvement in energy efficiency over the prior in-memory architecture, and at least two orders of magnitude energy-efficiency gains over CPU and GPU baselines.","feed_headline":"ReCross cuts embedding-reduction time 3.97x on ReRAM","feed_subtitle":"Co-occurrence grouping, log-scaled duplication, and a popcount-driven ADC switch slash energy use in DLRM inference.","key_machinery":"The co-occurrence graph and the dynamic-switch ADC. A co-occurrence graph is built from lookup history with edge weights equal to co-access frequency; a greedy algorithm packs strongly correlated embeddings into the same crossbar to reduce activations. The dynamic-switch ADC, a Flash ADC modified with a popcount circuit, decides between read mode (single 1-bit input, 3-bit resolution) and MAC mode (multiple rows, full 6-bit resolution), disabling unneeded comparators to save energy.","core_discovery":"The central discovery is that the power-law access pattern of embeddings—both in single frequency and co-occurrence—persists even after grouping, so an in-memory accelerator must explicitly address crossbar contention and single-embedding accesses to realize its speedup. ReCross shows that grouping embeddings by co-occurrence weight cuts crossbar activations by up to 8.79x compared to naive mapping; duplicating hot embeddings according to a log-scaled formula balances parallelism without excessive area overhead; and a popcount-triggered dynamic-switch ADC reduces ADC power by using only 3-bit resolution in read mode instead of full 6-bit MAC conversion. The combination of these mechanisms is","pith_inferences":["The same co-occurrence grouping could be applied to other processing-in-memory technologies where activation cost depends on how many rows are touched.","The paper does not evaluate recommendation accuracy under the 6-bit/3-bit quantization; if that degrades ranking quality, the efficiency wins may not carry over to a deployable system.","The log-scaling duplication parameter may need re-tuning for workloads with different skew; the paper only shows convergence at 20% area overhead for its five workloads.","A direct comparison of recommendation quality metrics with and without ReCross would settle whether the efficiency comes at a hidden accuracy cost."],"forward_implications":["If the results hold, embedding reduction can be moved off DRAM and CPU into ReRAM crossbars without the utilization penalty that naive mapping incurs.","The reported 3.97x speedup over the prior in-memory approach implies that access-pattern-aware mapping is as important as the analog computation itself.","The log-scaled duplication rule gives a simple, area-bounded policy for trading replication against contention in any skew-aware accelerator.","The read-mode path for single-embedding queries shows a concrete, inexpensive power saving for sparse loads.","The two-orders-of-magnitude energy advantage over conventional platforms suggests the memory-bounded bottleneck of recommendation inference is addressable at the device level."],"fun_headline_variants":["ReCross: 3.97x speedup for ReRAM embedding reduction","ReCross: 6.1x energy savings on ReRAM embeddings","ReCross: 3.97x faster, 6.1x greener ReRAM embeddings","ReCross: dynamic ADC switch slashes ReRAM embedding power"],"cache_read_input_tokens":2304,"weakest_assumption_plain":"The architecture assumes that 6-bit quantization (and 3-bit in read mode) preserves recommendation quality; the paper never measures accuracy or ranking metrics, only latency and energy.","fun_headline_variants_meta":{"raw":{"variants":["ReCross: 3.97x speedup for ReRAM embedding reduction","ReCross: 6.1x energy savings on ReRAM embeddings","ReCross: 3.97x faster, 6.1x greener ReRAM embeddings","ReCross: dynamic ADC switch slashes ReRAM embedding power"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000585,"raw_usage":{"total_tokens":2590,"prompt_tokens":748,"completion_tokens":1842,"prompt_tokens_details":{"cached_tokens":256},"prompt_cache_hit_tokens":256,"prompt_cache_miss_tokens":492,"completion_tokens_details":{"reasoning_tokens":1759}},"tokens_in":492,"tokens_out":1842,"duration_ms":15015,"temperature":1.0,"reasoning_tokens":1759,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-04T17:43:54.462650+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Measure recommendation quality (e.g., AUC or recall) on the same workloads with the 6-bit ADC and 3-bit read path versus full-precision embedding reduction. If quality drops materially, the efficiency claims do not translate into a usable accelerator.","supporting_citations":[],"review_version":1}