{"id":"f1800a11-e397-4e35-898f-a29bd74a1738","arxiv_id":"2509.21886","paper_version":3,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":0,"one_line_summary":"A per-operator hierarchical Transformer with a residual function shift objective substantially improves learning functional behavior of circuit graphs.","lead":"TRACE introduces a hierarchical Transformer that encodes each logic operator as an ordered sequence of its inputs, plus a 'function shift' objective that predicts only the correction between a circuit node's true signal probability and an input-independent approximation. The authors report large gains over message passing and graph transformer baselines on RTL, AIG, and post-mapping netlist benchmarks for both retrieval and regression tasks.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Function-shift inference reuses estimated predecessor probabilities in the local-function recursion (Algorithm 1), a train/test mismatch with potential error compounding on deep circuits that the paper does not analyze.","rationale":"The strongest claim is that TRACE's hierarchical transformer plus function shift learning constitutes a more robust paradigm for learning circuit functionality. The function shift objective is the primary novel component, and its inference procedure is explicit in Algorithm 1: y_hat_global_v = y_hat_FSL_v + phi_v(y_hat_global_u1, ...). The training objective in Eq. 5, however, regresses y_FSL against a target computed from ground-truth global and local functions of the training data. Thus the local term used during inference is evaluated at estimated inputs, while the learned shift was fit to exact inputs. This is a standard exposure-bias problem in autoregressive or iterative reconstruction. The paper's benchmarks include circuits with depth up to 2657 (Table 6), so even small per-node errors could accumulate over hundreds of levels. The absence of any per-level error analysis, teacher-forcing variant, or comparison to an oracle local-input setting means the reader cannot tell whether the near-perfect R2 values reflect genuine robustness or favorable error conditions on their particular test distribution. This is not a claim of fraud or a rhetorical objection; it is a specific, testable weakness in the argument for FSL as a principled decoupling. The reader's weakest assumption correctly identified this training/inference mismatch, so I agree with that identification. Because the reader already marked the paper CONDITIONAL, my stress-test does not move the verdict.","tokens_in":14832,"tokens_out":4035,"duration_ms":39895,"concrete_test":"On a held-out set of combinational AIGs, compute the TRACE iterative reconstruction of Algorithm 1 and record MAE of y_hat_global_v grouped by node level (binned depths, e.g., 1-10, 11-50, 51-100, >100). Also compute the standalone FSL head MAE against y_FSL_v for the same nodes. If the iterative-reconstruction MAE grows with depth and exceeds the standalone FSL MAE by a statistically significant margin, error compounding through the local-function recursion is confirmed. Equivalently, compare Algorithm 1 to an oracle variant that uses ground-truth predecessor y_global in line 6; a large gap between the two on deep circuits demonstrates the mismatch is load-bearing. This check requires the released model and dataset; the paper currently omits code, so the authors should provide these per-level diagnostics.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central novelty is function shift learning: y_FSL = y_global - y_local (Definitions 1-2, Figure 3). During training (Eq. 5), y_local is formed from ground-truth predecessor global probabilities, so the model learns a residual conditioned on exact inputs. During inference (Algorithm 1, line 6), the same local term is computed from the model's own estimated predecessor globals, y_hat_global. These estimates are autoregressively re-used level by level, so errors can propagate and amplify through the circuit depth. The paper reports no analysis of this mismatch, no per-level error curves, and no comparison between training-time and inference-time local inputs. If FSL predictions are near-perfect on training nodes but the iterative reconstruction injects predecessor error into phi_v, the reported R2/MAE on deep circuits (Table 2, max depth 2657 on combinational AIGs; Table 6) may overstate the method's robustness. This is load-bearing because the paper's central claim is that FSL 'decouples' complex global context from local computation; that decoupling is only valid if the local computation can be evaluated without depending on the model's own uncertain outputs.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper introduces TRACE, a Transformer-based architecture for learning the functional behavior of circuit graphs. The backbone encodes each computation step as an ordered prefix sequence [operator, input 1, input 2, ...] and processes it with a small Transformer equipped with positional encodings, applied level by level along the graph's topological order. For node-level predictive tasks, the paper proposes Function Shift Learning (FSL), in which the model regresses the difference y_FSL = y_global - y_local, where y_local is the operator evaluated on the marginal probabilities of its predecessors and y_global is the true expectation of the operator's output. At inference, global estimates are reconstructed level by level by adding the predicted shift to a local term computed from previously estimated predecessor globals. The paper evaluates TRACE on RTL graphs, combinational and sequential AIGs, and post-mapping netlists, for both contrastive retrieval and predictive regression tasks, reporting consistent improvements over MPNN and graph-transformer baselines.","tokens_in":15237,"tokens_out":7692,"duration_ms":75418,"significance":"If the empirical claims hold, TRACE provides a genuinely different inductive bias for circuit representation learning: position-aware, operator-specific processing of a node's fan-in, plus a residual target that separates a mean-field local estimate from the correction caused by reconvergent dependencies. The benchmark coverage is broad, spanning three circuit modalities and both retrieval and regression tasks, and the FSL ablation in Table 4 supports the usefulness of the proposed objective. The paper does not ship code, proofs, or seed-level reproducibility, so the evidence is entirely empirical. Two aspects of the predictive pipeline are not yet documented: how ground-truth global functions are computed for large circuits, and how the iterative FSL reconstruction behaves when predecessor estimates are imperfect. Because these aspects directly govern the headline numbers, the current submission is not fully self-contained; the central idea is promising but needs additional analysis before the strength of the claims can be endorsed.","major_comments":[{"comment":"There is a training/inference mismatch in the FSL reconstruction. During training, Eq. (5) defines the target y_FSL_i = y_global_i - y_local_i with y_local_i evaluated at ground-truth predecessor global functions. During inference, Algorithm 1 line 6 computes the local term from the model's own estimates, y_hat_global_u1, ..., y_hat_global_uk. The predicted shift was trained to correct the exact local term, so when the local term is evaluated at estimated inputs the correction is miscalibrated, and errors can propagate through the level-by-level loop. This is load-bearing because the paper's central claim is that FSL 'decouples' global context from local computation; that decoupling is only valid if the local computation can be evaluated without dependence on the model's uncertain outputs. Please report per-level MAE/R2 for deep circuits (e.g., Table 6, combinational AIG max depth 2657), compare training-time and inference-time local inputs, and either modify the training procedure (e.g., scheduled sampling or noise injection) or demonstrate quantitatively that error compounding is negligible.","section":"Section 3.3, Algorithm 1"},{"comment":"The paper never specifies how the ground-truth global function y_global is computed. Definition 1 is an exact expectation over the input distribution, and the paper itself notes that direct computation requires O(2^k) enumeration. For the circuits in Table 6, with up to 45,409 nodes and depth 2,657, exact enumeration is not obviously feasible. If the labels come from random simulation, the number of input vectors, the simulation procedure, and whether y_local is computed from the same simulated marginals must be stated. Without this information, the FSL targets and the reported R2 and MAE values are not reproducible, and the metrics may be biased by label noise. Please document the label-generation procedure precisely.","section":"Section 3.3, Definition 1, Appendix E"},{"comment":"All reported metrics are single numbers; Tables 1-4 contain no standard deviations, number of seeds, or details of evaluation splits. Some of the margins are small, for example Table 2 reports logic-1 R2 of 0.989 for TRACE versus 0.984 for DeepGate4, and Table 4 reports AIG similarity R2 of 0.533 versus 0.500 for TRACE without FSL. Without run-level variance, the claim that TRACE 'consistently and substantially outperforms' prior approaches is not statistically grounded for those close comparisons. Please report mean and standard deviation over at least three to five runs and specify how test circuits are split from training circuits.","section":"Tables 1-4"}],"minor_comments":[{"comment":"The claim that MPNNs are 'architecturally impossible' to model position-aware operators is too strong; standard MPNNs with appropriate node features and sufficient depth can represent order-dependent functions in principle. Consider softening to 'a single-layer permutation-invariant aggregation cannot distinguish input order' or providing a formal statement.","section":"Section 1, Figure 1"},{"comment":"The symbol v_i^k is used both for a node and for the sequence constructed from that node and its inputs; this is confusing. Please use distinct notation, e.g., s_i^k = [v_i^k, u_j1, ..., u_jm].","section":"Equation (3)"},{"comment":"The local function phi_v is not defined for each operator type, particularly for word-level RTL operators such as Add, Equal, and Mux when applied to probabilities. Please state how phi_v is evaluated for each operator class, especially when signals are multi-bit.","section":"Algorithm 1 and Section 2.1"},{"comment":"The 'functionally equivalent transformation' used to create positive contrastive samples is not specified. Please list the exact transformations applied for RTL, AIG, and PM netlist modalities, as this is essential for reproducing the retrieval experiments.","section":"Section 3.4"},{"comment":"For functional similarity prediction, the ground truth is based on partial truth tables over a sampled set of input patterns, but the number of patterns and the number of node pairs are not reported. Please provide these values so the label quality can be assessed.","section":"Appendix E.2"},{"comment":"The 'Depth' statistic is not defined. Please clarify whether it is the maximum logic level from Eq. (2), and note that for sequential circuits the pseudo-PI treatment of registers affects the depth computation.","section":"Tables 5 and 6"}],"recommendation":"major_revision","confidential_remarks":"The core architectural idea is sound and the benchmark results are interesting, but the two pipeline details—ground-truth label construction and the iterative FSL inference—are load-bearing and currently underspecified. I would like to see the authors address the training/inference mismatch with per-level error analysis and provide seed-level variance before endorsing the claimed state-of-the-art results. Code release would substantially improve the reproducibility of this paper."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Short version: TRACE is a genuinely new combination — per-operator hierarchical Transformer over prefix sequences plus a function-shift regression target — and it wins consistently across RTL, AIG, and netlist benchmarks. The empirical case is strong enough to take seriously; the FSL training/inference mismatch is the one real soft spot, and it is not addressed.\n\nWhat's new: each operator is encoded as an ordered sequence [op, input1, input2, ...] with positional encodings, processed level by level. That is a clean fix for the order-sensitivity of MUX-like operators, and the in-degree distribution analysis in Appendix D shows why the approach is practical on circuits. Function shift learning — regressing y_global - y_local, where y_local assumes input independence — is a good idea: it isolates reconvergence effects, and the ablation shows it helps (MAE 0.036 to 0.013 on netlists). The results are consistent across three modalities and two task families. That is real evidence.\n\nSoft spots, in descending order. First, Algorithm 1 has a train/test mismatch: training targets y_FSL use ground-truth predecessor globals, but inference computes the local term from the model's own estimated predecessor globals, level by level. Errors can compound on deep circuits (depth up to 2657 in Table 6). The paper does not report per-level error curves or compare training-time vs inference-time local inputs. This matters for the central claim that FSL decouples global context from local computation. It may still work — the empirical R2 on deep AIGs is 0.989 — but without the analysis the robustness claim is unproven. Second, ground-truth global probabilities are called 'pre-computed from training data' but the paper never says how they are computed for large circuits; simulation-based labels would be approximate and would cap the achievable MAE. Third, 'architecturally impossible' for MPNNs is an overstatement: permutation-invariant aggregation cannot capture input order as-is, but nothing prevents order-aware message functions. The point is fair, the absolutism is not. Fourth, no error bars, no seeds, no code release, and no baseline tuning details, which makes the margin claims hard to audit.\n\nOverall, the central empirical claim probably holds, but this is a preprint that needs a revision round. It is for EDA and circuit-representation researchers, and for anyone who wants a strong encoder for RTL/AIG/netlists. I would send it to peer review, with the mismatch and label-generation questions as the key asks. Not a desk reject.","headline":"Strong new circuit encoder with consistent wins across RTL/AIG/netlists; the function-shift inference loop has a real train/test mismatch that needs analysis before the numbers are taken at face value.","tokens_in":15568,"tokens_out":2258,"would_cite":true,"duration_ms":20944,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"TRACE claims that modeling each computation step as an ordered prefix sequence and learning the function shift yields more accurate circuit behavior models across RTL, AIG, and netlists.","keywords":["circuit representation learning","hierarchical transformer","function shift learning","logic-1 probability prediction","And-Inverter graphs","RTL graph retrieval","post-mapping netlist","computational graphs"],"falsifier":"Take a combinational AIG with a deliberately long reconvergent chain, e.g., $c_k = x_1 \\wedge x_2 \\wedge \\dots \\wedge x_k$ built so each intermediate shares a variable with the next, simulate exhaustively to get exact logic-1 probabilities, and compare TRACE's level-by-level predictions; if MAE grows with chain length while single-shift accuracy stays flat, the inference recursion is compounding error.","tokens_in":14667,"feed_emoji":"🔌","tokens_out":10010,"duration_ms":80547,"temperature":0.7,"pith_summary":"The paper tries to establish that the reason graph neural networks fail to model circuit behavior is architectural, not just a matter of training data. It claims that permutation-invariant message passing cannot represent ordered, operator-specific input interactions such as a multiplexer's select logic, and that flattened Transformers discard the nested dependency structure of computation. TRACE replaces both with a hierarchical Transformer that reads each computation step as an ordered prefix sequence and processes the graph level by level. For regression, it introduces function shift learning: the model predicts only the gap between the true global function and a cheap local approximation that treats inputs as independent, and reconstructs global values level by level at inference. Across RTL, AIG, and post-mapping netlist benchmarks, the paper reports consistent improvements over prior circuit-learning architectures, which matters because logic-1 probabilities, transition probabilities, and functional embeddings feed into power, timing, and verification tools.","feed_headline":"Step-by-step Transformer beats circuit model baselines","feed_subtitle":"Ordered-prefix encoding and a function-shift objective improve circuit retrieval and logic prediction","key_machinery":"The load-bearing object is the per-step prefix sequence $v_i^k = [v_i^k, u_{j_1}, \\dots, u_{j_{|N(v_i^k)|}}]$, with the operator token first and its ordered predecessors after it, processed by a Transformer encoder with positional encodings; this makes input order explicit and lets attention mix operator and inputs before any aggregation. The second mechanism is function shift learning: with the global function $y_{\\text{global}}^\\phi = \\mathbb{E}_{x \\sim D}[\\phi(x_1,\\dots,x_k)]$ and the local approximation $y_{\\text{local}}^\\phi = \\phi(\\mathbb{E}_{x\\sim D}[x_1],\\dots,\\mathbb{E}_{x\\sim D}[x_k])$, the training target is $y_{\\text{FSL}}^\\phi = y_{\\text{global}}^\\phi - y_{\\text{local}}^\\phi$, so the model learns only the reconvergence-induced correction. During inference the predicted shift is added to the local function built from previously estimated predecessor probabilities, level by level, in Algorithm 1. Together these replace permutation-invariant aggregation with position-aware, operator-specific computation and separate a node's intrinsic behavior from its context.","core_discovery":"In the paper's own terms, computation in a circuit graph should be learned the way it is executed: level by level, each operator reading its output value from the embeddings of its predecessors. TRACE encodes every computation step as the ordered prefix sequence $[\\text{operator}, \\text{input}_1, \\text{input}_2, \\dots]$ and applies a Transformer encoder with positional encoding to that sequence, taking the first token's output as the updated node embedding. For prediction, it defines the global function as the expectation of the operator applied to the input distribution, and the local function as the operator applied to the expectations of the inputs; the model is trained to regress the difference $y_{\\text{FSL}} = y_{\\text{global}} - y_{\\text{local}}$. At inference, Algorithm 1 reconstructs each node's global probability as the predicted shift plus the local function computed from already-estimated predecessor probabilities. The paper reports that this combination outperforms prior MPNN and Graph Transformer baselines across RTL graphs, combinational and sequential AIGs, and post-mapping netlists on both retrieval and regression tasks.","pith_inferences":["Beyond the tested circuit settings, the ordered-prefix encoding should transfer to software control/data-flow graphs and bit-vector formulas in prefix form, which the paper mentions as a natural fit, but no experiments there are reported.","The paper leaves implicit that the function-shift training target depends on the input distribution used to compute the global function; a model trained under uniform Bernoulli inputs may need retraining or explicit conditioning before it generalizes to circuits with skewed signal probabilities.","A testable extension would measure error accumulation in Algorithm 1 by comparing each level's estimated global probabilities against exact simulation; if errors compound, an end-to-end residual or multi-pass refinement could be added without changing the backbone.","The contrastive results suggest the embedding space is nearly aligned with functional equivalence, which could support functional hashing or equivalence checking as downstream tasks, but the paper itself evaluates only retrieval and node-level regression."],"forward_implications":["If TRACE's claim is right, circuit representation models built on permutation-invariant aggregation face a hard ceiling for position-aware operators, and the ordered-prefix encoder is the structural fix.","Function shift learning turns a hard global regression into a residual correction, so the reported ablation gains (e.g., MAE dropping from 0.036 to 0.013 on PM netlist logic-1 probability) are explained by the decoupling and should transfer to other node-level circuit statistics.","A single hierarchical Transformer with bounded per-node sequence lengths covers RTL, AIG, and netlist modalities without modality-specific graph rewiring, because the only structural assumption is operator-determined in-degree.","On sequential circuits, treating registers as pseudo primary inputs and removing feedback loops reduces cyclic behavior to level-by-level computation, preserving the reported gains on transition probability prediction.","The near-perfect retrieval scores reported (Rec@10 above 99% on RTL and AIG) imply the learned embeddings separate functionally distinct circuits almost perfectly, making them usable for functional clustering and similarity screening."],"supporting_citations":[{"why":"Defines the message-passing framework whose permutation-invariant aggregation TRACE replaces; the paper's critique targets this paradigm.","marker":"Gilmer et al., 2017"},{"why":"DeepGate2 is the AIG-specialized baseline for logic-1 probability prediction on combinational circuits that TRACE must surpass.","marker":"Shi et al., 2023"},{"why":"DeepGate4 provides the strongest prior edge-masked Transformer baseline and the reference point for TRACE's reported R2 of 0.989.","marker":"Zheng et al., 2025"},{"why":"DeepSeq2 supplies the sequential-AIG baseline and the pseudo-primary-input treatment of registers that TRACE adopts.","marker":"Khan et al., 2025"},{"why":"CircuitEncoder is the RTL graph-Transformer baseline and part of the RTL contrastive comparison.","marker":"Fang et al., 2025c"},{"why":"FGNN2 is the AIG pretraining baseline that TRACE outperforms in retrieval and predictive tasks.","marker":"Wang et al., 2024"},{"why":"DeepCell is the post-mapping netlist baseline for both contrastive and predictive tasks.","marker":"Shi et al., 2025b"},{"why":"Supplies the InfoNCE loss used for the contrastive retrieval objective.","marker":"Oord et al., 2018"},{"why":"ForgeEDA is the dataset source for combinational AIG and PM netlist experiments.","marker":"Shi et al., 2025a"}],"fun_headline_variants":["TRACE: Hierarchical Transformer learns circuit logic","Function-shift objective boosts circuit graph learning","Beats circuit baselines with ordered-prefix encoding","Predicting function shifts improves circuit retrieval"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The model assumes it can compute the function-shift training target from the available simulation data, and that its own level-by-level estimates of predecessor global probabilities stay accurate enough that errors do not compound when reconstructing deeper nodes.","fun_headline_variants_meta":{"raw":{"variants":["TRACE: Hierarchical Transformer learns circuit logic","Function-shift objective boosts circuit graph learning","Beats circuit baselines with ordered-prefix encoding","Predicting function shifts improves circuit retrieval"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000744,"raw_usage":{"total_tokens":3346,"prompt_tokens":1001,"completion_tokens":2345,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":617,"completion_tokens_details":{"reasoning_tokens":2287}},"tokens_in":617,"tokens_out":2345,"duration_ms":14245,"temperature":1.0,"reasoning_tokens":2287,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-15T15:45:05.644564+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Take a combinational AIG with a deliberately long reconvergent chain, e.g., $c_k = x_1 \\wedge x_2 \\wedge \\dots \\wedge x_k$ built so each intermediate shares a variable with the next, simulate exhaustively to get exact logic-1 probabilities, and compare TRACE's level-by-level predictions; if MAE grows with chain length while single-shift accuracy stays flat, the inference recursion is compounding error.","supporting_citations":[{"cited_title":"Deepgate2: Functionality-aware circuit representation learning","cited_arxiv_id":null,"evidence_quote":"DeepGate2 is the AIG-specialized baseline for logic-1 probability prediction on combinational circuits that TRACE must surpass."},{"cited_title":"Deepseq2: Enhanced sequential circuit learning with disentangled representations","cited_arxiv_id":null,"evidence_quote":"DeepSeq2 supplies the sequential-AIG baseline and the pseudo-primary-input treatment of registers that TRACE adopts."}],"review_version":1}