{"id":"d3befd86-af18-434b-9710-9eb8d6f0fc83","arxiv_id":"2603.22770","paper_version":2,"verdict":"CONDITIONAL","confidence":"HIGH","novelty_score":7.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":4,"one_line_summary":"Under independent parameter bit-flips, lower precision, sparsity, bounded activations, and shallow depth reduce expected squared error, and LUT/logic networks that jointly realize those limits remain stable far past where FP and even BNNs collapse, with even-depth recovery near full corruption.","lead":"Logic and lookup-table neural networks stay accurate under parameter bit-flips that destroy floating-point models, because low precision, sparsity, and bounded Boolean outputs limit how faults spread. The work gives closed-form error formulas and a novel even-layer recovery effect that can matter for safety-critical edge chips without heavy ECC.","discovery_kind":"extension","skeptic_critique":{"model":"grok-4.5","headline":"No significant objection beyond the reader's already-flagged independent-BER idealization; that remains the load-bearing limit.","rationale":"The paper's strongest claim is carefully scoped to independent parameter bit-flips and is supported by explicit neuron/layer MSE derivations, a clean hierarchy table, controlled ablations, and a distinctive algebraic recovery effect that appears only for even-depth logic stacks. The reader's weakest_assumption correctly isolates the idealized noise model as the point where transfer could fail; that is also the only load-bearing concern that survives a second-pass reading. MLP-centric ablations and conditional α are secondary and already acknowledged. No contradiction among theorems, no hidden unbounded term that invalidates the LUT isolation argument, and no experimental result that reverses the predicted ordering inside the stated model. Therefore the CONDITIONAL verdict with medium correctness risk outside independent BER stands; no adjustment is warranted.","tokens_in":18771,"tokens_out":565,"duration_ms":6561,"concrete_test":"Inject the same DWN and FP/BNN models under a bursty multi-bit fault model (e.g., 2–4 consecutive bits flipped per event at the same average BER, or a simple row-wise DRAM-style correlation) on one MLPerf Tiny task; if the LUT accuracy advantage at p≈0.1 collapses by >half relative to the independent case in Fig. 7, the structural claim does not transfer beyond independent BER.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim (resilience is structural and jointly maximized by low precision + sparsity + bounded activations + shallow depth, with LUT/DWN realizing that limit and even-layer recovery under high α) is internally consistent under the paper's stated model. Theorems 1–5 and 9 give matching MSE/isolation expressions; ablations (Figs. 2–6) and high-BER curves (Fig. 7) track the predicted hierarchy; even-layer recovery (Thm. 10, Cor. 1–2, Fig. 8) is algebraic once α is high. The single softest load-bearing condition is exactly the one the reader already named: independent uniform Bernoulli flips on stored parameters (§4.1), with float moments excluding NaN/Inf and multi-layer recovery under independence/α approximations. Outside that model (correlated multi-bit SEUs, address-targeted attacks, or shared quantization-parameter hits), neither the MSE ranking nor recovery strength is guaranteed to transfer. No deeper internal inconsistency or missing derivation was found that would overturn the claim inside the stated regime.","agreement_with_reader":"agree"},"referee_report":{"model":"grok-4.5","summary":"The paper argues that resilience to independent parameter bit flips is a structural property of neural architectures, not only a property of a trained solution. It derives expected squared-error expressions under a uniform BER model for integer, floating-point, affine-quantized, binary, and LUT neurons (Theorems 1–5, 9), and analyzes how lower precision, sparsity, bounded activations, and shallow depth reduce error (Theorems 6–8 and width/sparsity scaling). It then claims that logic/LUT networks (DWNs) jointly realize these limits, remain stable far into high-BER regimes where FP models collapse (Figs. 2, 7), and exhibit an even-layer recovery effect at extreme corruption governed by anti-symmetry α of complementary LUT addresses (Theorem 10, Corollaries 1–2, Fig. 8). Ablations on MLPerf Tiny isolate precision, width, depth, activation, and sparsity and are presented as consistent with the theory.","tokens_in":19132,"tokens_out":691,"duration_ms":8223,"significance":"If the structural ranking and the LUT isolation/recovery results hold under the stated model, the paper supplies a useful, dataset-agnostic organizing principle for fault-tolerant edge design: resilience can be shaped by representation and connectivity rather than only by ECC or retraining. Strengths include closed-form MSE/isolation derivations that match the independent-BER algebra, a clear hierarchy of formats (Table 1), and a falsifiable recovery prediction tied to measurable α. The even-layer recovery analysis is a distinctive contribution for logic/LUT architectures. The work is relevant to edge reliability and to the growing literature on weightless/LUT networks, though its practical reach is bounded by the independent-flip idealization.","major_comments":[{"comment":"§4.1 and Theorems 2, 8–10 / Corollaries 1–2: The central hierarchy and the even-layer recovery claim are derived under independent Bernoulli bit flips at uniform BER p, with float moments excluding NaN/Inf and multi-layer recovery under independence/α approximations. This is load-bearing: correlated multi-bit SEUs, address-targeted attacks, or shared quantization-parameter hits can change both the MSE ranking and recovery strength. The manuscript should either (i) add a limited structured-fault or multi-bit experiment, or (ii) state more sharply in the abstract/conclusion that transfer outside independent BER is not claimed, and report measured α for the trained LUTs that produce Fig. 8 so the recovery magnitude is not left as a free structural assumption.","section":null},{"comment":"§5.1–5.3 vs §5.4: Architectural ablations that isolate width, depth, activation, and sparsity are run on MLPs for cost reasons, while the high-corruption Logic/LUT comparison uses DWN vs MLPerf Tiny CNN baselines. The paper needs a clearer bridge that the same structural factors (not only the DWN substrate) drive the CNN-side gap—e.g., a sparse/binary/shallow CNN control or an explicit statement that the CNN comparison is confirmatory rather than a full factorial isolation. Without that, the claim that the empirical trends validate the joint structural limit is only partially controlled.","section":null}],"minor_comments":[],"recommendation":"minor_revision","confidential_remarks":null},"author_rebuttal":null,"desk_editor":{"model":"grok-4.5","letter":"The useful core here is not another fault-injection campaign. They derive expected squared error under independent parameter bit flips for two’s-complement, floating-point moments, affine quantization (protected vs shared scale/zero-point), BNNs, activations, width/sparsity, and depth, then show that the same trends—lower precision, sparsity, hard saturation, shallow depth—jointly favor discrete LUT neurons. The even-layer recovery result (address inversion + table complement, governed by anti-symmetry α) is new and algebraically clean once you accept the model.\n\nWhat they do well: the hierarchy is representation-driven rather than loss-landscape storytelling, so it is mostly dataset-agnostic. Theorems 1–5 and 9 match the bias–variance decomposition they set up; the protected-vs-corrupted AQ split is careful; the MLPerf Tiny ablations (precision, width, depth, activation, sparsity) and the high-BER curves track the predictions; DWNs stay usable deep into regimes where FP and even BNNs have already collapsed. Related work is honest about LogicNets, DWNs, PVF, and bit-flip attacks.\n\nSoft spots, in proportion: the load-bearing assumption is exactly the independent uniform BER on stored parameters (float moments exclude NaN/Inf; multi-layer recovery uses independence/α approximations). Correlated multi-bit SEUs or address-targeted attacks are outside the claim, and they say so. Ablations are mostly MLPs for cost; the final DWN comparison does include the Tiny CNN baselines, so that is not fatal. Recovery strength is conditional on trained tables having high α—they measure the effect rather than prove α is always large. No code/artifacts is a practical annoyance, not a soundness hole.\n\nThis is for people who care about edge reliability, FPGA/LUT inference, and weightless nets. It will not reorganize large-model SDC defense, but it is a serious, usable design argument inside its regime. I would send it to referees; the math and the data are solid enough to deserve that time. Engage if you work on resilient edge architectures; skim the recovery section even if you do not.","headline":"Clean structural MSE hierarchy for bit-flips that legitimately points to LUT/DWN models, plus a real even-layer recovery effect; main limit is the independent-BER model they already state.","tokens_in":19748,"tokens_out":552,"would_cite":true,"duration_ms":6145,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"grok-4.5","headline":"Resilience to parameter bit-flips is a structural property of neural architectures, and logic/lookup networks that jointly minimize precision, fan-in, and unbounded activations stay accurate where floating-point models collapse.","keywords":["bit-flip resilience","lookup-table neural networks","weightless neural networks","quantization","expected squared error","edge inference","even-layer recovery","fault tolerance"],"falsifier":"Train matched floating-point, integer, binary, and LUT models on the same MLPerf Tiny tasks, inject independent parameter bit flips across a dense BER sweep including p near 1, and check whether the predicted resilience order and even-versus-odd depth recovery pattern fail to appear.","tokens_in":19701,"feed_emoji":"🧠","tokens_out":976,"duration_ms":9371,"temperature":0.7,"pith_summary":"This paper argues that how well a neural network survives random bit-flips in its stored parameters is not mainly a property of a particular trained solution or dataset, but a structural property of the architecture itself. By deriving expected squared output error under independent bit flips for integer, floating-point, quantized, binary, and lookup-table neurons, the authors show that lower precision, higher sparsity, hard-bounded activations, and shallow depth consistently reduce that error. Logic and lookup-table networks realize the joint limit of those trends: each parameter is a single bit in a truth table, connectivity is localized, and outputs are Boolean. On the MLPerf Tiny suite the predicted hierarchy appears in ablations, and Differentiable Weightless Networks remain nearly flat in accuracy at corruption rates that send floating-point and even binary models to chance. At extreme rates approaching total inversion, even-depth logic stacks can partially recover when trained tables are anti-symmetric across complementary addresses. The practical claim is that replacing continuous arithmetic weights with discrete Boolean lookups can give edge systems a better accuracy–resilience trade-off without heavy hardware error correction.","feed_headline":"Logic nets stay accurate when bit-flips wreck floating-point models","feed_subtitle":"Lower precision, sparsity, and Boolean lookups turn parameter faults into bounded, local errors","key_machinery":"Neuron- and layer-level expected MSE under independent Bernoulli bit flips (bias–variance decomposition for integer, floating-point, affine-quantized, binary, and LUT neurons), plus the anti-symmetry probability α that governs exact recovery of a fully corrupted LUT when both address and table are inverted.","core_discovery":"Under independent parameter bit-flips, expected squared error favors lower precision, higher sparsity, bounded activations, and shallow depth; Logic/LUT networks that jointly realize those limits remain highly stable in regimes where floating-point models fail sharply, and even-depth stacks can recover via complementary address and table inversion when anti-symmetry is high.","pith_inferences":["If the structural ranking is real, mixed arithmetic–lookup hybrids could keep a small continuous head for accuracy while protecting the bulk of the model as LUTs, trading expressivity only where needed.","The same isolation argument suggests that address-targeted or multi-bit faults would hit LUT models differently from random BER; structured fault campaigns would therefore be the natural next stress test.","Even-layer recovery at p→1 is essentially a discrete parity effect; similar complementary-address symmetries might be deliberately regularized during training to strengthen recovery rather than left as an emergent property."],"forward_implications":["Edge accelerators that cannot afford heavy ECC can raise fault tolerance by moving from floating-point weights toward sparse binary or pure lookup computation rather than only by adding redundancy.","Layer-wise affine quantization, while accurate, remains less resilient than pure integer or binary formats because shared scale and zero-point bits create rare layer-wide failures.","Even-depth logic/LUT stacks can be preferred when extreme corruption is possible, because address–table inversion can cancel errors when tables are anti-symmetric.","Designers can treat precision, fan-in, activation saturation, and depth as first-class resilience knobs whose effects are predicted by the closed-form MSE expressions rather than only by post-hoc fault injection."],"fun_headline_variants":["LUT nets stay stable under bit-flips that crash floating-point models","Bit-flip MSE favors low precision sparsity and Boolean lookup nets","Logic nets recover via even-layer address and table inversion","Discrete Boolean lookups bound errors from parameter bit-flips","LUT models hold accuracy where floating-point nets fail sharply"],"cache_read_input_tokens":16512,"weakest_assumption_plain":"Faults are modeled as independent, uniform random bit flips on stored parameters; if real hardware or attack faults are strongly correlated, multi-bit, or deliberately targeted, the derived error hierarchy and even-layer recovery need not hold.","fun_headline_variants_meta":{"raw":{"variants":["LUT nets stay stable under bit-flips that crash floating-point models","Bit-flip MSE favors low precision sparsity and Boolean lookup nets","Logic nets recover via even-layer address and table inversion","Discrete Boolean lookups bound errors from parameter bit-flips","LUT models hold accuracy where floating-point nets fail sharply"]},"model":"grok-4.5","effort":"low","cost_usd":0.0082,"raw_usage":{"total_tokens":1944,"prompt_tokens":770,"num_sources_used":0,"completion_tokens":73,"cost_in_usd_ticks":82000000,"prompt_tokens_details":{"text_tokens":770,"audio_tokens":0,"image_tokens":0,"cached_tokens":256},"completion_tokens_details":{"audio_tokens":0,"reasoning_tokens":1101,"accepted_prediction_tokens":0,"rejected_prediction_tokens":0}},"tokens_in":770,"tokens_out":73,"duration_ms":10155,"temperature":1.0,"reasoning_tokens":1101,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-07-13T20:05:55.574371+00:00","model_set":{"reader":"grok-4.5"},"falsifier":"Train matched floating-point, integer, binary, and LUT models on the same MLPerf Tiny tasks, inject independent parameter bit flips across a dense BER sweep including p near 1, and check whether the predicted resilience order and even-versus-odd depth recovery pattern fail to appear.","supporting_citations":[],"review_version":1}