{"id":"32433b68-dd0a-4ee7-aac6-e7b560ef21c2","arxiv_id":"2607.02804","paper_version":1,"verdict":"CONDITIONAL","confidence":"HIGH","novelty_score":7.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":4,"one_line_summary":"Static atomic buses enable high-fidelity long-range CZ gates in neutral atoms, delivering >10x better logical error rates than shuttling for FTQC with ~100 µs gates and ~1 ms QEC cycles.","lead":"Neutral-atom quantum computers can perform long-range entanglement with fixed mediator atoms instead of shuttling qubits. This cuts heating and latency, yielding faster error-corrected logical operations under realistic noise models.","discovery_kind":"new_method","skeptic_critique":{"model":"grok-4.5","headline":"Noise-model asymmetry (optimistic A, zero static idle, omitted laser/field noise) is the load-bearing premise for the order-of-magnitude logical-error claim.","rationale":"The Reader correctly isolates the noise-model asymmetry as the weakest assumption that directly underwrites the strongest claim. The manuscript supplies all the ingredients needed to audit that claim (Hamiltonians, GRAPE pulses, scheduling counts, Stim circuits, explicit A and f(d)), so the comparison is reproducible under the stated model; the only open question is whether the model itself is realistic enough for the claimed order-of-magnitude gain. Because the paper already labels the omissions and the absolute cycle-time estimates do not rely on the same A, the appropriate verdict remains CONDITIONAL rather than REJECT or ACCEPT. No deeper internal inconsistency or circularity appears. The concrete re-simulation with varied A and added laser noise is the single check that would settle whether the performance advantage survives a more balanced noise budget.","tokens_in":40177,"tokens_out":629,"duration_ms":6959,"concrete_test":"Re-run the Stim Bell-pair and k=2/3 La-cross Monte-Carlo campaigns of Figs. 4 and 6 with two controlled changes: (i) A reduced by 3–5× (or set to zero) and (ii) an additional coherent phase-noise term of 10^{-3}–few×10^{-3} added to every bus-mediated CZ. If the static curves lose their order-of-magnitude separation from the shuttling curves at p~10^{-3}, the strongest claim is noise-model-dependent and the CONDITIONAL verdict is confirmed.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim of >10\times lower logical error rates (Figs. 4(b), 6) and ~100 µs / ~1 ms times rests on a deliberately asymmetric noise model: shuttling heating is injected as independent single-qubit depolarizing noise of strength A·d^{2/3} with A=6×10^{-4} (optimistic experimental estimate, App. D), while static-bus idle errors are set to zero and laser phase/frequency noise plus stray-field perturbations of high-n Rydberg states are explicitly excluded from all reported gate infidelities (Sec. III A). The same A and f(d) scaling (Eq. 19 and App. E) feed every Monte-Carlo comparison and the cycle-time arithmetic of Secs. III B / IV B 3. If realistic heating is weaker by even a factor of a few, or if the omitted laser/field noise raises bus-gate infidelity above the ~2–3× nearest-neighbor floor used for f(d), the order-of-magnitude advantage shrinks or disappears while the absolute cycle-time numbers remain intact. The paper itself flags the omissions, so the concern is not hidden; it is simply the single assumption on which the headline performance comparison turns.","agreement_with_reader":"agree"},"referee_report":{"model":"grok-4.5","summary":"The manuscript introduces a primarily static neutral-atom architecture in which chains of auxiliary mediator atoms (atomic buses) realize long-range CZ gates without qubit transport. Optimal-control (GRAPE) pulses are co-designed for both symmetric (data–ancilla–data) and asymmetric (data–ancilla–ancilla) buses, incorporating interaction-flatness and robustness constraints; the resulting gates reach fidelities approaching 0.999 with durations of a few hundred nanoseconds. The architecture is shown to support transversal logical CZ/CNOT between neighboring surface-code patches (up to d=11, with a path to d=25) and long-range stabilizer readout for La-cross and bivariate-bicycle LDPC codes. Large-scale Stim+BPOSD Monte-Carlo simulations under a hardware-motivated noise model predict more than an order-of-magnitude reduction in logical error rate relative to an atom-shuttling baseline, together with logical-gate times ~100 µs and QEC-cycle times ~1 ms for d ≲ 12. A modular bridging scheme to surface-code compute units and a hybrid quasi-static magic-state factory complete the path to universality.","tokens_in":40531,"tokens_out":1445,"duration_ms":21131,"significance":"If the performance claims hold under realistic noise, the work supplies a concrete, co-designed alternative to shuttling that removes transport latency and heating from the algorithmic clock cycle while retaining the connectivity needed for high-rate LDPC memories and transversal Clifford operations. The combination of microscopic pulse engineering (analytic Rydberg-time scalings, flat-potential selection, ensemble robustness), explicit gate scheduling, and end-to-end logical simulations for multiple code families is a substantial advance over prior conceptual bus proposals. The dual-species layout and restriction of active transport to background reloading and magic-state routing are practically attractive. These elements make the manuscript a valuable blueprint for the next generation of neutral-atom FTQC architectures.","major_comments":[{"comment":"The headline claim of “more than an order-of-magnitude improvement in logical error rates” (abstract; Figs. 4(b), 6) rests on a deliberately asymmetric noise model (Secs. III C, IV B 2). Shuttling heating is injected as independent single-qubit depolarizing noise of strength A·d^{2/3} with the optimistic prefactor A=6×10^{-4} (App. D), while static-bus idle errors are set identically to zero and laser phase/frequency noise plus stray-field perturbations of high-n Rydberg states are explicitly excluded from all reported gate infidelities (Sec. III A). The same A and the f(d) scaling of Eq. (19) (and App. E) feed every Monte-Carlo comparison and the cycle-time arithmetic of Secs. III B and IV B 3. A modest reduction in A, or inclusion of the omitted laser/field noise that would raise the bus-gate floor above the ~2–3× nearest-neighbor value used for f(d), would shrink or eliminate the clai","section":"Secs. III C, IV B 2; Figs. 4(b), 6; Eq. (19); App. D"},{"comment":"For the bivariate-bicycle [[144,12,12]] code the authors compute a weighted average physical infidelity ⟨1−F⟩=3.4×10^{-3} (Table I) and note that it lies below the pseudo-threshold of Ref. [44], but they explicitly defer a full circuit-level Monte-Carlo simulation “to future work” (Sec. IV C 1). Given that the same architecture is advertised for high-rate LDPC memories, the absence of even a single distance-scaling curve under the bus-gate noise model leaves a gap between the gate-level results and the logical-performance claims made for La-cross codes. Either a limited Stim simulation for the Gross code (or a clear statement that the BB results are only gate-level) is needed to keep the logical claims uniform across code families.","section":"Sec. IV C 1; Table I"}],"minor_comments":[{"comment":"The abstract and introduction state “d ≲ 12” / “d < 12” while the body discusses explicit constructions up to d=11 (one- and two-mediator) and a scaling argument to d=25. Align the numerical bounds for consistency.","section":"Abstract; Sec. I"},{"comment":"Fig. 2(c.2) and the corresponding panels in Fig. 3 would benefit from an explicit horizontal scale bar (in µm) so that the claimed local-maximum condition can be read off without referring back to the text.","section":"Figs. 2, 3"},{"comment":"In Sec. III B the total transversal-CZ time of 88 µs for d=9 assumes a 1 µs switching overhead and neglects ancilla-reset time; a one-sentence justification that dual-species reset is faster than the switching budget would strengthen the estimate.","section":"Sec. III B"},{"comment":"App. E, Eq. (E4) retains the black-body term g2(n+g1)^{-2}; the main-text scaling Eq. (18) drops it. A brief remark that the room-temperature correction is sub-dominant for the n range considered would avoid confusion.","section":"App. E; Eq. (18)"},{"comment":"Several self-citations appear as arXiv preprints with future dates (e.g., 2604.25987). Update or replace with published versions where available, or mark clearly as concurrent work.","section":"References"}],"recommendation":"major_revision","confidential_remarks":"The noise-model asymmetry is the only genuinely load-bearing weakness; once a sensitivity analysis or explicit caveat is added, the manuscript is close to the standard of a high-impact quant-ph journal. The co-design of pulses, scheduling and logical simulations is thorough and should be published. I see no novelty or citation-pattern issues that would require editorial intervention beyond ordinary peer review."},"author_rebuttal":null,"desk_editor":{"model":"grok-4.5","letter":"This is a full architectural proposal for neutral-atom FTQC that replaces most shuttling with static Rydberg buses of mediator atoms. The new pieces are the co-designed GRAPE pulses (time-optimal plus interaction-flat and robustness constraints) tailored to the exact geometries of surface-code transversal CZ (d up to 11, stretch to 25) and long-range stabilizers in La-cross and bivariate-bicycle codes, plus the dual-species layout, gate scheduling, and Stim+BPOSD Monte-Carlo comparisons that claim order-of-magnitude lower logical error and ~100 µs / ~1 ms cycle times for d ≲ 12.\n\nThey do the hard work carefully: Hamiltonians, subspace reduction, analytic Rydberg-time and infidelity scalings, explicit pulse figures, frequency-weighted average gate error for the BB layout, and transparent scheduling counts. The absolute cycle-time arithmetic and the feasibility of static long-range gates under current Rabi rates and n ~ 70–80 look solid. Citations track the prior bus and LDPC literature without padding.\n\nThe soft spot is exactly the one the stress-test flags and the paper itself notes: the headline >10× logical-error advantage (Figs. 4 and 6) rests on injecting shuttling heating as independent depolarizing noise of strength A·d^{2/3} with A = 6×10^{-4} (optimistic experimental estimate) while setting static idle errors to zero and excluding laser phase/frequency noise plus stray-field shifts of high-n states from all reported fidelities. If realistic heating is weaker or the omitted noise raises the bus-gate floor above the ~2–3× nearest-neighbor factor they use, the relative gain shrinks; the absolute times and the static architecture remain useful. Full BB logical simulation is deferred, which is honest but leaves one claim incomplete.\n\nThis is for people building or choosing codes for neutral-atom hardware. The co-design and numbers are concrete enough to engage with even if the noise comparison needs stress-testing. Send it to peer review; it deserves referee time.","headline":"Concrete static-bus architecture with co-designed high-fidelity CZ pulses and Stim sims; the >10x logical-error edge over shuttling is real under their model but hangs on the optimistic heating constant and omitted laser/field noise they themselves flag.","tokens_in":41133,"tokens_out":552,"would_cite":true,"duration_ms":15060,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":["03.67.Lx","03.67.Pp","32.80.Ee","42.50.Dv"],"model":"grok-4.5","headline":"Static atomic buses replace atom shuttling for long-range gates in fault-tolerant neutral-atom quantum computers, cutting logical error rates by over an order of magnitude.","keywords":["neutral-atom quantum computing","atomic buses","Rydberg gates","fault-tolerant quantum computation","quantum LDPC codes","surface codes","transversal gates","optimal control"],"falsifier":"Repeat the Monte-Carlo logical-error simulations of the Bell-pair and La-cross memory circuits after replacing the shuttling-heating model with measured heating rates from a real dual-species array and after injecting laser-phase and electric-field noise into the bus-gate fidelities; if the static advantage disappears below physical error rates of 10^{-3}, the central claim fails.","tokens_in":41083,"feed_emoji":"⚛️","tokens_out":910,"duration_ms":8367,"temperature":0.7,"pith_summary":"Neutral-atom quantum computers need long-range connections for error correction and logical gates, but moving atoms around adds delay and heating that grow worse as systems get larger. This paper proposes keeping the atoms fixed and using chains of auxiliary mediator atoms—called atomic buses—to create the needed long-range controlled-Z gates. The authors design laser pulses that make these bus-mediated gates fast (a few hundred nanoseconds) and high-fidelity (approaching 99.9 percent) while remaining robust to small motions. Large simulations then show that the static approach yields more than an order-of-magnitude lower logical error rates than shuttling-based designs under realistic noise, with logical gates around 100 microseconds and full error-correction cycles around 1 millisecond for moderate code distances. The result is a modular layout that supports high-rate memory codes, transversal Clifford operations, and magic-state distillation while confining physical atom movement to background reloading.","feed_headline":"Static atomic buses cut logical errors by 10× vs shuttling","feed_subtitle":"Mediator atoms enable long-range gates without transport; cycle times drop to ~1 ms for moderate codes","key_machinery":"Bus-mediated CZ gates obtained by co-designing time-optimal GRAPE pulses with interaction-flatness (local maxima of the van der Waals potential) and robustness constraints so that mediator atoms begin and end fully disentangled while the end qubits acquire a controlled phase.","core_discovery":"Static atomic buses of mediator atoms can mediate high-fidelity long-range CZ gates that support both long-range stabilizer readout in high-rate LDPC codes and transversal logical gates between neighboring surface-code patches, yielding more than an order-of-magnitude improvement in logical error rates over atom-shuttling architectures and cycle times of about 1 ms for distances d ≲ 12.","pith_inferences":["The same flat-interaction design may transfer to other dual-species platforms once suitable Rydberg pairs are identified, reducing the need for continuous recooling in deep circuits.","If measurement heating can also be made negligible, the static architecture could widen its speed advantage over shuttling by another factor of several because recooling overheads would be largely eliminated.","Extending the bus to three or more mediators while keeping spontaneous-emission errors below threshold would allow transversal operations between non-adjacent surface-code patches without any physical rearrangement."],"forward_implications":["Logical transversal gates between surface-code patches become possible in ~100 µs without physical atom transport for distances up to d=11 (and potentially d=25 with higher Rydberg states).","High-rate La-cross and bivariate-bicycle LDPC memories can run full syndrome-extraction cycles in ~0.25–1.3 ms using only static bus gates.","Atom shuttling can be relegated to background reloading and offline magic-state factories, removing transport latency from the algorithmic clock.","A modular layout interleaving high-rate LDPC memories with surface-code processing units becomes practical under present-day Rabi rates and lattice spacings."],"fun_headline_variants":["Static atomic buses cut logical errors 10× without shuttling","Mediator atoms enable long-range CZ gates at 99.9% fidelity","Static buses support 1 ms QEC cycles for d≲12 surface codes","Bus-mediated gates yield order-of-magnitude logical error gains","Atomic buses replace transport for modular fault-tolerant atoms"],"cache_read_input_tokens":32896,"weakest_assumption_plain":"The comparison assumes shuttling heating grows as A times distance to the two-thirds power with an optimistic A, while treating idle errors as zero in the static case and omitting laser phase noise and stray fields that affect high-n Rydberg states.","fun_headline_variants_meta":{"raw":{"variants":["Static atomic buses cut logical errors 10× without shuttling","Mediator atoms enable long-range CZ gates at 99.9% fidelity","Static buses support 1 ms QEC cycles for d≲12 surface codes","Bus-mediated gates yield order-of-magnitude logical error gains","Atomic buses replace transport for modular fault-tolerant atoms"]},"model":"grok-4.5","effort":"low","cost_usd":0.00437,"raw_usage":{"total_tokens":1345,"prompt_tokens":829,"num_sources_used":0,"completion_tokens":75,"cost_in_usd_ticks":43700000,"prompt_tokens_details":{"text_tokens":829,"audio_tokens":0,"image_tokens":0,"cached_tokens":256},"completion_tokens_details":{"audio_tokens":0,"reasoning_tokens":441,"accepted_prediction_tokens":0,"rejected_prediction_tokens":0}},"tokens_in":829,"tokens_out":75,"duration_ms":4718,"temperature":1.0,"reasoning_tokens":441,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-07-12T06:56:18.707011+00:00","model_set":{"reader":"grok-4.5"},"falsifier":"Repeat the Monte-Carlo logical-error simulations of the Bell-pair and La-cross memory circuits after replacing the shuttling-heating model with measured heating rates from a real dual-species array and after injecting laser-phase and electric-field noise into the bus-gate fidelities; if the static advantage disappears below physical error rates of 10^{-3}, the central claim fails.","supporting_citations":[],"review_version":1}