{"id":"fc29fcfd-d622-466f-b1f4-de23c9b945a7","arxiv_id":"2607.03275","paper_version":2,"verdict":"CONDITIONAL","confidence":"HIGH","novelty_score":7.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":4,"one_line_summary":"A weighted probability of successful trials (wPST) figure of merit, predicted quickly by an XGBoost model, correlates over 50% better with true execution quality than standard circuit metrics.","lead":"This paper proposes a new way to score how well a compiled quantum circuit will run on noisy hardware, plus a machine-learning model to predict that score quickly. It could make quantum compilers pick better circuits without running every candidate on the hardware.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The >50% correlation advantage is shown only for already-transpiled circuits; the two-step pipeline for non-transpiled circuits (Sec. V) is never compared against simple FoMs, and the paper itself defers compiler integration to future work, leaving the compilation-benefit claim unsubstantiated.","rationale":"The reader's CONDITIONAL verdict seems right. I considered the training-distribution shift (random vs MQT) and shot-noise in labels; those are real but partially mitigated by the MQT test results and the use of four hardware devices. The sharper issue is that the main quantitative claim (>50% correlation improvement) is established only for already-transpiled circuits, while the actual compilation use case requires scoring non-transpiled circuits via the two-step pipeline. Figure 10 shows error degradation, and the text explicitly defers both compiler integration and feature-selection research to future work. The paper is honest about this, which is why I would not reject it, but the abstract's framing overstates readiness. A simple correlation/ranking comparison of the two-step predictions against standard FoMs on non-transpiled circuits would settle the matter. If the two-step predictor preserves most of the direct predictor's advantage, the central claim is solid; if not, the paper's contribution reduces to the wPST definition and direct prediction, which are still valuable but do not yet support the compilation claim. Hence UNCHANGED (CONDITIONAL).","tokens_in":29401,"tokens_out":9028,"duration_ms":99965,"concrete_test":"On IBM Torino (or the 12-qubit simulator), take 200 non-transpiled MQT benchmark circuits. For each circuit, compute the two-step predicted wPST using the Sec. V A pipeline; then transpile with Qiskit, execute/simulate the verification circuit, and compute the empirical true wPST. Report Pearson and Spearman correlations between (a) two-step predicted wPST and true wPST, and (b) depth, #gates, #two-qubit gates and true wPST. If the two-step predictor's Spearman rho is not significantly higher than the best simple FoM's (e.g., <10% improvement), the compilation-benefit claim is not supported. Additionally, if feasible, run an end-to-end pass: for each benchmark, generate N candidate compilations with different routing seeds, select the best by predicted wPST vs. by #2Q gates, and compare true wPST of the selected circuits.","verdict_should_be":"UNCHANGED","load_bearing_attack":"Central claim: 'ML-predicted FoMs outperform commonly used FoMs, increasing the correlation with true PST/wPST by over 50%' and 'enable improvements in quantum circuit compilation.' The correlation results (Tables I–IV) are for circuits that have already been transpiled for the target device. But a compiler must score non-transpiled circuits. The paper's bridge is the two-step process of Sec. V A. Fig. 10 shows that this two-step predictor has higher RMSE than the direct predictor (mean RMSE ≈ 0.06 on IBM Torino), and Sec. V B states that 'additional research is required into which features to choose and how the quantum compilers will perform using this process.' The conclusion lists compiler integration as 'a first task for follow-up work.' No Pearson/Spearman correlation with true wPST is reported for the two-step predictions, and no comparison against circuit depth, gate count, or two-qubit-gate count on non-transpiled circuits. Thus the practical half of the central claim — that ML-predicted FoMs improve compilation — rests on an unvalidated component. If the two-step predictions are substantially noisier than the direct predictions, the >50% advantage could shrink or disappear in actual compiler use.","agreement_with_reader":"partial"},"referee_report":{"model":"deepseek-v4-flash","summary":"This paper studies figures of merit for quantum circuit compilation. It introduces a weighted probability of successful trials (wPST): for a verification circuit formed by appending a circuit and its inverse, wPST averages over measured bit strings the fraction of zeros, with a threshold w_th=0.5 below which no credit is given. The paper shows that for w_th=0, wPST equals the average single-qubit marginal probability of measuring |0>; with a threshold it becomes a sum over Hamming-weight shells. It derives scaling under independent bit-flip noise (PST ~ (1-eps)^n, wPST ~ 1-eps) and a shot-budget analysis showing wPST requires many fewer shots for fixed relative error. The authors train XGBoost models on random circuits, using circuit-DAG features plus hardware coherence-time features, to predict PST and wPST; they evaluate Pearson correlations against true values on a 12-qubit simulator and four IBM devices, with separate MQT benchmark circuits. For transpiled circuits, predicted wPST/PST shows higher correlation than depth, gate count, and two-qubit gate count. Finally, they propose a two-step pipeline intended for non-transpiled circuits: first predict the transpiled feature vector, then predict wPST, and report RMSE on IBM Torino. The paper claims the ML-predicted FoMs outperform standard FoMs by over 50% in correlation and enable improved compilation.","tokens_in":29727,"tokens_out":10985,"duration_ms":102919,"significance":"The analytical core — the marginal formulation of wPST, the bit-flip scaling, and the shot-budget comparison — is clean and, as far as I checked, internally consistent; this is a genuine contribution that goes beyond the usual 'train a regressor' paper. The hardware evaluation across four IBM devices is transparent, uses a public benchmark suite (MQT), and reports per-device correlations. The paper also candidly acknowledges that the two-step process requires further research and that compiler integration is future work. My reservations concern the scope of the empirical claim: the >50% improvement is not uniform across the reported settings, and the two-step component that would make the method useful for compilation is not validated against any baseline. With those gaps addressed, the paper would be a solid contribution.","major_comments":[{"comment":"The statement that the predicted FoMs 'increase the correlation with true PST or wPST by over 50%' is not supported for several of the settings reported. In Table I, for random simulator circuits the best structural baseline is # gates (r=0.815) and predicted PST gives 0.945, an improvement of about 16%; in Table II for MQT wPST the improvement is about 27% (0.880 vs 0.695), and for random wPST about 4.5% (0.925 vs 0.885). The >50% figure is robust only for the hardware averages in Tables III-IV (e.g., 0.89 vs 0.53 for wPST) and for simulator MQT PST. Please qualify the claim to the setting in which it holds, align the abstract and conclusion ('nearly 50%'), and report confidence intervals or bootstrap errors for the correlations, since the hardware wPST labels are shot-noise limited.","section":"Abstract; Sec. IV A, Tables I-IV"},{"comment":"The two-step process is the bridge from the direct predictor (validated on transpiled circuits) to compilation workloads. Its evaluation is incomplete: Fig. 10 reports only RMSE (mean ~0.06 on Torino) and does not provide the Pearson/Spearman correlation of the two-step wPST predictions with true wPST, nor any comparison with circuit depth, gate count, or two-qubit-gate count on the same non-transpiled inputs. Section V B itself states that 'additional research is required into which features to choose and how the quantum compilers will perform using this process,' and the conclusion lists compiler integration as 'a first task for follow-up work.' The abstract's claim that the findings 'enable improvements in quantum circuit compilation' is therefore not established. A concrete test would be to report ranking-quality metrics for the two-step predictor against standard FoMs on a non-trans","section":"Sec. V B, Fig. 10, conclusion"},{"comment":"The baseline set is limited to naive structural metrics. The paper itself lists hardware-aware alternatives (expected fidelity, ESP, MQT Predictor) in Sec. II A 3. Since the ML predictor uses hardware data, comparing only against depth and gate counts may inflate the reported advantage. Please include at least one such hardware-aware baseline or explicitly restrict the claim to 'simple structural metrics.' This matters for the abstract's 'commonly used FoMs' wording.","section":"Sec. II A 3; Tables I-IV"},{"comment":"The first-step feature prediction is not validated for ranking. Fig. 9 shows large RMSE for the two-qubit-gate count (for larger n, of the same order as the true counts) and for program communication, while Fig. 7 identifies these as among the most important features for wPST prediction. The paper does not quantify how feature-prediction errors propagate to the final wPST orderings. At minimum, report the correlation between two-step-predicted wPST and true wPST and show whether the predicted ordering is still significantly better than the standard FoMs.","section":"Sec. V A; Figs. 7 and 9"}],"minor_comments":[{"comment":"The notation is confusing: m_q is defined as the single-qubit marginal for qubit q, but then wPST_{wth=0} is written as m_q (or \\bar m_q) to denote the average over q of these marginals. Please introduce a distinct symbol for the average.","section":"Sec. II B 3, Eq. (16)"},{"comment":"D_crit is described as 'the number of two-qubit interactions that lie along the critical path,' but the formula is a fraction N_ed/N_2. Adjust the description to 'fraction of two-qubit gates lying on the critical path.'","section":"Sec. III A, Eq. (28)"},{"comment":"The fixed value F=1000 for unused qubits is chosen 'according to the maximum depth of the training circuits used.' A brief sensitivity analysis or a sentence on how results depend on this constant would be helpful.","section":"Sec. III B, Eq. (33)"},{"comment":"The abstract states 'over 50%' improvement; the conclusion says 'nearly 50%.' Please make these consistent (this is also related to Major Comment 1).","section":"Conclusion vs Abstract"}],"recommendation":"major_revision","confidential_remarks":"For the editor: the direct predictor results are solid and the wPST analysis is a useful contribution. My main concern is that the abstract overstates both the magnitude and the applicability of the advantage. The paper itself is transparent about the two-step limitations, so this is fixable in revision. I would not reject on the current evidence."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Let me give you the short version. The paper's real contribution is wPST, a Hamming-weight-graded version of PST, and the analytical work around it. That part is clean: wPST is a linear functional of single-qubit marginals, scales as 1-epsilon instead of (1-epsilon)^n, and the shot-budget analysis in Appendix G shows the number of shots needed for fixed relative precision is O(1/n) under independent bit-flip noise rather than exponential. Those are derivations, not hand-waving, and they make wPST a genuinely better-behaved figure of merit for larger circuits. The ML predictor is also honest: it is trained on random circuits and tested on held-out random and MQT benchmark circuits, with hardware results on four IBM devices. The Pearson correlations (0.89 average for wPST, 0.95 for PST) beat the standard gate-count and depth metrics by a comfortable margin on those test sets.\n\nThe soft spot is the banner claim about compilation. The abstract says the predicted FoMs 'enable improvements in quantum circuit compilation,' but the evidence stops well short of that. The correlation numbers in Tables I-IV are for circuits that have already been transpiled for the target device. For non-transpiled circuits, the two-step pipeline in Sec. V produces higher RMSE (Fig. 10), is never compared against simple FoMs, and the paper itself says 'additional research is required' and lists compiler integration as future work. So the central practical claim—that this improves compilation—is not demonstrated. That's a real gap, but it's a gap the paper almost acknowledges. The conclusion says integration is a first task for follow-up work.\n\nThere are smaller things worth noting: no code or data shared, so the ML results are hard to reproduce independently; the training generator uses uniform random angles and a fixed gate set, so generalization to real compilation workloads is an assumption; and there are a couple of free parameters (F_unused = 1000, w_th = 0.5) that are justified but remain tuning choices. None of this undermines the analytic core.\n\nWho should read this: anyone working on circuit compilation heuristics or benchmarking metrics. The wPST definition and shot budget are worth citing. I would send it to peer review, not desk-reject. The referee should push for either a substantially tempered abstract or a direct comparison of the two-step pipeline against gate-count and depth on non-transpiled circuits. As it stands, it's a solid paper with an overreach in the last sentence.","headline":"The wPST metric and its shot-budget analysis are genuinely useful; the ML predictor looks strong on transpiled circuits, but the compiler-benefit claim rests on a two-step pipeline the paper itself hasn't validated.","tokens_in":30252,"tokens_out":2008,"would_cite":true,"duration_ms":21320,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":["81P68"],"pacs":["03.67.Lx"],"model":"deepseek-v4-flash","headline":"A weighted success-probability metric, predicted by machine learning, ranks quantum circuits far better than gate count or depth.","keywords":["quantum circuit compilation","figure of merit","probability of successful trials","weighted PST","machine learning","circuit quality prediction","noise-aware compilation","mirror circuits"],"falsifier":"Take a set of non-transpiled application-level circuits on a fixed device, apply several compilation strategies, and compare the two-step predicted wPST ranking with the measured wPST ordering; if the predicted ranking is no better than a depth- or gate-count-based ranking, the paper's central claim collapses.","tokens_in":29280,"feed_emoji":"⚛️","tokens_out":4637,"duration_ms":49663,"temperature":0.7,"pith_summary":"This paper aims to give quantum circuit compilers a cheap but reliable way to rank candidate circuits. It introduces wPST, a weighted version of the probability of successful trials that gives partial credit for partially correct measurement outcomes, and shows that wPST is linear in per-qubit marginals and degrades linearly with error rate instead of exponentially. Since evaluating wPST by execution is costly, the paper trains a decision-tree model on circuit features plus hardware data to predict PST and wPST. Across simulated and real quantum processors, the predicted metrics correlate substantially better with the true measured metrics than standard circuit-level figures such as depth and gate counts, improving correlation by over 50 percent. It also proposes a two-step predictor that estimates what transpilation will add to a circuit, making the metric usable during compilation before a circuit has been mapped to hardware.","feed_headline":"Machine-learned score predicts quantum circuit quality 50% better","feed_subtitle":"The new figure of merit, wPST, ranks compiled circuits by weighted success probability instead of gate counts.","key_machinery":"The key object is wPST, defined as the weighted sum over measured bit strings with weight equal to the fraction of zero bits, restricted to strings whose weight exceeds a threshold. At threshold zero it reduces to the average single-qubit marginal; at threshold one it reduces to PST. This linearity in single-qubit marginals is what makes wPST degrade linearly with per-qubit error rate and keeps shot requirements polynomial rather than exponential. The predictive machinery is a feature vector of circuit DAG statistics (qubit count, gate counts, depth, two-qubit gates, program communication, entanglement ratio, parallelism, critical depth, liveliness) combined with per-qubit decoherence failur","core_discovery":"The central claim is that a machine-learning-predicted PST and wPST can serve as a figure of merit that combines the accuracy of execution-based metrics with the speed of structural metrics. wPST is defined as the thresholded, Hamming-weighted probability of measuring bit strings close to the all-zero reference in a mirror circuit, so it rewards partially correct outcomes. Because wPST is a linear functional of single-qubit marginals, it remains informative as system size grows, where PST collapses to zero; the paper shows the number of shots needed for fixed relative precision is O(1/n) under independent errors, versus exponential in n for PST. Empirically, predicted PST and wPST correlate","pith_inferences":["The paper stops short of showing that using the predicted metric inside a real compiler improves end-to-end algorithm success; an immediate test is to run two compilation pipelines, one selecting circuits by predicted wPST and one by gate count, and compare measured output quality.","The training distribution, based on random circuits with uniformly sampled angles and a fixed gate set, may not cover structured application workloads; if a compiler targets a specific algorithm family, retraining or active learning on that family may be needed.","The two-step predictor's first stage, which predicts transpilation overhead, could be reused as a standalone cost model for other compiler heuristics, even outside PST-based selection.","Because wPST is linear in single-qubit marginals, it could be combined with cheap marginal-estimation or error-mitigation techniques more readily than PST, though the paper does not develop this."],"forward_implications":["Compilers can replace depth- and gate-count-based selection with a fast predicted score that tracks measured execution quality far better, so the circuits they select should run closer to ideal.","wPST can be measured accurately with far fewer shots than PST at large qubit counts, making it practical to benchmark and compare larger noisy circuits.","The two-step predictor allows figure-of-merit-aware decisions before a circuit is transpiled, opening the way to integrate it into routing and optimization loops.","The thresholded wPST has a known depolarizing noise floor, so practitioners can distinguish meaningful signal from a scrambled-noise regime.","Because wPST avoids exponential collapse with qubit count, it remains a usable quality metric in a size regime where PST is essentially always zero."],"fun_headline_variants":["ML-predicted wPST boosts quantum circuit ranking accuracy by 50%","Quantum circuit quality: ML predicts weighted success probability","Faster, better circuit selection with ML-driven wPST metric","wPST: new quantum circuit quality score predicted by ML","Machine learning improves quantum circuit scoring by 50%"],"cache_read_input_tokens":2304,"weakest_assumption_plain":"The central claim stands only if the machine-learning model, trained on random circuits with uniformly sampled angles and a fixed gate set, transfers to the structured circuits and noise conditions that a real compiler faces, and if the measured PST and wPST values used as ground truth are stable enough to train against.","fun_headline_variants_meta":{"raw":{"variants":["ML-predicted wPST boosts quantum circuit ranking accuracy by 50%","Quantum circuit quality: ML predicts weighted success probability","Faster, better circuit selection with ML-driven wPST metric","wPST: new quantum circuit quality score predicted by ML","Machine learning improves quantum circuit scoring by 50%"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000309,"raw_usage":{"total_tokens":1666,"prompt_tokens":871,"completion_tokens":795,"prompt_tokens_details":{"cached_tokens":256},"prompt_cache_hit_tokens":256,"prompt_cache_miss_tokens":615,"completion_tokens_details":{"reasoning_tokens":709}},"tokens_in":615,"tokens_out":795,"duration_ms":7963,"temperature":1.0,"reasoning_tokens":709,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-02T08:49:36.599083+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Take a set of non-transpiled application-level circuits on a fixed device, apply several compilation strategies, and compare the two-step predicted wPST ranking with the measured wPST ordering; if the predicted ranking is no better than a depth- or gate-count-based ranking, the paper's central claim collapses.","supporting_citations":[],"review_version":2}