{"id":"b9d433b7-a76c-4bc3-a0c2-0de1e14ce14a","arxiv_id":"2607.03588","paper_version":1,"verdict":"CONDITIONAL","confidence":"HIGH","novelty_score":6.5,"correctness_risk":"low","formal_verification":"none","parameter_count":5,"one_line_summary":"A Screened Power Law de-embedding framework extracts intrinsic attofarad-scale capacitance, loss, and hysteresis of 20 nm AlScN capacitors down to 165 nm diameter, showing bulk-like ferroelectricity persists in few-grain devices.","lead":"A new in-situ nanoprobing method measures true electrical properties of ferroelectric capacitors as small as 165 nm without bond pads. It removes probe parasitics so that bulk-like AlScN switching can be verified in the few-grain limit for dense memory.","discovery_kind":"new_method","skeptic_critique":{"model":"grok-4.5","headline":"The multi-parameter Screened Power Law can absorb residual size dependence into Kf(r), so the claimed flat εr≈17 may be partly enforced by the fit rather than uniquely required by the data.","rationale":"The reader correctly isolates the least secure link: the Screened Power Law’s ability to force flat εr. Conductance scaling for tanδ and the leakage-compensated J-E peaks are more robust (fewer free parameters, direct intercepts and visible switching currents). Because the permittivity claim is the most model-dependent part of the central result, the existing CONDITIONAL verdict already captures the appropriate caution; no stronger or weaker adjustment is warranted. An independent geometric validation (FEM or alternative functional forms) would convert the verdict to ACCEPT.","tokens_in":22758,"tokens_out":526,"duration_ms":24059,"concrete_test":"Generate synthetic Cmeas(r) from a 3-D FEM of the actual bent tungsten tip + SEM-measured tapered electrode foot, using fixed bulk εr=17; then apply the paper’s exact pipeline (lock Cstatic, fit Screened Power Law). If recovered εr stays flat within the reported ±3, the model is validated; if systematic residuals appear for r<300 nm, the de-embedding is incomplete and the flatness claim is an artifact.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The strongest claim (size-independent εr≈17 down to 165 nm) rests on Eqs. 1–3 and Table 1. After locking Cstatic from the r→0 floor and εr from macroscopic pads, every residual is forced into Cdynamic=Kf(r)·Cedge(r) with the Screened Power Law Kf(r)=Kbase+A(d/r)^n exp(−r/L). A, n and L remain free (L only estimated at 15 µm). This functional form is flexible enough to cancel any weak intrinsic size dependence, higher-order multipoles, or contact-area variation while still producing high R^{2} and a flat post-subtraction Cbulk∝r^{2}. Consequently the flatness of Fig. 2c is not an independent experimental result; it is the residual after a multi-parameter geometric subtraction whose uniqueness is untested. If an alternative geometric model leaves a non-flat residual of comparable quality, the “beyond the parasitic limit” claim for permittivity at N<30 grains weakens.","agreement_with_reader":"agree"},"referee_report":{"model":"grok-4.5","summary":"The manuscript presents an in-situ SEM nanoprobing framework for electrical characterization of isolated Al0.72Sc0.28N capacitors from ~50 µm down to 165 nm diameter without lithographic bond pads. A three-component capacitance decomposition (bulk + static stray + dynamic fringing) is closed with a Screened Power Law geometric factor Kf(r) that is intended to capture near-field probe-cone coupling and knife-edge electrode singularities; after de-embedding, a size-independent permittivity εr≈17 is reported. Apparent nanoscale suppression of tanδ is attributed to lossless vacuum-shunt dilution and is recovered via area–perimeter conductance scaling to a bulk value ~1.41%. Large-signal PUND J–E loops with leakage subtraction and FFT filtering show clear switching peaks and Ec trends down to ~190 nm (few-grain limit). The work positions the protocol as a general metrological toolkit for deep-submicron wurtzite ferroelectrics.","tokens_in":23037,"tokens_out":1334,"duration_ms":18038,"significance":"If the de-embedding is robust, the paper removes a genuine measurement bottleneck for scaled ferroelectrics: direct electrical access to attofarad-level capacitors without pad parasitics, with quantitative recovery of permittivity, loss, and hysteresis in the N<30-grain regime. The experimental span (five orders of magnitude in area), SEM-segmented effective radii, RSS error propagation, multi-sweep averaging, and the independent conductance-scaling recovery of tanδ are concrete strengths. The quantitative match between the predicted loss floor (~0.71%) and the measured plateau (~0.76%) is a useful cross-check. The framework is of clear interest to the AlScN and nanoscale ferroelectric communities even if some model uniqueness questions remain.","major_comments":[{"comment":"§2.3, Eqs. (1)–(3) and Table 1 / Fig. 2c: After locking Cstatic from the r→0 floor and εr from macroscopic Chip-1 pads, residual capacitance is forced into Cdynamic = Kf(r)·Cedge(r) with free parameters A, n, and (estimated) L in the Screened Power Law. This functional form is flexible enough to absorb weak intrinsic size dependence, higher-order multipoles, or contact-area variation while still yielding high R² and a flat post-subtraction εr. The flatness of Fig. 2c is therefore not fully independent of the geometric model. Please (i) report a sensitivity analysis (vary A, n, L within physically plausible bounds and show the residual εr(r)), (ii) test at least one alternative geometric form (e.g., pure power law without screening, or a fixed-Kf Kirchhoff–Palmer baseline), and (iii) state which parameters are locked versus free for each chip so that uniqueness of the size-independent εr","section":null},{"comment":"§3.1 and Supplementary Note 5: The screening length L is stated as “estimated at 15 µm” from SPM literature rather than constrained by the present capacitance-versus-radius data. Because L multiplies the exponential cutoff of the near-field term, its value directly affects how much of the nanoscale excess capacitance is attributed to probe geometry versus the device. Either fit L (with uncertainty) from the Chip-2 data or demonstrate that the extracted εr and Kf trends are stable over a documented range of L (e.g., 5–30 µm).","section":null},{"comment":"§3.3–3.4 and Fig. 4b / Fig. 5c: Ec scaling trends are interpreted as perimeter-leakage voltage-masking, but Chip 1 and Chip 2 come from distinct deposition runs with different top-Pt thicknesses (30 nm vs 20 nm). The manuscript already notes a batch offset in Ec. Please separate batch-to-batch structural variation from true dimensional scaling more cleanly (e.g., by reporting Ec only within each chip, or by quantifying thickness/interface differences) before attributing the progressive hardening primarily to perimeter shunt effects.","section":null}],"minor_comments":[{"comment":"Abstract and §1: “apparent degradation of dielectric loss” is slightly ambiguous; the data show an apparent *suppression* (dilution) of tanδ, not degradation. Align wording with §3.2.","section":null},{"comment":"Fig. 1 caption: panel labels “c), d)” then “d)” again; renumber so that the 250 nm contact image is uniquely labeled.","section":null},{"comment":"Eq. (4) and surrounding text: tanδmeas is written with Cstatic in the numerator without an explicit tanδstatic≈0 factor; state the lossless assumption explicitly in the equation for clarity.","section":null},{"comment":"Table 1: “actual thickness … estimated at ≈17 nm to align with the permittivity previously reported” should be justified with an independent thickness metrology (XRR/TEM) rather than permittivity matching alone, or the circularity should be flagged.","section":null},{"comment":"§2.5 / Fig. S2: grain diameter “31.15” lacks units in the main text (nm is clear from SI but should appear in the sentence).","section":null},{"comment":"Several SI figure references (e.g., “Figure S 1”, “Figure S 3”) have inconsistent spacing; normalize labeling.","section":null},{"comment":"References: ensure consistent formatting of journal names and DOIs; a few entries (e.g., ASTM grain-size standard) are incomplete.","section":null}],"recommendation":"major_revision","confidential_remarks":"The core contribution is metrological rather than a new materials discovery; that is appropriate for a methods-forward materials journal but the multi-parameter geometric model needs the uniqueness tests above before the “size-independent εr down to 165 nm” claim can be taken as fully experimental. The loss-dilution and J–E results are on firmer ground and would still support a solid paper if the permittivity claim is moderated. I do not see fabrication or data-integrity red flags."},"author_rebuttal":null,"desk_editor":{"model":"grok-4.5","letter":"This is a careful methods paper that actually solves a real measurement problem: how to get quantitative C-V and J-E data on ferroelectric capacitors down to ~165 nm without bond pads. The new pieces are the Screened Power Law de-embedding of probe-cone and knife-edge fringing, the conductance-per-area analysis that recovers bulk tan δ after geometric dilution, and the leakage-compensated few-grain PUND loops. They span five orders of magnitude in area, use SEM-extracted effective radii, report RSS error bars, and show that the apparent drop in loss is a vacuum-shunt artifact. That package is useful for anyone working on wurtzite ferroelectrics or high-k nano-caps.\n\nWhat they do well is the experimental hygiene. Dual-chip process, in-situ Pt cap, multi-sweep averaging with wake-up exclusion, FFT filtering, and explicit spreading-resistance modeling all look solid. The dilution equation quantitatively matches the observed tan-δ floor once Cstatic and Cdynamic are taken from the capacitance fit, and the recovered εr ≈ 17 and tan δ ≈ 1.41 % sit on literature values. The J-E peaks remain clear at N < 30 grains; that is real data, not just a model claim.\n\nThe soft spot is exactly the one the stress-test flags, and it is real but not fatal. After locking Cstatic from the r\to0 floor and εr from the large pads, residual capacitance is forced into Kf(r) = Kbase + A (d/r)^n exp(-r/L). A, n and L (estimated ~15 µm) are free enough that a weak intrinsic size dependence or unmodeled multipole could be absorbed while still producing high R^{2} and a flat post-subtraction εr. The functional form is physically motivated (Kirchhoff-Palmer + Jackson edge singularity + SPM screening), and the exponent shift from sub- to super-linear is consistent with the tapered “foot,” but uniqueness is untested—no FEM cross-check, no alternative model comparison. So Fig. 2c is not an independent experimental result; it is the residual after a flexible geometric subtraction. That weakens the strongest wording of “size-independent permittivity down to 165 nm,” but does not erase the rest of the toolkit.\n\nThis is for people who measure or model sub-micron ferroelectrics and need a practical de-embedding recipe. It deserves a serious referee; the data and SI are thorough enough that the fit-uniqueness issue can be tightened in revision. I would cite the conductance scaling and the few-grain J-E protocol, and I would bring it to reading group if we are talking metrology or AlScN scaling.","headline":"Solid experimental metrology toolkit for deep-submicron AlScN; the Screened Power Law is useful but multi-parameter, so the perfectly flat εr is partly by construction.","tokens_in":23660,"tokens_out":696,"would_cite":true,"duration_ms":6273,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"grok-4.5","headline":"A nanoprobing de-embedding method recovers bulk-like ferroelectric switching in AlScN capacitors down to 165 nm.","keywords":["Aluminum Scandium Nitride","AlScN","Ferroelectricity","Nanoprobing","Device Scaling","De-embedding","Wurtzite Ferroelectrics","Dielectric Loss"],"falsifier":"Measure an identical set of capacitors with a fully shielded coaxial nanoprobe or a calibrated on-chip de-embedding structure; if the extracted εr still varies systematically with radius after the Screened Power Law correction, the model is incomplete.","tokens_in":23666,"feed_emoji":"⚡","tokens_out":629,"duration_ms":5127,"temperature":0.7,"pith_summary":"Scaling ferroelectrics for dense memory hits a measurement wall: at deep sub-micrometer sizes the true device signal is swamped by probe parasitics and edge fringing, so reported degradation may be instrumental rather than material. This paper supplies an in-situ nanoprobing protocol that contacts capacitors as small as 165 nm without bond pads, then uses a Screened Power Law model to subtract the near-field probe contribution from the measured capacitance. After that correction the relative permittivity of 20 nm AlScN stays size-independent near 17, the apparent rise in dielectric loss is shown to be geometric dilution, and leakage-compensated large-signal loops still display clear ferroelectric switching even when only a few dozen grains remain under the electrode. The result is a practical toolkit that lets device physicists decide whether further scaling is limited by the crystal itself or by how the measurement is performed.","feed_headline":"Bulk ferroelectric switching recovered at 165 nm capacitors","feed_subtitle":"Screened Power Law de-embedding strips probe parasitics so AlScN keeps εr ≈ 17 and clear hysteresis","key_machinery":"The Screened Power Law geometric factor Kf(r) = Kbase + A (d/r)^n exp(-r/L), which multiplies the classical Kirchhoff-Palmer edge capacitance so that the residual after subtraction of static and dynamic probe strays is the intrinsic parallel-plate term.","core_discovery":"After Screened-Power-Law de-embedding of probe parasitics and geometric fringing, 20 nm Al0.72Sc0.28N capacitors retain size-independent permittivity εr ≈ 17 and bulk-like ferroelectric switching (stable Ec and clear J-E peaks) down to 165 nm diameter (N < 30 grains).","pith_inferences":[],"forward_implications":[],"fun_headline_variants":["Nanoprobing recovers bulk AlScN switching at 165 nm","Screened Power Law strips parasitics to bare 165 nm ferroelectrics","AlScN keeps εr ≈ 17 and clear J-E peaks down to 165 nm","Intrinsic hysteresis restored in few-grain 165 nm AlScN","De-embedding yields size-independent permittivity to 165 nm"],"cache_read_input_tokens":16512,"weakest_assumption_plain":"The Screened Power Law fully accounts for every near-field probe and knife-edge contribution, so whatever capacitance remains after subtraction is purely the intrinsic device response.","fun_headline_variants_meta":{"raw":{"variants":["Nanoprobing recovers bulk AlScN switching at 165 nm","Screened Power Law strips parasitics to bare 165 nm ferroelectrics","AlScN keeps εr ≈ 17 and clear J-E peaks down to 165 nm","Intrinsic hysteresis restored in few-grain 165 nm AlScN","De-embedding yields size-independent permittivity to 165 nm"]},"model":"grok-4.5","effort":"low","cost_usd":0.004388,"raw_usage":{"total_tokens":1306,"prompt_tokens":766,"num_sources_used":0,"completion_tokens":101,"cost_in_usd_ticks":43880000,"prompt_tokens_details":{"text_tokens":766,"audio_tokens":0,"image_tokens":0,"cached_tokens":256},"completion_tokens_details":{"audio_tokens":0,"reasoning_tokens":439,"accepted_prediction_tokens":0,"rejected_prediction_tokens":0}},"tokens_in":766,"tokens_out":101,"duration_ms":3598,"temperature":1.0,"reasoning_tokens":439,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-07-12T01:20:49.821499+00:00","model_set":{"reader":"grok-4.5"},"falsifier":"Measure an identical set of capacitors with a fully shielded coaxial nanoprobe or a calibrated on-chip de-embedding structure; if the extracted εr still varies systematically with radius after the Screened Power Law correction, the model is incomplete.","supporting_citations":[],"review_version":1}