{"id":"912c4059-23d1-43b8-b79c-1a53072659fd","arxiv_id":"2607.09680","paper_version":1,"verdict":"CONDITIONAL","confidence":"HIGH","novelty_score":5.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":6,"one_line_summary":"A dual-encoder low-dimensional computing model classifies five AAMI ECG arrhythmia classes at 97.18% accuracy with 3.86 kB memory and zero DSP blocks on a Pynq-Z2 FPGA.","lead":"ECG-LDC classifies five types of heart arrhythmias using binary vector operations instead of heavy neural nets, reaching 97.18% accuracy in 3.86 kB of memory on an FPGA. It targets continuous cardiac monitoring on cheap, battery-powered wearables where multiply-heavy deep models do not fit.","discovery_kind":"new_application","skeptic_critique":{"model":"grok-4.5","headline":"The random 70/30 beat-level MIT-BIH split is the load-bearing evaluation flaw for the wearable-suitability claim.","rationale":"The reader correctly isolates the single most load-bearing assumption. The engineering contribution (dual-encoder LDC, binary XOR/XNOR datapath, zero-DSP Pynq-Z2 realization, memory footprint) is coherent and the ablations support the architectural choices under the reported protocol. The only condition that must hold for the strongest claim to transfer to the stated use-case is that the reported accuracy generalizes to unseen patients; the random beat-level split does not guarantee that. No other internal inconsistency (equations, hardware complexity, or comparison tables) is comparably load-bearing. Therefore the verdict remains CONDITIONAL: the paper is accept-shaped once patient-independent results (and ideally split indices/code) are supplied; otherwise the 97.18% number should be read strictly as an upper bound under a leaky protocol. No stronger objection is required.","tokens_in":14663,"tokens_out":535,"duration_ms":5404,"concrete_test":"Re-train and re-evaluate the exact Table-I configuration under a patient-independent split (AAMI DS1/DS2 or stratified leave-one-patient-out). If accuracy falls more than ~3–4 points (or macro-F1 drops sharply on S/F), the headline wearable claim weakens and the 97.18% figure must be caveated as beat-level only.","verdict_should_be":"CONDITIONAL","load_bearing_attack":"The central claim (97.18% five-class AAMI accuracy at 3.86 kB, highest among FPGA five-class designs, suitable for real-time wearable deployment) rests on Section IV-A: “The dataset is randomly split into 70% for training and 30% for testing.” MIT-BIH has only 47 subjects; many consecutive beats from the same patient share morphology and RR statistics. A random beat-level split therefore allows same-patient leakage into the test set. Wearable deployment requires generalization to unseen patients (inter-subject / DS1–DS2 or leave-one-patient-out protocols standard in stronger ECG literature). The dual-encoder ablation (Table IV) and FPGA numbers (Tables V–VI) are internally consistent under this protocol, but they do not establish the transfer performance that the wearable claim actually needs. Without patient-independent numbers, 97.18% is an optimistic upper bound rather than evidence of deployable accuracy.","agreement_with_reader":"agree"},"referee_report":{"model":"grok-4.5","summary":"The paper proposes ECG-LDC, a hardware–software co-design that adapts Low-Dimensional Computing to five-class AAMI arrhythmia classification on MIT-BIH. A dual-encoder design uses separate value/feature codebooks for morphological windows (Nm=61) and RR-interval features (Nr=5), binds and bundles them into a concatenated bipolar embedding, and classifies by Hamming distance to a class codebook. Training uses STE bipolarization with BN; inference is realized with binary XOR/XNOR-popcount on a Pynq-Z2 accelerator (binding/bundling, threshold binarization, classification FSM). Reported results are 97.18% accuracy at 3.86 kB memory, an ablation of feature/codebook choices, a memory–accuracy sweep, and post-implementation FPGA metrics (8255 LUTs, 0 DSP, ~4.2 ms end-to-end latency, 1.71 W full system). The authors claim a favorable accuracy–memory trade-off versus TinyML baselines and the best accuracy among listed five-class FPGA designs with lower LUT use and zero DSP.","tokens_in":14955,"tokens_out":903,"duration_ms":15150,"significance":"If the accuracy and efficiency numbers hold under a deployment-relevant protocol, the work is a useful contribution to TinyML ECG: it shows that LDC-style binary hypervector models can reach competitive five-class accuracy with kilobyte-scale memory and a DSP-free FPGA datapath, which is practically relevant for low-cost wearables. Strengths include a clear dual-encoder ablation (Table IV), an explicit accuracy–memory design sweep (Fig. 5), a concrete SystemVerilog/Pynq-Z2 realization with resource/power/latency numbers (Tables V–VI), and honest comparison footnotes (e.g., Greco latency). The hardware co-design and complexity analysis (Eqs. 15–20) are more than a pure software TinyML paper and would interest the edge biomedical signal-processing community.","major_comments":[{"comment":"Section IV-A states that MIT-BIH is randomly split 70/30 at the beat level. With only 47 subjects, consecutive beats from the same patient share morphology and RR statistics, so this protocol admits same-patient leakage. The abstract, introduction, and conclusion frame suitability for real-time wearable deployment on unseen users; that claim requires inter-subject evaluation (AAMI DS1/DS2, patient-wise hold-out, or leave-one-patient-out). Please report accuracy/macro-F1 (and ideally ROC/PR) under at least one patient-independent protocol, or substantially qualify the wearable-generalization claim and restate 97.18% as an intra-dataset upper bound. Without this, the central accuracy number does not support the deployment conclusion even if hardware metrics remain valid.","section":null},{"comment":"Table III and the abstract compare ECG-LDC to TinyML and FPGA baselines, but Section IV-A does not establish that those baselines used the same split (or patient-independent splits). If competitors used inter-patient protocols while ECG-LDC used random beat splits—or vice versa—the accuracy ranking is not commensurate. Please document each baseline’s train/test protocol (or re-evaluate under a common protocol) so that the “highest accuracy among five-class FPGA designs” and “~1.8% below SOTA TinyML” statements rest on aligned evaluation.","section":null},{"comment":"Table V reports full-system dynamic power of 1571 mW (1.71 W in Table VI) while the ECG-LDC core is only 34 mW dynamic. Wearable suitability is repeatedly claimed, yet 1.71 W is dominated by the PS/AXI stack on Pynq-Z2 and is not a wearable power budget. Please separate core vs. full-system power clearly in the abstract/conclusion, state what fraction is attributable to the LDC datapath, and either (i) provide a duty-cycled or MCU/ASIC power estimate, or (ii) limit the wearable claim to memory/LUT/DSP efficiency of the core rather than end-to-end board power.","section":null}],"minor_comments":[],"recommendation":"major_revision","confidential_remarks":null},"author_rebuttal":null,"desk_editor":{"model":"grok-4.5","letter":"The one thing to know: this is a competent hardware–software co-design paper, not a methods breakthrough. LDC is prior (Duan et al.); what is new is the dual-encoder split (separate morph and RR value/feature codebooks, concatenated embedding), the ECG preprocessing stack, and a full Pynq-Z2 accelerator with measured resources.\n\nWhat they do well is the engineering package. Binary/XOR path, thresholded BN binarization, packed-word unrolling, complexity formulas, and post-implementation numbers are coherent. 3.86 kB total memory, zero DSPs, ~8k LUTs for the full PS+PL system, and throughput far above 360 Hz sampling is a real edge win. Ablation (Table IV) supports separate codebooks over shared; the memory–accuracy sweep is honest about the operating point. Limitations section flags AXI overhead and MCU/ASIC next steps without overselling.\n\nThe soft spot that matters is evaluation protocol. Section IV-A uses a random 70/30 beat-level split on MIT-BIH. With 47 subjects, same-patient morphology and RR statistics leak into test. Wearable suitability needs inter-subject (DS1–DS2 or LOPO) numbers; without them, 97.18% is an optimistic upper bound under a leaky split, not proof of patient transfer. Macro sensitivity (~84%) already shows the hard classes (S, F) are weak, which is expected under imbalance but under-discussed for deployment. No code, no split indices, no multi-run variance. Citation pattern is fine for TinyML/FPGA ECG; math is standard LDC + STE, not load-bearing novelty.\n\nWho it is for: people building sub-10 kB, DSP-free arrhythmia engines on FPGA/MCU. Not for clinical validation or new sensing science. The central hardware claims hold under the protocol they used; the wearable-generalization claim does not yet. I would send it to peer review—solid enough for referees, with a clear request for patient-independent results and code. Engage if you care about LDC/TinyML hardware; skim the tables if you only need a memory baseline.","headline":"Clean dual-encoder LDC + zero-DSP FPGA co-design for five-class ECG; the 97% number is real under a leaky beat split, so treat wearable transfer claims as provisional.","tokens_in":15631,"tokens_out":559,"would_cite":true,"duration_ms":9193,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"grok-4.5","headline":"ECG-LDC classifies five arrhythmia types at 97.18% accuracy with a 3.86 kB memory footprint using only XOR/XNOR operations and zero DSP blocks.","keywords":["TinyML","edge computing","FPGA","hardware acceleration","arrhythmia classification","wearable devices","Low-Dimensional Computing","ECG"],"falsifier":"Retrain and re-evaluate the identical ECG-LDC configuration under a strict inter-patient (leave-subjects-out) protocol on MIT-BIH and measure whether five-class accuracy remains near 97% with the same 3.86 kB footprint.","tokens_in":15479,"feed_emoji":"❤️","tokens_out":604,"duration_ms":6790,"temperature":0.7,"pith_summary":"Wearable cardiac monitors need accurate arrhythmia detectors that fit inside tiny power and memory budgets. Deep networks reach high accuracy but demand millions of parameters and multiply-accumulate units that low-cost edge chips cannot afford. This paper adapts Low-Dimensional Computing (LDC) into a dual-encoder design that separately encodes the shape of each heartbeat and the timing between beats, then classifies with simple binary XOR/XNOR operations. The resulting model occupies only 3.86 kB, runs on an inexpensive FPGA with no DSP blocks, and still reaches 97.18% five-class accuracy on the standard MIT-BIH arrhythmia database. The practical payoff is a classifier small and fast enough for continuous real-time monitoring on resource-constrained wearables while remaining competitive with far larger TinyML baselines.","feed_headline":"97% arrhythmia accuracy in 3.86 kB with zero DSP blocks","feed_subtitle":"Dual-encoder binary LDC classifies five ECG beat types on a low-cost FPGA for wearables","key_machinery":"Dual-encoder LDC: dedicated value and feature codebooks for morphology and RR-interval features that are bound by element-wise multiplication (XOR on hardware), bundled by accumulation and sign, concatenated, and matched to class hypervectors by Hamming distance.","core_discovery":"A dual-encoder Low-Dimensional Computing architecture that independently binds morphological waveform features and RR-interval temporal features into bipolar hypervectors, then classifies by Hamming distance, achieves 97.18% five-class AAMI accuracy at 3.86 kB total memory and zero DSP utilization on FPGA, outperforming prior five-class FPGA designs in both accuracy and logic cost.","pith_inferences":[],"forward_implications":[],"fun_headline_variants":["97% five-class ECG accuracy in 3.86 kB zero DSP","Dual-encoder LDC: 97% arrhythmia accuracy at 3.86 kB","Binary LDC hits 97% ECG beat accuracy with 3.86 kB","FPGA ECG classifier reaches 97% in 3.86 kB no DSPs","LDC binds wave and RR features for 97% at 3.86 kB"],"cache_read_input_tokens":128,"weakest_assumption_plain":"The accuracy numbers rest on a random beat-level train/test split of MIT-BIH rather than a patient-independent split, so patterns from the same person can leak into both sets.","fun_headline_variants_meta":{"raw":{"variants":["97% five-class ECG accuracy in 3.86 kB zero DSP","Dual-encoder LDC: 97% arrhythmia accuracy at 3.86 kB","Binary LDC hits 97% ECG beat accuracy with 3.86 kB","FPGA ECG classifier reaches 97% in 3.86 kB no DSPs","LDC binds wave and RR features for 97% at 3.86 kB"]},"model":"grok-4.5","effort":"low","cost_usd":0.003884,"raw_usage":{"total_tokens":1268,"prompt_tokens":835,"num_sources_used":0,"completion_tokens":95,"cost_in_usd_ticks":38840000,"prompt_tokens_details":{"text_tokens":835,"audio_tokens":0,"image_tokens":0,"cached_tokens":256},"completion_tokens_details":{"audio_tokens":0,"reasoning_tokens":338,"accepted_prediction_tokens":0,"rejected_prediction_tokens":0}},"tokens_in":835,"tokens_out":95,"duration_ms":3253,"temperature":1.0,"reasoning_tokens":338,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-07-14T17:55:38.471804+00:00","model_set":{"reader":"grok-4.5"},"falsifier":"Retrain and re-evaluate the identical ECG-LDC configuration under a strict inter-patient (leave-subjects-out) protocol on MIT-BIH and measure whether five-class accuracy remains near 97% with the same 3.86 kB footprint.","supporting_citations":[],"review_version":1}