{"id":"ad74d07e-ebd5-4ab5-bf5b-50fb6d32cd1e","arxiv_id":"2607.28787","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":1,"one_line_summary":"In VO2 and V2O3 devices, the first switching event leaves a non-volatile memory — domain rearrangement in the phase-coexistence regime or defect formation at low temperature — that lowers later switching voltages and can be tuned by a gradual writing protocol.","lead":"First electrical switching in vanadium-oxide devices leaves a lasting change that lowers the voltage needed for later switching events, through two distinct mechanisms that act in different temperature ranges. The result matters because this after-effect can be harnessed with a gentle 'writing' protocol to program the switching voltage and power of Mott-transition devices used in neuromorphic and memory-selector circuits.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Low-temperature memory's defect mechanism is the least secure link; direct nanoscale confirmation of the defect species would settle it.","rationale":"The reader's weakest_assumption precisely identifies the unconfirmed defect species/localization as the load-bearing concern. I considered other potential weak points: the internal-series-resistor subtraction method, phase-coexistence stochasticity, and lack of a thermal-cycling-only control. The resistor subtraction is supported by independent linear IV behavior (S3), the phase-coexistence memory is tested against stochasticity with repeated thermal cycles (S5), and the writing-threshold correlation with the defect-memory regime (Fig. 6 vs. Fig. 3) partially mitigates the missing control. None of these are as central as the defect mechanism. The indirect evidence for defects is coherent, and the authors candidly acknowledge the missing nanoscale confirmation, but the entire narrative of 'controlled defect introduction' and 'defect-mediated memory' hinges on that confirmation. Therefore the concern is real and load-bearing, yet it is an addressable limitation rather than a demonstrated error. The reader's CONDITIONAL verdict already reflects this appropriately, so no change is needed.","tokens_in":22970,"tokens_out":5095,"duration_ms":64912,"concrete_test":"Perform aberration-corrected STEM-EELS on a cross-sectional lamella cut through the inter-electrode gap of a VO2 device after the cumulative writing sequence (300→220 K in 20 K steps) and compare O K-edge and V L-edge maps to a pristine device. A spatially localized oxygen-deficient region along the filament path would support the oxygen-vacancy interpretation; absence of any detectable chemical or structural signature would require an alternative mechanism (e.g., trapped charge or metastable domain configuration) to explain the persistent switching-voltage reduction.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central explanatory claim—that the low-temperature memory effect and the writing-protocol tuning arise from electrically created/migrated defects, most plausibly oxygen vacancies—is not directly evidenced. The authors state this explicitly: 'the specific nature of this state is not clear' (Results) and 'the microscopic nature of the defects in this regime is unclear... remains to be confirmed by nanoscale chemical and structural characterization' (Discussion). All supporting evidence is indirect: the effect grows at lower temperature (Fig. 3), persists through thermal cycling (Fig. 4b), and resembles mild annealing (S7). These observations are consistent with oxygen-vacancy formation/migration, but they do not exclude alternative persistent modifications such as trapped space charge with long relaxation, metastable twin/domain configurations that survive a thermal cycle, or slowly relaxing stoichiometry gradients. This matters because the Conclusions generalize to 'controlled defect introduction' and 'defect-mediated memory effect' as the mechanism for tunable switching. If the persistent modification is not a stable ensemble of oxygen vacancies (or similar defects), the writing-protocol mechanism would require substantial reformulation, even though the phenomenological tuning (factor ~2.5 reduction in Vsw, ~6 in power) may remain valid. The paper is transparent about this limitation, which makes it a well-flagged gap rather than an internal inconsistency; nevertheless, it is the least secure load-bearing assumption in the causal chain from observation to mechanism.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper reports memory effects in volatile resistive switches based on VO2 and V2O3 thin films. Using devices with an integrated internal series resistor to suppress current surges, the authors identify three temperature regimes: (i) a phase-coexistence-regime memory in V2O3, attributed to field-induced redistribution of metallic domains, which is erased by thermal cycling; (ii) an intermediate regime with no memory effect; and (iii) a low-temperature memory in both oxides, attributed to electrically induced defect formation/migration, which persists through thermal cycling. They further show that a gradual, multi-step low-temperature 'writing' protocol can reduce the switching voltage by a factor of about 2.5 and the switching power by about a factor of 6 without observable structural damage, whereas a single abrupt writing step leads to crack formation. The central claim is that nominally volatile switching is controllably modified by non-volatile processes occurring during the switching event.","tokens_in":23110,"tokens_out":7918,"duration_ms":92914,"significance":"If the mechanistic conclusions hold, the paper establishes a practically useful coupling between volatile filament dynamics and non-volatile material modification, with a concrete route to post-fabrication tuning of switching parameters in Mott-based threshold switches. The experimental design is a clear strength: the internal-resistor architecture enables repeatable low-temperature switching and provides quantitative surge estimates, while the thermal-cycling experiments and the comparison between gradual and sudden writing protocols give independent discriminators between candidate mechanisms. The authors also explicitly acknowledge the main limitation—the lack of direct nanoscale confirmation of the defect species and its spatial distribution. The work is therefore significant and well positioned, but its mechanistic claims go somewhat beyond the direct evidence.","major_comments":[{"comment":"The low-temperature memory effect is attributed to electrically induced defect formation/migration, with oxygen vacancies identified as the 'most plausible candidates.' However, the manuscript itself states that 'the specific nature of this state is not clear' (Results) and that the interpretation 'remains to be confirmed by nanoscale chemical and structural characterization' (Discussion). The supporting evidence—persistence through thermal cycling (Fig. 4), stronger effect at lower temperature (Fig. 3), and qualitative similarity to mild annealing (S7)—is indirect. Because the Conclusions assert 'defect-mediated memory effect' and 'controlled defect introduction' as established mechanisms, this is a load-bearing claim. I recommend either providing direct chemical/structural evidence (e.g., STEM-EELS, X-ray nanoscopy, or controlled oxygen-environment annealing) or explicitly reframing th","section":"Results and Discussion"},{"comment":"The phase-coexistence memory in V2O3 is interpreted as arising from spatial redistribution of metallic/insulating domains. The thermal-cycling erasure (Fig. 4b) and the temperature dependence (Fig. 3) are consistent with this interpretation, but no direct imaging of the domain configuration before and after switching is provided. The authors themselves note that 'direct imaging... would help clarify' the proposed mechanism. Since this mechanism is one of the two pillars of the 'two distinct memory mechanisms' claim, the paper should more clearly separate this observation-based inference from a directly evidenced conclusion, or add imaging/data that directly probes the domain redistribution.","section":"Results, Fig. 3 and Discussion"}],"minor_comments":[{"comment":"The sentence 'Similar morphological changes could not be observed in V2O3, probably due to the limit on the lowest temperature accessible by our measurement setup, which could not exceed 200V' appears to contain a typo or unclear wording (likely 'could not go below 200 K' or 'could not exceed 200 K'). Please clarify.","section":"Results, paragraph after Fig. 7"},{"comment":"The 'switching power' reported in Fig. 6 is not explicitly defined in the main text. Please state whether it is the product of the switching voltage and the current at switching, and how it is extracted from the IV sweeps.","section":"Fig. 6"},{"comment":"The shaded regions for the three memory regimes overlap, and the caption notes that different devices exhibit different regimes in the overlapping ranges. It would be helpful to state the criterion used to assign a device to a regime and to show the number of devices and measurement repeats underlying each point.","section":"Fig. 3"},{"comment":"The estimate of the V2O3 gap capacitance uses a static dielectric constant of about 5000, which likely applies near the phase transition. Since the low-temperature memory is measured deep in the insulating phase, the actual capacitance may be much smaller. The conclusion is robust, but the choice of εr and its temperature range should be justified or commented on.","section":"Supplementary S3"}],"recommendation":"major_revision","confidential_remarks":"This is a well-executed experimental paper with a convincing central phenomenon and a clear, transparent limitation. My recommendation of major revision rests on the load-bearing mechanistic claim that the low-temperature memory and the writing-protocol tuning are defect-mediated; this remains an inference, not a direct observation. If the authors choose to soften the conclusion and present the defect mechanism as a well-motivated hypothesis, the paper could be suitable for publication with minor revisions. The paper fits the scope of the journal and the internal-resistor device architecture is a notable methodological contribution."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Short version: this is a well-designed device-physics paper that earns a serious referee. The authors separate two distinct non-volatile memory effects in volatile Mott switches, and they do it with clean discriminators. The phase-coexistence memory in V2O3 (first-sweep Vsw higher, erased by thermal cycling) is new relative to prior work on the heating branch; the low-temperature defect-mediated memory in both oxides (persists through thermal cycling) is a different beast. The three-regime temperature map (Fig. 3) and the thermal-cycling erasure test (Fig. 4) are the right experiments, and the intermediate no-memory regime is a nice argument against a generic structural-strain explanation.\n\nThe strongest practical result is the writing protocol: gradual low-temperature IV sweeps with an internal series resistor reduce Vsw ~2.5x and power ~6x with minimal HRS/LRS change, while a single abrupt write cracks the film. The internal resistor design is thoughtful, and the surge-energy estimates in the supplement are a reasonable upper-bound argument. The SEM and Raman data support the damage interpretation.\n\nThe soft spot is exactly what the authors flag twice: the defect species is inferred, not shown. The evidence—temperature dependence, persistence through thermal cycling, analogy to mild annealing—is all consistent with oxygen vacancies, but trapped charge, metastable twin configurations, or slowly relaxing stoichiometry gradients are not excluded. This matters for the mechanistic conclusions but not for the demonstrated tuning capability, which stands as phenomenology. So the conditional verdict is fair.\n\nMinor quibbles: Fig. 3 has no error bars or device counts; the supplement shows stochasticity in the phase-coexistence regime, so the universality of that memory is not fully pinned down; no data/code deposit. These are addressable, not fatal.\n\nThis paper is for experimentalists working on IMT-based selectors or neuromorphic devices, and for anyone studying electroforming in vanadium oxides. It deserves peer review—send it out. I would cite the writing-protocol result.","headline":"Solid experimental paper that clearly separates two memory mechanisms in VO2/V2O3 volatile switches and demonstrates a practical tuning protocol; the main gap is direct confirmation of the defect species.","tokens_in":23820,"tokens_out":1482,"would_cite":true,"duration_ms":16115,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"Volatile resistive switching in vanadium oxides carries a non-volatile memory that lowers the voltage of subsequent switches.","keywords":["volatile resistive switching","Mott insulator","vanadium dioxide (VO2)","vanadium sesquioxide (V2O3)","metal-insulator transition","electroforming","memory effects","switching voltage tuning"],"falsifier":"A nanoscale chemical and structural map of the filament region before and after a low-temperature write step: if no local oxygen-vacancy enrichment is found and the persistent voltage reduction instead correlates with trapped charge or twin-domain reconfiguration, the defect-based explanation would need major revision.","tokens_in":22710,"feed_emoji":"⚡","tokens_out":3734,"duration_ms":40774,"temperature":0.7,"pith_summary":"The paper tries to establish that nominally volatile resistive switching in VO2 and V2O3 devices is not fully reversible: each switching event leaves a non-volatile trace that changes how easily the device switches next time. It identifies two distinct memory effects—one in V2O3's phase-coexistence region, where the first current sweep rearranges metallic and insulating domains and is erased by thermal cycling, and one at low temperatures in both oxides, where the field and current surge create or move defects that persist through thermal cycling. It further shows that if the surge is limited by an internal series resistor, this defect-based memory can be used as a gradual 'writing' procedure to tune switching voltage and power over a wide temperature range without structural damage. A sympathetic reader would care because it turns a known reliability nuisance—electroforming—into a controlled knob for programming threshold-switch parameters.","feed_headline":"First firing rewrites vanadium-oxide switches","feed_subtitle":"Gradual low-temperature 'writing' cuts switching voltage 2.5× and power 6× without cracking the film.","key_machinery":"The load-bearing mechanism is the self-modifying conducting filament: each volatile switch forms a metallic filament whose creation and annihilation leave a non-volatile trace—either a rearranged metallic-domain configuration in the phase-coexistence regime or a population of electrically generated or migrated defects at low temperature. The enabler for studying and harnessing this is an internal series resistor lithographically built into the device, which limits the current and capacitive-discharge surge after the sub-nanosecond switching event, preventing destructive melting or cracking while preserving a mild surge that can be used for controlled defect writing.","core_discovery":"The central claim is that ostensibly volatile switching in Mott-insulator devices is entangled with non-volatile material modification: the first switching event requires a higher voltage than subsequent events in both V2O3 and VO2, for two different reasons. In V2O3 near the phase-coexistence regime, the first sweep redistributes metallic domains so that a filament can form more easily later; this memory is erased by heating into the fully metallic state. At low temperatures in both oxides, the high field and current surge accompanying the first switch introduce a persistent defect-based state, most plausibly oxygen vacancies, that survives thermal cycling and lowers the switching voltage.","pith_inferences":["If oxygen vacancies are indeed the stored state, then exposing written devices to an oxygen-rich annealing atmosphere should erase the low-temperature memory; this is a direct, testable consequence the paper leaves open.","The same gradual-writing protocol could in principle be ported to other threshold-switching materials—the authors note NbO2 and ovonic chalcogenides—where first-firing-voltage variability is a known problem.","The results imply that first-sweep behavior is not purely a nuisance: in surge-protected devices, the first sweep is effectively the first write operation, so circuit designers could treat it as an initialization step rather than a failure event."],"forward_implications":["The same device can be reprogrammed all-electrically: switching parameters at a chosen operating temperature can be set by low-temperature writing steps.","Gradual writing preserves the film's structural and Raman-verified phase integrity, whereas a single abrupt write step causes cracking and orders-of-magnitude resistance changes—so forming protocols, not just voltages, determine device outcome.","Because the low-temperature memory persists through thermal cycling, it cannot be attributed to metallic-domain redistribution or strain memory; it points to a defect-related state that requires nanoscale chemical and structural identification.","The feedback loop between volatile filament formation and non-volatile defect generation means repeated switching at low temperature gradually lowers the switching voltage, converting a single destructive electroforming event into a sequence of mild forming steps."],"fun_headline_variants":["First switch sets memory in Mott resistors","Memory effect lowers switching voltage in VO2 and V2O3","Non-volatile tweaks tame volatile Mott switching","Writing protocol reprograms oxide switches","One-time zap tunes future switching in vanadates"],"cache_read_input_tokens":2304,"weakest_assumption_plain":"The load-bearing premise is that the persistent low-temperature memory is caused by electrically created or migrated defects—most plausibly oxygen vacancies—along the filament path; the authors state that the microscopic nature and spatial localization of this state are not yet directly confirmed.","fun_headline_variants_meta":{"raw":{"variants":["First switch sets memory in Mott resistors","Memory effect lowers switching voltage in VO2 and V2O3","Non-volatile tweaks tame volatile Mott switching","Writing protocol reprograms oxide switches","One-time zap tunes future switching in vanadates"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.00024,"raw_usage":{"total_tokens":1373,"prompt_tokens":781,"completion_tokens":592,"prompt_tokens_details":{"cached_tokens":256},"prompt_cache_hit_tokens":256,"prompt_cache_miss_tokens":525,"completion_tokens_details":{"reasoning_tokens":521}},"tokens_in":525,"tokens_out":592,"duration_ms":6927,"temperature":1.0,"reasoning_tokens":521,"cache_read_input_tokens":256,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-03T00:23:32.099745+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"A nanoscale chemical and structural map of the filament region before and after a low-temperature write step: if no local oxygen-vacancy enrichment is found and the persistent voltage reduction instead correlates with trapped charge or twin-domain reconfiguration, the defect-based explanation would need major revision.","supporting_citations":[],"review_version":1}