{"id":"bfbf535d-bfcf-43c2-9e82-883fb72dd5b4","arxiv_id":"2608.05287","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":5.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":2,"one_line_summary":"A unified, scalable cut-placement heuristic that jointly optimizes gate cuts, wire cuts, and grouped gate cuts, with benchmark overhead reductions and scaling to 1,000 qubits.","lead":"This paper introduces a scalable graph-partitioning algorithm for choosing where to cut large quantum circuits so they can run on smaller quantum computers. It combines gate cuts, wire cuts, and cutting groups of gates together, and reports lower sampling overhead than existing tools on several benchmark circuits.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The graph objective may not equal true sampling overhead: gate-group costs are described as raw kappa while edge weights are log kappa (Eq. 1), and the 'never worse than pure gate cutting' claim is asserted without a monotonicity argument.","rationale":"In good faith, the paper proposes a reasonable engineering heuristic: a two-stage graph-partitioning approach that plausibly combines gate cuts, wire cuts, and joint cuts, with scalability results on random circuits and favorable comparisons on several benchmarks. The strongest claim, however, is that the optimized graph cost corresponds to the true sampling overhead and that the method never performs worse than pure gate cutting. That claim is load-bearing because every quantitative conclusion is expressed in sampling overhead, not in graph-cut weight. The reader's weakest assumption—that the graph objective equals the true overhead—is exactly the right place to focus: Eq. (1) uses log kappa for edge weights, while the gate-group cost functions in Eqs. (2)-(3) are described as 'actual sampling overhead,' which suggests raw kappa. Mixing raw and log scales would make the optimizer minimize a corrupted objective, so the reported reductions could be artifacts. The 'never worse' guarantee is also not backed by a concrete monotonic-acceptance mechanism; a KL refinement that explores wire cuts could in principle return a partition with higher true overhead than the stage-one gate cut. These issues are fixable, and the paper retains value as a heuristic, but they preclude accepting the central claim as proven. I therefore agree with the conditional verdict and do not propose moving it.","tokens_in":10630,"tokens_out":7425,"duration_ms":63417,"concrete_test":"Instrument a reimplementation of the method to record, for every benchmark partition, both the internal graph cost (log edge weights plus gate-group costs as coded) and the true overhead S = product(kappa_i^2) * S_group. For the small instances (QAOA 8/15, QFT 6, Grover 4, and the Fig. 4 circuit), brute-force enumerate all balanced bipartitions and compare the rank order induced by the graph objective with the rank order induced by the true overhead. If the two rankings disagree, the heuristic optimizes the wrong quantity. Also re-run the benchmarks with c_group = log(kappa) instead of raw kappa to see whether the reported overhead reductions, including the QFT claim, persist.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central quantitative claim—that the two-stage KL search minimizes real sampling overhead and never exceeds pure gate cutting—depends on the graph cost being a faithful additive encoding of the overhead. Section V.B sets edge weights w_g=log kappa_g and w_w=log kappa_w (Eq. 1), which is correct only if every cut's multiplicative factor enters the objective as a logarithm. But Section V.C defines gate-group costs as 'the actual sampling overhead incurred by cutting that group' (Eqs. 2-3) and never states that c_current, c_moved, and c_swapped are log-scaled. If raw kappa values are added to log edge weights, the objective mixes scales: a two-CNOT parallel group with kappa=7 enters as 7 while two individual CNOT edges enter as 2*log(3) ~= 2.2, so KL can prefer a partition that is worse in true overhead. The paper also does not specify how a topology-graph edge representing a multi-gate interaction is weighted, and the 'never worse' guarantee is asserted without describing any acceptance rule that keeps the final partition's cost below the stage-one gate-cut cost. With no code released, the benchmark improvements cannot currently be separated from objective-encoding artifacts.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"This paper proposes a heuristic cut-placement method for quantum circuit cutting that combines gate cuts, wire cuts, and joint cuts of gate groups. The algorithm maps a circuit to an interaction graph for a stage-one Kernighan-Lin gate-cut search, then to a circuit topology graph for a stage-two refinement that also permits wire cuts, with gate-group costs incorporated through partition-dependent terms in the KL gain calculation. The authors benchmark against a Gurobi-based MIP gate-cutting approach, CutQC, and Qiskit's circuit cutting module, and report scalability tests up to 1000 qubits. The central claims are that the two-stage procedure never performs worse than pure gate cutting and that gate-group-aware joint cutting provides substantial overhead reductions, with QFT circuits cited as showing over 90% reduction.","tokens_in":10885,"tokens_out":9998,"duration_ms":87665,"significance":"If validated, the method would be a practically useful contribution to quantum compilation: it scales to hundreds of qubits, builds on established graph-partitioning machinery, and addresses a real gap by treating gate cuts, wire cuts, and joint gate groups in one heuristic. The overall structure is sensible, the use of published per-cut overhead constants is appropriate, and the evaluation spans several baselines. However, the quantitative claims currently rest on an under-specified optimization objective, an unproved monotonicity guarantee, a missing exact combined-cut baseline, and gate-group benchmarks whose groups are manually identified; these issues need to be resolved before the contribution can be fully assessed. No code or artifact is made available, which further limits independent verification of the empirical results.","major_comments":[{"comment":"The optimization objective is not fully specified. Edge weights are set to logarithms of the per-cut overhead factors, but the gate-group cost terms c_current, c_moved, and c_swapped in Eqs. (2) and (3) are described as 'the actual sampling overhead incurred by cutting that group.' If these group costs enter the gain calculations as raw multiplicative overhead values while edge weights are logarithmic, the KL heuristic minimizes a mixture of two different scales. For example, a two-CNOT parallel group with kappa=7 would enter as 7, while the same two gates cut individually contribute 2*log(3) if edge weights are accumulated per gate; this can make KL prefer a partition that is worse in true sampling overhead. Please define the exact scalar objective minimized by the adapted KL algorithm and apply a consistent logarithmic scale to all cost terms.","section":"Sec. V.B and Sec. V.C, Eqs. (1)-(3)"},{"comment":"The weight of an edge that represents several two-qubit gates is ambiguous. The interaction graph construction increments an edge once per two-qubit gate, but Eq. (1) assigns a weight log(kappa_g) without stating whether an edge with m gates has weight m*log(kappa_g) or log(kappa_g). This matters because kappa_g is gate-type dependent and because the circuit topology graph may contain multiple gates on the same qubit pair. Additionally, when edges belonging to a gate group are removed from the interaction graph, the paper does not state how an aggregated edge containing both grouped and ungrouped gates is handled. Please state the weight accumulation rule explicitly and use it consistently in both stages.","section":"Sec. V.A and Sec. V.B, Eq. (1)"},{"comment":"The claim that the two-stage procedure 'never performs worse than pure gate cutting alone' is asserted in Sec. IV and repeated in Sec. V.B, but no acceptance rule or invariant is described. The text does not say that the final KL refinement compares against the stage-one partition and retains the better solution, nor does it prove that replacing gate cuts with wire cuts is monotone in the objective. Without such a rule or proof, the guarantee is unsupported. Please either specify an explicit final comparison that keeps the better partition or provide a monotonicity argument.","section":"Sec. IV and Sec. V.B"},{"comment":"The most relevant exact baseline for the paper's central claim, the combined gate-and-wire cut solver of Brandhofer et al. [11], is cited in Sec. II.D but is absent from the benchmark table. Since MIP gate cutting and CutQC optimize only one cut type, they are not sufficient baselines for demonstrating the benefit of combined gate and wire cutting. The authors should compare against [11] on the small instances where that exact method terminates, or explicitly state why such a comparison is not possible.","section":"Sec. VI.C, Table I"},{"comment":"Gate-group identification is stated in Sec. VI.C to be manual rather than automatic, and the QFT-12 row of Table I lists '[Future Work]' under the gate-group column. The headline claim of an 'over 90% reduction' for dense QFT circuits therefore rests on a single completed 6-qubit instance with manually chosen groups, and the claimed scalability with joint cutting is not yet demonstrated. Please either provide an automatic group-finding method or clearly re-scope the gate-group results as a proof-of-concept with manual group selection.","section":"Sec. VI.C, Table I, and Sec. VI.A"},{"comment":"The manuscript is inconsistent about whether 'sampling overhead' means the product of per-cut kappa factors or the quantity S = kappa_g^(2 n_g) * kappa_w^(2 n_w) * S_group defined in Sec. III. Figures 2 and 4 and Example 2 report products such as 3*4=12, while the definition of S and the title of Table I refer to squared overhead factors. Since the relation S = g^2 holds only when every cost term is an unsquared kappa factor and group costs are handled consistently, the connection between the illustrative examples and the numerical overhead values in Table I needs to be stated explicitly. Please fix one convention and apply it throughout.","section":"Sec. II.A, Sec. III, and Table I"}],"minor_comments":[{"comment":"The sentence beginning 'Although combining gate and wire cutting with joint cutting can significantly reduce sampling overhead compared to individual cuts.' is a sentence fragment; it should be completed or joined to the preceding paragraph.","section":"Sec. III"},{"comment":"The phrase 'for the first time' in the abstract is stronger than needed and could be read as claiming combined gate-and-wire cutting itself is new, although Sec. II.D already cites [11] for that combination. Please qualify the novelty claim to the scalable heuristic treatment of joint gate groups.","section":"Abstract and Sec. II.D"},{"comment":"Several numeric entries such as '11.7×10^3' and '14886.5×10^4' mix mantissas and powers of ten in ways that are difficult to parse; please use a uniform scientific-notation format and add a legend explaining entries such as 'NA' and '[Future Work]'.","section":"Table I"},{"comment":"The paper would benefit from an explicit artifact availability statement; because the method is an empirical heuristic with many implementation details, releasing the Python/NetworkX code would substantially improve reproducibility.","section":"General"}],"recommendation":"major_revision","confidential_remarks":"The missing comparison against [11] is the most serious evaluation gap: the paper's own related-work section identifies [11] as the only exact combined gate-and-wire cut method, yet the benchmark table omits it. The gate-group results are also presented as more complete than they are, since group identification is manual and one headline row is marked 'Future Work.' I do not see evidence of deliberate misrepresentation, but the framing and the table need to be brought into alignment before the empirical claims can be assessed. The paper fits the journal's scope and the core idea is worth pursuing."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Just read the circuit-cutting paper by Fröhler et al. (2608.05287). My take: the core idea is genuinely useful and the engineering looks sound in outline, but the authors need to pin down what exactly the graph objective encodes before I'd trust the quantitative claims.\n\nWhat's new: the combination itself. Gate cutting, wire cutting, and joint gate-group cutting have all been studied separately, but this is the first work I know that puts all three in one scalable heuristic, using partition-dependent gate-group cost functions inside Kernighan-Lin. That particular mechanism isn't in the cited papers. The two-level strategy—spatial partition first, then refine with wire cuts—is sensible, and the diagnostic use (high cut cost means the circuit is unsuitable) is a nice by-product.\n\nWhat it does well: the benchmarks show consistent overhead reductions over gate-only and wire-only baselines, including the >90% reduction on QFT, and runtime scaling to 1000 qubits is real evidence. The authors also state plainly that gate-group identification is manual, which is honest.\n\nThe soft spots, in order of severity.\n\nFirst, the objective-mixing issue. Eq. (1) sets edge weights to log kappa_g and log kappa_w, correctly making overhead additive. But Eqs. (2)-(3) define gate-group costs as 'the actual sampling overhead' with no statement they're log-scaled. If those c values are raw kappa, the KL search minimizes a sum of log terms and raw terms—the two-CNOT parallel group example (7 vs 2*log 3 ~= 2.2) shows how that misorders partitions. The same problem appears earlier: stage one's interaction graph edge weights are raw gate counts, not log kappa times the count, so that stage minimizes number of cut gates, not log overhead. Unless gate types are homogeneous, that's not the same objective.\n\nSecond, the 'never performs worse than pure gate cutting' guarantee is asserted without a proof or even an acceptance rule. It's plausible if stage two keeps the best partition seen, but the guarantee is stated about the graph cost, and with the mixing issue it doesn't transfer to true sampling overhead.\n\nThird, the exact combined-cut baseline [11] is mentioned but never compared. Even if that SMT method only handles ~40 qubits, running it on the small benchmark instances would calibrate the heuristic and be cheap.\n\nNo code is released, so I can't separate the reported numbers from these encoding artifacts. That's fixable, and I'd send it to a serious referee, but the authors should be asked to clarify the log scaling, prove or state the acceptance rule, and add the [11] comparison. It's a solid submission for a QCE or IEEE TQE type venue after revision.\n\nRecommendation: engage with it, but treat the overhead numbers as provisional until the objective is pinned down.","headline":"Plausible and useful graph-partitioning framework for combined gate/wire/joint cutting, but the unverified cost-objective encoding (raw vs log) undermines the 'never worse' guarantee and the headline overhead numbers until fixed.","tokens_in":11412,"tokens_out":3978,"would_cite":false,"duration_ms":637733,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"The paper's central claim is that gate cutting, wire cutting, and joint cutting of gate groups can all be selected together by a two-stage graph-partitioning heuristic, which the authors report never performs worse than gate cutting alone…","keywords":["quantum circuit cutting","gate cutting","wire cutting","joint cutting","gate groups","graph partitioning","sampling overhead","cut placement"],"falsifier":"Take a small circuit with a known exact optimum, such as the paper's own 6-qubit example, and enumerate all valid bi-partitions to compute the true sampling overhead for each; if the heuristic ever returns a partition whose true overhead is higher than another valid partition it had rejected, the cost mapping is unfaithful. A concrete check is whether the paper's objective value for a gate group, computed as the sum of $\\log \\kappa$ edge weights plus the group adjustment, orders alternatives the same way the true overhead $\\kappa^{2n_g}\\kappa^{2n_w} S_{\\text{group}}$ does.","tokens_in":10412,"feed_emoji":"✂️","tokens_out":9975,"duration_ms":75311,"temperature":0.7,"pith_summary":"Circuit cutting breaks a quantum circuit too large for one device into smaller pieces that run independently and are stitched back together classically, but every cut multiplies the sampling overhead, so choosing cut locations well is essential. Existing methods typically optimize either gate cuts or wire cuts on their own, and those that consider both do not exploit joint cutting, where several gates are cut together at reduced cost. This paper argues that all three strategies -- gate cuts, wire cuts, and joint cuts of gate groups -- should be chosen together, and proposes a two-stage graph-partitioning heuristic that does so. The authors report that the method never performs worse than pure gate cutting, finds mixed cuts with lower overhead on benchmark circuits, and scales to 1000 qubits with moderate runtime. If the claim holds, quantum compilers could automatically produce near-optimal cut placements and get a diagnostic signal for whether a circuit is worth cutting at all.","feed_headline":"Circuit cutting merges gate, wire, and joint cuts","feed_subtitle":"Graph partitioning finds near-optimal cut placements for hundreds of qubits, with up to 90% lower sampling overhead","key_machinery":"The load-bearing objects are the interaction graph and the circuit topology graph. The interaction graph has one node per qubit, edges weighted by the number of two-qubit gates, and a balanced Kernighan-Lin partition yields the initial gate-cut placement. The circuit topology graph adds gate vertices and wire edges to represent time, with edge weights $w_g = \\log \\kappa_g$ and $w_w = \\log \\kappa_w$ so that additive graph cost corresponds to multiplicative sampling overhead. Gate groups are modeled not as fixed-cost hyperedges but as partition-dependent cost functions, and the Kernighan-Lin D-values and swap gains are adjusted to include the group's current-versus-moved cost (Eqs. 2 and 3), with group-internal edges removed to avoid double-counting. The two-stage initialization is the mechanism that guarantees the final cut is never worse than the gate-only cut.","core_discovery":"The central claim is that the cut-placement problem for combined gate and wire cutting, extended with joint gate-group cuts, can be recast as a scalable balanced graph-partitioning problem without sacrificing any of the three cut types. The paper's two-stage method first partitions the qubit interaction graph to find a good gate cut, then refines that partition on a circuit topology graph that encodes temporal ordering, which allows wire cuts to replace expensive gate cuts when that lowers the objective. Gate groups enter as partition-dependent cost functions inside the Kernighan-Lin gain calculations, so the heuristic can recognize when cutting several gates together is cheaper than cutting them individually. Because the second stage is initialized with the first-stage partition, the authors argue the final solution is never worse than the gate-only cut; their experiments report substantial overhead reductions, including more than 90% on QFT circuits, with runtimes that scale to 1000 qubits. The paper's conclusion is that this makes circuit cutting practical for near-term devices and gives compilation pipelines a way to say early on whether a circuit is unsuitable for cutting.","pith_inferences":["If the logarithmic scaling of gate-group costs is confirmed or fixed, the same graph model could absorb additional cut mechanisms, such as wire cuts with classical communication, by substituting their effective $\\kappa$ values.","The paper restricts itself to bi-partitioning; a recursive or k-way extension using the same cost functions is a natural next step and would let the method handle more than two subcircuits.","Gate-group identification is currently manual, so an automatic pattern detector for the cascade, parallel, and other groupings would likely enlarge the reported advantages on dense circuits.","The diagnostic signal could be used pre-flight in a compiler to choose between circuit cutting, error mitigation, or distributed quantum execution before any samples are spent."],"forward_implications":["Circuits that benefit from a mix of cut types will get a mixed solution, since the second stage can always replace gate cuts with cheaper wire cuts.","The final sampling overhead is bounded above by the pure gate cut, so adding wire cuts and joint cuts can only help or tie.","Dense circuits with many parallel gates see the largest gains from gate groups, with QFT reported at more than 90% overhead reduction.","Runtime scaling to 1000 qubits makes the method usable as an automated compiler pass rather than a one-off analysis.","Persistently high cut costs can be read as a diagnostic that the circuit is fundamentally hard to cut, enabling early go/no-go decisions."],"supporting_citations":[{"why":"Supplies the quasiprobability decomposition and the $\\kappa_g=3$ overhead for CNOT gate cuts, which sets the cost for a single gate cut.","marker":"[4]"},{"why":"Establishes the wire-cut overhead $\\kappa_w=4$, the cost basis for wire edges in the topology graph.","marker":"[5]"},{"why":"Provides the $\\kappa_g=1+2|\\sin\\theta|$ overhead for cutting two-qubit rotation gates, used in the edge weights.","marker":"[6]"},{"why":"Defines the exact combined gate-and-wire cut placement problem and shows why exact methods are limited to small circuits.","marker":"[11]"},{"why":"Gives the joint-cutting overhead for parallel gates, $2^{n_g+1}-1$, which underlies the gate-group cost functions.","marker":"[12]"},{"why":"Serves as the optimal wire-cutting baseline that the evaluation compares against.","marker":"[25]"},{"why":"Serves as the combined gate-and-wire cutting baseline from a quantum software ecosystem, used for overhead comparison.","marker":"[36]"},{"why":"Supplies the Kernighan-Lin balanced graph-partitioning heuristic that both stages build on.","marker":"[43]"}],"fun_headline_variants":["Graph partitioning slashes circuit cutting overhead","Joint gate and wire cuts: a scalable framework","Cut sampling overhead 90% with joint gate groups","Scalable cutting: combined gate and wire cuts via graph partitioning","Near-optimal circuit cuts found by balanced graph splits"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The algorithm's graph objective must exactly mirror the true sampling-overhead cost, meaning gate-group adjustments need to be on the same logarithmic scale as the edge weights and edges with multiple gates need the right multiplicative weight; if that mapping is wrong, the heuristic is optimizing a cost that does not match the actual sampling burden.","fun_headline_variants_meta":{"raw":{"variants":["Graph partitioning slashes circuit cutting overhead","Joint gate and wire cuts: a scalable framework","Cut sampling overhead 90% with joint gate groups","Scalable cutting: combined gate and wire cuts via graph partitioning","Near-optimal circuit cuts found by balanced graph splits"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.00044,"raw_usage":{"total_tokens":2226,"prompt_tokens":936,"completion_tokens":1290,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":552,"completion_tokens_details":{"reasoning_tokens":1216}},"tokens_in":552,"tokens_out":1290,"duration_ms":8983,"temperature":1.0,"reasoning_tokens":1216,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-08T15:59:27.378038+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Take a small circuit with a known exact optimum, such as the paper's own 6-qubit example, and enumerate all valid bi-partitions to compute the true sampling overhead for each; if the heuristic ever returns a partition whose true overhead is higher than another valid partition it had rejected, the cost mapping is unfaithful. A concrete check is whether the paper's objective value for a gate group, computed as the sum of $\\log \\kappa$ edge weights plus the group adjustment, orders alternatives the same way the true overhead $\\kappa^{2n_g}\\kappa^{2n_w} S_{\\text{group}}$ does.","supporting_citations":[{"cited_title":"How to simulate a quantum computer using negative probabilities,","cited_arxiv_id":null,"evidence_quote":"Supplies the quasiprobability decomposition and the $\\kappa_g=3$ overhead for CNOT gate cuts, which sets the cost for a single gate cut."},{"cited_title":"Simulating Large Quantum Circuits on a Small Quantum Computer,","cited_arxiv_id":null,"evidence_quote":"Establishes the wire-cut overhead $\\kappa_w=4$, the cost basis for wire edges in the topology graph."},{"cited_title":"Constructing a virtual two-qubit gate by sampling single-qubit operations,","cited_arxiv_id":null,"evidence_quote":"Provides the $\\kappa_g=1+2|\\sin\\theta|$ overhead for cutting two-qubit rotation gates, used in the edge weights."},{"cited_title":"Op- timal Partitioning of Quantum Circuits Using Gate Cuts and Wire Cuts,","cited_arxiv_id":null,"evidence_quote":"Defines the exact combined gate-and-wire cut placement problem and shows why exact methods are limited to small circuits."},{"cited_title":"Circuit Knitting With Classical Communication,","cited_arxiv_id":null,"evidence_quote":"Gives the joint-cutting overhead for parallel gates, $2^{n_g+1}-1$, which underlies the gate-group cost functions."},{"cited_title":"Cutqc: Using small quantum computers for large quantum circuit evaluations,","cited_arxiv_id":null,"evidence_quote":"Serves as the optimal wire-cutting baseline that the evaluation compares against."},{"cited_title":"Bra ´nczyk et al.,Qiskit addon: circuit cutting, 2024","cited_arxiv_id":null,"evidence_quote":"Serves as the combined gate-and-wire cutting baseline from a quantum software ecosystem, used for overhead comparison."},{"cited_title":"An efficient heuristic procedure for partitioning graphs,","cited_arxiv_id":null,"evidence_quote":"Supplies the Kernighan-Lin balanced graph-partitioning heuristic that both stages build on."}],"review_version":1}