{"id":"49d86452-c829-40df-8493-6d9b0213d871","arxiv_id":"2608.07306","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"Electroplated indium bump bonds can form superconducting interconnects with qubit quality factors around 10^6, and the dominant loss is traced to the gold metal-air interface.","lead":"The paper shows that superconducting qubits built from two separate silicon chips joined by electroplated indium bumps stay coherent for tens of microseconds. It also finds that a thin gold layer used to contact the bumps, not the bumps themselves, is the main source of the remaining loss.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The claim that the Au metal-air interface is the primary qubit loss channel is underdetermined: the qubit stores 98.6% of its field in the substrates (assumed lossless in Appendix D), and the no-Au Step 1 resonator Q alone can account for the observed qubit Q~1e6.","rationale":"The paper's central experimental result, Qi ~ 10^6 for electroplated indium bump-bonded transmons, is well supported by the T1 measurements and the reproducibility across two chips. The process-step resonator study is also careful, and the Au-removal experiment convincingly isolates the Au layer as the dominant loss in the CPW geometry. My concern targets the second part of the headline claim: that the Au metal-air interface is the primary contributor to the qubit decay rate. The qubit and the no-Au resonators have comparable quality factors (~10^6), whereas the Au-containing CPW resonators are markedly worse (~3x10^5). This pattern is consistent with the qubit being limited by the same non-Au losses that set the Step 1 resonator floor, with the Au layer contributing only modestly at the qubit's lower Au participation. The finite-element model in Appendix D is the only evidence connecting the Au participation to the qubit decay, and it assumes the silicon substrate (98.6% participation) is lossless. A substrate loss tangent of order 10^-6, which is not excluded by the reported Step 1 resonator data, would account for essentially all of the qubit decay, making the Au loss negligible. At intermediate Step 1 Q values (~1.5-2e6), substrate/SA losses contribute 40-50%, so 'primary' is not established. This is scientifically resolvable: the Step 1 data already exist in Fig. 3(f), so publishing the median values and a loss-budget calculation would settle it. I therefore maintain the CONDITIONAL verdict, since the missing quantitative loss budget and the placeholder data/code links both need addressing before ACCEPT.","tokens_in":14283,"tokens_out":28809,"duration_ms":231411,"concrete_test":"Extract the median Step 1 (no Au) resonator Qi from Fig. 3(f) and compute the non-Au loss tangent upper bound as tan_delta_nonAu = 1/(Qi_Step1 x 0.92), using the 92% substrate participation in Table II. Then predict the non-Au-limited qubit quality factor as Q_nonAu,qubit = 1/(0.986 x tan_delta_nonAu). If Q_nonAu,qubit is comparable to or below the measured flip-transmon Qi (~1e6), the Au MA interface cannot be established as the primary qubit loss channel; the manuscript should either soften the claim to 'a contributing loss channel' or re-run the Appendix D model with a lossy substrate and substrate-air interfaces and show that the inferred Au loss tangent still accounts for the majority of the qubit decay. If Q_nonAu,qubit exceeds about 2e6, the Au-primary claim is supported.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The Au-removal experiment strongly proves the Au layer dominates loss in the CPW resonators, but it does not directly demonstrate that the qubit is Au-limited. In the flip-transmon, 98.6% of the electric energy resides in the silicon substrates (Table II), and Appendix D assumes all materials except the 5 nm metal-air layers are lossless. With p_sub = 0.986, a substrate loss tangent of order 1e-6 - an upper bound consistent with the Step 1 no-Au resonator Q being above 1e6 and its 92% substrate participation - yields a substrate-limited qubit Q of about 1e6, equal to the measured values. Even for Step 1 Q near 1.5-2e6, substrate and substrate-air losses contribute roughly 40-50% of the qubit decay rate, so the Au layer is at best co-limiting. The inferred Au MA loss tangent is also internally uncertain: the text quotes 5e-2 to 1e-1, but the data and Table II participation values imply roughly 5e-1. The resonator result does not transfer quantitatively to the qubit because the qubit has about four times lower Au participation and higher substrate participation, so the attribution of the qubit decay to the Au MA interface is not uniquely determined by the presented evidence.","agreement_with_reader":"partial"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper reports a flip-chip transmon architecture in which electroplated indium bumps provide the galvanic connection between two silicon substrates, with the qubit electric field split nearly equally between the chips and low participation at the indium-bump interface. Four transmons on two identically processed chips show internal quality factors around 0.5–1.4×10^6, establishing that electroplated indium interconnects are compatible with reasonably high-coherence superconducting circuits. To identify the dominant loss, the authors fabricate coplanar-waveguide resonators at successive process steps (bare NbTiN, NbTiN+Au, full flip-chip processing) and measure their internal quality factors; an Au-removal control shows a large improvement in resonator Q. Finite-element participation-ratio simulations are then used to argue that the exposed gold metal-air interface is the dominant loss channel, both for resonators and for the qubits.","tokens_in":14594,"tokens_out":6737,"duration_ms":60776,"significance":"The fabrication result is significant and well supported: qubit quality factors near 10^6 are reproducible across two chips, and the resonator process study with a Au-removal control is a clean, quantitative demonstration that the ex-situ gold layer dominates loss in the coplanar waveguide resonators. If the qubit-level attribution were also established, the paper would provide clear guidance for flip-chip and hybrid integration, and the data/code availability statements are commendable. However, the central qubit-level loss claim is not uniquely determined by the presented evidence, because the qubit stores 98.6% of its field energy in the substrates, which are assumed lossless in the simulations. This gap, together with an internal inconsistency in the quoted loss tangent, prevents me from endorsing the primary-loss attribution in its current form.","major_comments":[{"comment":"The claim that the Au metal-air interface is the primary qubit loss channel is underdetermined. The simulations in Appendix D assume all materials except the 5 nm metal-air layers are lossless, yet Table II shows that 98.6% of the transmon electric energy resides in the silicon substrates, with the remainder split equally between top and bottom chips. The Au-removed Step 2 resonators reach Qi values above 1e6 with roughly 92% substrate participation; this bounds the substrate loss tangent at approximately 1e-6. Applying that same substrate loss tangent to the transmon's 98.6% substrate participation gives a substrate-limited qubit Qi of about 1e6, equal to the measured values. Thus the measured qubit lifetimes are fully consistent with substrate-dominated loss, and the Au-removal experiment, while conclusive for the resonators, does not by itself demonstrate that the qubit is Au-limited. Please add a quantitative upper bound on substrate and substrate-air losses from the no-Au resonators, or soften the qubit-level attribution accordingly.","section":"Appendix D, Table II"},{"comment":"The quoted effective Au MA loss tangent range is inconsistent with the transmon data. From Table II, the flip-transmon has p_Au,MA = 1.5×10^-6; with the measured Qi ≈ 1×10^6, a purely Au-MA-limited qubit would require tanδ_MA ≈ 0.67, not the quoted 5×10^-2 to 10^-1. With tanδ = 0.05 or 0.1, the predicted qubit Qi is 1.3×10^7 or 6.7×10^6, respectively, far above the measured values. Moreover, the three device classes in Fig. 4 do not collapse onto a single effective tanδ when their Table II participations are combined with the measured Qi values. This quantitative inconsistency must be resolved before the participation analysis can support the conclusion that the Au metal-air interface dominates the qubit decay rate.","section":"Section IV, Fig. 4"}],"minor_comments":[{"comment":"The header 'Au MA (×10−4%)' makes the physical participation fraction difficult to read; please report the dimensionless fraction directly (e.g., 1.5×10^-6) alongside the percentage form.","section":"Table II"},{"comment":"The legend prints 'tan MA = 1×10^2', '1×10^1', and '5×10^1', which appear to be missing negative exponents; as printed these values contradict the text's quoted loss-tangent range and should be corrected.","section":"Fig. 4"},{"comment":"The term '6-1-1 vector magnet' is undefined; please specify the magnet configuration or replace it with a standard description.","section":"Appendix C"},{"comment":"References [40] and [41] contain no repository identifiers; include DOIs or archive links so the data and code are actually locatable.","section":"Data availability"}],"recommendation":"major_revision","confidential_remarks":"The manuscript is publishable in principle: the electroplated-indium compatibility result is convincing and reproducible, and the resonator process study is a strong control experiment. The main risk is the overstatement of the qubit-level loss attribution. I would ask the authors either to provide a quantitative substrate-loss bound that excludes the substrate as the qubit limiter, or to revise the abstract, conclusions, and Fig. 4 discussion to describe the Au-MA interface as the dominant loss in the resonators and as a plausible co-limiting or dominant channel in the transmons. The internal tanδ inconsistency must also be addressed."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Here's the take. The paper convincingly shows electroplated indium bumps can be integrated into a flip-chip transmon and deliver qubit quality factors around 1e6 across two chips. That is a real result: prior flip-chip work used evaporated bumps, and this is the first demonstration with electroplated indium in an actual qubit. The device architecture — electric field split between the two substrates, negligible participation at the bump — is also nicely conceived for hybrid semiconductor-superconductor integration.\n\nWhat it does well: the resonator process study is careful, and the Au-removal control is a strong, clean experiment. Adding the 5 nm ex-situ Au drops resonator Qi; removing it restores and even improves over bare NbTiN. The participation simulation and the inverse correlation across resonators and transmons are consistent with the Au metal-air interface being the main loss channel. The magnetic-field dependence of the bump-shorted resonators is a nice extra check that the bumps themselves stay superconducting.\n\nWhere I'd be more careful: the claim that Au-metal-air loss limits the qubit is underdetermined. The qubit stores 98.6% of its energy in the silicon substrates, and the simulation model assumes those are lossless. A substrate loss tangent around 1e-6 — consistent with the Step 1 resonator data — gives a substrate-limited qubit Qi around 1e6. So the Au interface is likely co-limiting, maybe dominant, but the current evidence doesn't uniquely pin it down. The text says \"likely,\" which is honest, and the Au-removal experiment is an independent control, so I don't see circularity. Still, the quantitative attribution should be softened or the model extended to include substrate and substrate-air losses.\n\nAlso, the data and code availability statements are placeholders without links. For a fabrication-focused paper that claims reproducibility, that's a real gap. The Appendix D loss-tangent range (5e-2 to 1e-1) is also a bit loose against the implied value from Table II, but that's minor.\n\nWho gets value: experimentalists working on flip-chip integration, 3D packaging, and hybrid quantum devices. It deserves a serious referee. With accessible data and a more careful loss attribution, I'd be happy to see it published.","headline":"Solid engineering demonstration that electroplated indium flip-chip bumps give transmons with Qi ~1e6; the Au-metal-air loss attribution is plausible but not fully proven for the qubit itself.","tokens_in":15162,"tokens_out":1704,"would_cite":true,"duration_ms":14577,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"A flip-chip transmon using electroplated indium bumps reaches qubit quality factors around $10^6$, with the gold contact layer—not the indium—identified as the dominant loss source.","keywords":["flip-chip integration","electroplated indium bumps","superconducting transmon qubit","surface loss","quality factor","3D integration","hybrid semiconductor-superconductor devices","NbTiN"],"falsifier":"Fabricate a flip-transmon in which the gold film is removed from the capacitor surfaces (or deposited in-situ with the NbTiN) while keeping the electroplated indium bump, and measure its internal quality factor; the paper's model predicts a clear rise above roughly $10^6$, whereas a flat $Q_i$ would show that another interface governs the decay.","tokens_in":14101,"feed_emoji":"⚛️","tokens_out":10079,"duration_ms":80768,"temperature":0.7,"pith_summary":"Superconducting quantum processors are running out of room on a single chip, and connecting chips without adding loss is a key packaging problem. This paper shows that electroplated indium bumps, a fast and scalable bonding method, can form the superconducting connection of a transmon qubit while keeping internal quality factors around $10^6$. The transmon is split across two bonded substrates so that roughly half of the electric-field energy lives in each chip and almost none touches the indium bump. A step-by-step resonator study then points to the thin ex-situ gold film used to contact the indium as the main source of the remaining loss, not the bump bond or the electroplating process. That distinction matters because it isolates a specific, replaceable layer as the next target for improving coherence.","feed_headline":"Electroplated indium bumps give qubits quality factors of 10^6.","feed_subtitle":"The superconducting bump bond is not the weak link; the thin gold contact layer is, pointing to a scalable hybrid-chip path.","key_machinery":"The load-bearing object is the flip-transmon geometry: a transmon whose charge island is formed jointly by a pad on the bottom chip and a matching island on the top chip, galvanically connected through a square electroplated indium bump. Because the bump sits at a point of near-zero electric field, its surface energy participation is almost nil, and the field divides about equally between the two substrates. The second load-bearing element is the surface-participation model: finite-element simulations in which all bulk materials are lossless and the only lossy interfaces are the metal-air surfaces, each represented as a uniform 5 nm dielectric layer with $\\varepsilon_r=10$. Comparing the simulated gold-metal-air participation ratio $P_{\\mathrm{Au,MA}}$ to measured $Q_i$ values across resonators, flip-resonators, and transmons is what lets the paper separate loss at the bump bond from loss at the gold surface.","core_discovery":"The paper's central claim is that a three-dimensional transmon with an electroplated indium bump placed directly on the charge island can deliver $Q_i \\sim 10^6$ while keeping the bump interface nearly loss-free. In this flip-transmon, the shunt capacitor is distributed between the two bonded chips: the simulated field participation is about 49\\% in each silicon substrate and close to zero at the indium bump surface. Four qubits on two chips show internal quality factors mostly between $0.5\\times10^6$ and $1.5\\times10^6$. The qubits outperform coplanar-waveguide resonators fabricated through the same process, and resonators taken through the full electroplating-and-bonding sequence behave like gold-coated resonators rather than worse, indicating the electroplating itself is not the bottleneck. Adding the 5 nm gold layer lowers resonator quality factors, and selectively etching that gold layer away raises them above $10^6$; combining those measurements with finite-element surface-participation simulations places all three device classes on a common loss curve with an effective gold metal-air loss tangent between roughly $5\\times10^{-2}$ and $10^{-1}$. The conclusion is that the gold-covered metal-air interface, not the indium bump, limits the measured coherence.","pith_inferences":["We would extend the paper's logic by predicting that a flip-transmon built with an in-situ encapsulated or entirely removed gold layer should push $Q_i$ substantially above $10^6$; that is a direct test the paper has not performed.","The near-equal field sharing between substrates could serve as a design rule for hybrid qubits: place the lossy semiconductor or quantum-dot material on one substrate where its participation is engineered away from the Josephson junction, rather than trying to make the semiconductor lossless.","One open question the data leave is whether the gold loss tangent inferred here is intrinsic to gold or caused by the ex-situ transfer and surface contamination; surface analysis of the Au-NbTiN interface could separate those possibilities.","The process-split resonator methodology used here transfers directly to other bump metals and bonding schemes, offering a general way to attribute qubit loss to interconnect steps versus surface preparations."],"forward_implications":["Electroplated indium bump bonding is demonstrated as compatible with $Q_i\\sim10^6$ transmons, making it a viable interconnect for multi-chip superconducting processors.","Because the qubit field barely touches the bump, the architecture can tolerate loss at the bump interface while field participation in each substrate is engineered, which suits hybrid semiconductor-superconductor integration.","The dominant loss is the ex-situ gold metal-air interface, so replacing that gold layer (for example by in-situ deposition) is the immediate route to higher coherence in this platform.","The electroplating process itself does not add measurable loss in the tested resonators, so bump height and array size can be scaled for larger chip separations without an added coherence penalty."],"supporting_citations":[{"why":"Establishes indium bump bonds as qubit-compatible superconducting interconnects, the baseline this work builds on.","marker":"[13]"},{"why":"Shows high-coherence microwave cavities with indium bump bonding, providing prior evidence that indium itself can be low-loss.","marker":"[22]"},{"why":"Represents prior evaporative indium bump integration for superconducting qubits, which this work contrasts with electroplated bumps.","marker":"[6]"},{"why":"Prior evaporated-bump hybrid flip-chip work that this paper compares against and whose magnetic-field response is reproduced.","marker":"[15]"},{"why":"Supplies the surface-loss simulation approach used to compute metal-air participation ratios for resonators.","marker":"[34]"},{"why":"Provides the surface participation and dielectric loss framework used to relate simulated field participation to measured quality factors.","marker":"[35]"},{"why":"Demonstrates silicon hard-stop spacers for 3D integration, the method used to set the interchip gap.","marker":"[27]"},{"why":"Recent work on noble-metal encapsulation that frames the difference between in-situ and ex-situ gold deposition highlighted by the loss analysis.","marker":"[30]"}],"fun_headline_variants":["Superconducting qubits: indium bump bonds pass, gold fails","Indium bump bonds are lossless, but gold limits qubit quality","Flip-chip qubits: indium bonds are fine, gold is the loss","Qubit quality 1e6 via indium bumps; gold contact is the limit","Indium bumps keep qubits at 1e6, gold layer limits coherence"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The loss attribution assumes the only significant lossy interfaces are the exposed metal-air surfaces, modeled as a uniform 5 nm dielectric film; if the metal-substrate or substrate-air interfaces lose energy at a comparable rate, the gold layer may not be the true dominant loss channel.","fun_headline_variants_meta":{"raw":{"variants":["Superconducting qubits: indium bump bonds pass, gold fails","Indium bump bonds are lossless, but gold limits qubit quality","Flip-chip qubits: indium bonds are fine, gold is the loss","Qubit quality 1e6 via indium bumps; gold contact is the limit","Indium bumps keep qubits at 1e6, gold layer limits coherence"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.002151,"raw_usage":{"total_tokens":8374,"prompt_tokens":1010,"completion_tokens":7364,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":626,"completion_tokens_details":{"reasoning_tokens":7261}},"tokens_in":626,"tokens_out":7364,"duration_ms":46214,"temperature":1.0,"reasoning_tokens":7261,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-10T10:38:25.597048+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Fabricate a flip-transmon in which the gold film is removed from the capacitor surfaces (or deposited in-situ with the NbTiN) while keeping the electroplated indium bump, and measure its internal quality factor; the paper's model predicts a clear rise above roughly $10^6$, whereas a flat $Q_i$ would show that another interface governs the decay.","supporting_citations":[{"cited_title":"Foxen, J","cited_arxiv_id":null,"evidence_quote":"Establishes indium bump bonds as qubit-compatible superconducting interconnects, the baseline this work builds on."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Shows high-coherence microwave cavities with indium bump bonding, providing prior evidence that indium itself can be low-loss."},{"cited_title":"Rosenberg, D","cited_arxiv_id":null,"evidence_quote":"Represents prior evaporative indium bump integration for superconducting qubits, which this work contrasts with electroplated bumps."},{"cited_title":"Granel, F","cited_arxiv_id":null,"evidence_quote":"Prior evaporated-bump hybrid flip-chip work that this paper compares against and whose magnetic-field response is reproduced."},{"cited_title":"Wenner, R","cited_arxiv_id":null,"evidence_quote":"Supplies the surface-loss simulation approach used to compute metal-air participation ratios for resonators."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Demonstrates silicon hard-stop spacers for 3D integration, the method used to set the interchip gap."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Recent work on noble-metal encapsulation that frames the difference between in-situ and ex-situ gold deposition highlighted by the loss analysis."}],"review_version":1}