{"id":"3d523f11-0313-444c-99d6-8ffdfa099620","arxiv_id":"2608.08536","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":4,"one_line_summary":"A GNN trained across synthetic transformer-task pairs predicts held-out circuit edges with median AUROC 0.902, close to but below dedicated per-case methods ACDC and EAP-IG.","lead":"This paper tests whether a graph neural network trained on many circuit-localization examples can predict circuit edges on new transformer-task pairs, reaching a median edge AUROC of 0.902 on held-out semi-synthetic cases. The result suggests that circuit localization can be amortized as a supervised graph-learning problem instead of being recomputed for every model-task pair.","discovery_kind":"new_application","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The split's relatedness checks compare programs and circuit graphs but not task behavior, so residual task similarity between the 50-case pool and the 16 held-out InterpBench cases could inflate the claimed transfer result.","rationale":"The paper's central claim is that a GNN trained on synthetic model-task pairs transfers to unseen pairs and that message passing over the computation graph contributes to performance. The load-bearing risk is whether the held-out pairs are truly unseen in the sense that matters. The three relatedness checks in Section D.2 are structural: they catch identical program templates and isomorphic circuit graphs, but they do not catch the same task implemented by different programs. Since the test set is the original 16 InterpBench evaluation pairs while the training pool contains 26 more InterpBench pairs, a shared task family between the two sets would let the predictor solve held-out cases by task identification rather than by learning circuit structure. The paper acknowledges the incompleteness of these checks, so this is a self-admitted gap. I do not recommend rejection: the authors are transparent, the benchmark hygiene is otherwise careful, and the synthetic-only scope is stated clearly. But the transfer claim is exactly what the incomplete split puts at risk, so the CONDITIONAL verdict should remain, with strengthening the split or auditing pair identities as the condition. The post-selection issue is real but less load-bearing here because the paper discloses the CV-selected estimate (0.876) and the line-graph control comparison is not solely an artifact of selection. No derivation error was found in Proposition E.1, and the paper does not overclaim real-world applicability.","tokens_in":27094,"tokens_out":10883,"duration_ms":126594,"concrete_test":"Release the full pair identities and group assignments for all 114 pairs, and re-run the split with an additional task-level equivalence check: group pairs by task family or behavioral input-output equivalence (e.g., all reverse-like, sort-like, and histogram-like tasks) in addition to the three existing checks. Retrain the best GCL configuration and its no-message-passing control on the resulting split, excluding all groups that contain a test pair, and recompute the median held-out edge AUROC. If the median drops to or below the control's 0.825, the original transfer result was inflated by residual task similarity. If it remains near 0.90, the leakage concern is resolved.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central claim depends on the 16 held-out InterpBench cases being genuinely unseen. Section D.2 defines relatedness through three checks: identical RASP program templates, exact ground-truth circuits, and directed circuit isomorphism. These checks compare programs and circuit graphs, but they do not compare the underlying task or input-output behavior. InterpBench and TracrBench contain many tasks that can be implemented by different RASP programs; such pairs can have non-isomorphic circuits while sharing task-level structure that is readily detectable from activation and gradient features. Because the training pool retains 26 original InterpBench pairs alongside 24 TracrBench-derived pairs, the GNN could memorize task-to-circuit mappings instead of learning a general circuit localizer. The paper itself states the checks 'do not give a complete theoretical account of when two model–task pairs should be treated as related' (Section D.2). If residual task or program similarity crosses the split, both the headline median 0.902 and the no-message-passing control 0.825 are inflated, and the evidence for transfer to unseen pairs is weakened. This concern is distinct from the acknowledged limitation that all models are synthetic; it directly targets the validity of the within-benchmark transfer claim.","agreement_with_reader":"partial"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes Graph Circuit Learning (GCL), a supervised, amortized framework that trains a graph neural network across multiple model-task pairs to predict circuit masks on unseen pairs, and also adapts PGExplainer to the per-model-task circuit localization setting. To support cross-case training, the authors augment InterpBench with 30 TracrBench-derived, SIIT-trained transformer-task pairs, reserve the 16 original InterpBench evaluation pairs as a held-out test set, and use grouped 5-fold cross-validation on the remaining 50 pairs. The best GCL configuration achieves a median edge AUROC of 0.902 on the held-out cases, close to the published EAP-IG median of 0.910 and below ACDC's 0.959; removing all message-passing edges reduces the median to 0.825, and the PGExplainer adaptation reaches 0.858. The paper also derives a local second-order interaction formula for two edge interventions at a shared component input (Proposition E.1) as motivation for graph-structured modeling of pathway dependencies.","tokens_in":27252,"tokens_out":7786,"duration_ms":83994,"significance":"If the transfer result survives closer scrutiny, this is a valuable step for mechanistic interpretability: it casts circuit localization as an amortized graph learning problem, contributes a new benchmark of 30 SIIT-trained TracrBench cases with a grouped split, provides an open implementation, and gives a clean interaction identity that justifies modeling edge interactions. The authors are commendably explicit about several limitations: the best configuration is flagged as a post-selection estimate (Section F.2), the benchmark is restricted to synthetic models without normalization layers, and the relatedness checks are acknowledged to be incomplete (Section D.2). The central scientific contribution is the framing and the controlled evidence that message passing over computation graphs can help predict circuits, rather than a claim of state-of-the-art performance on real transformers.","major_comments":[{"comment":"The split's relatedness checks compare RASP program templates, exact ground-truth circuits, and directed circuit isomorphism, but none of the three checks compares task identity or input-output behavior. Since Table 1 shows that 26 original InterpBench pairs remain in the cross-validation pool while all 16 held-out cases come from InterpBench, a pair implementing the same task through a different RASP program or a non-isomorphic circuit can cross the split, allowing the GNN to memorize task-to-circuit mappings rather than learn a general localizer. The manuscript's own admission that these checks 'do not give a complete theoretical account' (Section D.2) makes this a known gap. To make the transfer claim load-bearing, I ask for a task-level relatedness check (e.g., normalized task templates, prompt-pair similarity, or behavioral equivalence on a shared probe set) and/or a sensitivity analysis that removes from the training pool any pair sharing a task family with a test case. Without this, both the observed 0.902 and the no-message-passing control 0.825 are upper bounds whose inflation is unquantified.","section":"D.2"},{"comment":"The abstract's headline median of 0.902 is the best of 14 configurations after evaluating all of them on the 16 held-out cases, as Section F.2 states: the result 'should be read as a post-selection estimate.' Cross-validation ranks this configuration second, and the configuration that would have been selected by cross-validation (DirGNN on the incidence graph) has a held-out median of 0.876. Presenting the post-selected number as the main result overstates the method's expected performance on unseen pairs. I ask the authors to report the cross-validation-selected configuration as the primary estimate, to present 0.902 as an exploratory upper bound, and to use a nested selection procedure or a separate validation split if they want to claim competitive parity with EAP-IG and ACDC.","section":"F.2"},{"comment":"The claim that message passing over the observed computation graph contributes to performance rests on the comparison between the DirGraphConv line-graph configuration (median 0.902) and its no-message-passing control (median 0.825). The paper reports seed-level standard deviations of the medians but no paired comparison across the 16 cases; with only 16 cases and a 0.077 median gap, it is not clear how many cases actually improve and by how much. I ask for per-case paired differences (e.g., median of within-case differences, and a sign test or Wilcoxon signed-rank test). For the incidence-graph rows, the paper should also state explicitly what the control retains, because three of the six feature roles are stored on component nodes and become inaccessible to the edge readout when message-passing edges are removed.","section":"F.2, Table 4"}],"minor_comments":[{"comment":"Consider qualifying the headline number in the abstract as a post-selection estimate so that readers do not mistake 0.902 for an unbiased evaluation of a pre-registered configuration.","section":"Abstract"},{"comment":"The paper reports that 48 candidate pairs were constructed and 30 passed both behavior and compilation checks; please state how the 18 failures are distributed between compilation failures and reconstruction-check failures, since this affects the representativeness of the added benchmark cases.","section":"D.1"},{"comment":"Proposition E.1 is derived for infinitesimally small message changes, whereas the benchmark uses binary clean-versus-corrupted patching with potentially large deltas; the main text should explicitly say that the proposition is a motivation for graph structure rather than a guarantee for the actual benchmark interventions.","section":"E.4"},{"comment":"The 18 hyperparameter settings per configuration are not enumerated; for reproducibility, include the full grid (learning rate, hidden dimension, number of layers, dropout, etc.) in an appendix.","section":"F.1, Table 4"},{"comment":"The sentence 'so 84 of its 86 pairs enter the pool' is confusing because only 50 pairs remain after exclusion; rephrase to '84 are candidates; after removing groups containing test pairs, 50 remain.'","section":"D.2"},{"comment":"The caption states that baseline box plots are dashed because seed-level variability is unavailable; add a legend or note explaining that the published baseline values are point estimates from InterpBench and may not be directly comparable in their uncertainty.","section":"Figure 2"}],"recommendation":"major_revision","confidential_remarks":"The paper is honest about its limitations, and the core framing is worth publishing if the leakage-control gap is addressed and the post-selected 0.902 is demoted to an exploratory result. I do not see a fundamental error in the methodology, but the two validity threats (incomplete relatedness checks and post-hoc selection on the test set) are load-bearing for the main transfer claim. A revision that adds task-level leakage controls and reframes the headline numbers would be suitable."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Dear [name],\n\nQuick take: careful and honestly-scoped pilot for amortized circuit localization. The core result—median edge AUROC 0.902 on 16 held-out InterpBench cases—is plausible but should be read as a promising estimate, not a demonstrated transfer result. The authors flag the post-selection nature of the headline number, include a no-message-passing control, extend the benchmark with 30 Tracr-derived pairs, and keep claims inside synthetic models with known ground truth. The interaction derivation (Prop E.1) is a real conceptual contribution: it shows pathway relevance can be non-decomposable, which motivates a graph learner over per-edge scorers. The math checks out under the stated smoothness assumptions, and the paper explicitly scopes its applicability. Citation pattern looks fair—they cover the per-case baselines, weight-space learning, and GNN explainers.\n\nSoft spots, in proportion. The most important is leakage control. The related-pair checks in D.2 compare program templates and circuit graphs, but not task behavior. Since the training pool keeps 26 original InterpBench pairs, the GNN could be learning task-to-circuit mappings. The authors admit the checks are incomplete, but that admission sits in an appendix while the abstract sells transfer. That mismatch is worth fixing. Second, the headline is a post-selection estimate across 14 configurations; cross-validation ranks it second, and the CV-best configuration scores 0.876 on held-out cases. The 0.902 is still informative, but report it with the caveat attached. Third, all evidence is on small Tracr/SIIT transformers with no LayerNorm. The paper says this openly, so it's a limitation rather than an overclaim, but it caps significance.\n\nMinor: the incidence-graph no-message-passing control is not a clean ablation, because removing edges also removes the readout's access to three of the six feature roles. The paper notes this in the caption, so it's fine, but don't cite that row as evidence about message passing.\n\nWho this is for: people working on mechanistic interpretability benchmarks or on transferring interpretability tools across models. It deserves a serious referee. I'd send it to review, asking for a task-behavior similarity check on the split, primary reporting of the CV-selected configuration, and release of the new pairs and trained models.\n\nBest,","headline":"Careful and honestly-scoped pilot for amortized circuit localization; the headline AUROC is plausible but the leakage-control checks don't cover task behavior, so treat 0.902 as a promising estimate rather than a proven transfer result.","tokens_in":27890,"tokens_out":2442,"would_cite":true,"duration_ms":24466,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"This paper claims circuit localization can be framed as a supervised amortized graph learning problem; the best configuration reaches median edge AUROC 0.902 on 16 held-out InterpBench cases.","keywords":["circuit localization","mechanistic interpretability","graph neural networks","amortized learning","transformer interpretability","edge AUROC","residual stream","Tracr"],"falsifier":"Train the same GCL configuration on the 50-pair pool and evaluate it on real transformers using a faithfulness metric: does the predicted circuit reproduce the target behavior when kept edges are clean and masked edges are corrupted? If faithfulness is no better than the no-message-passing control, or if replacing the three related-pair checks with a stricter program-template match drops the held-out median edge AUROC from 0.902 toward 0.825, the paper's central transfer claim is refuted.","tokens_in":26811,"feed_emoji":"🔍","tokens_out":7833,"duration_ms":77104,"temperature":0.7,"pith_summary":"This paper asks whether circuit localization—finding the sparse subgraph of a transformer's computation graph that reproduces a behavior—can be learned once across many model–task pairs and then applied to new pairs. It claims yes: a supervised graph neural network trained on 50 semi-synthetic transformer cases transfers to 16 held-out cases, reaching a median edge AUROC of 0.902 (interquartile interval [0.861, 0.942]). Removing all message-passing edges drops the median to 0.825, which the paper reads as evidence that message passing over the computation graph contributes beyond node features. A second, per-case adaptation of a GNN explainer reaches 0.858, also above the no-message-passing control. If true, this would make circuit localization an amortized prediction task rather than a per-model optimization, and the paper explicitly restricts its claims to synthetic pairs with circuits known by construction.","feed_headline":"Circuit search becomes a learned, reusable prediction task","feed_subtitle":"Best configuration hits median edge AUROC 0.902 on held-out InterpBench cases; message passing adds the edge.","key_machinery":"The load-bearing object is the component-level computation graph of a transformer, a directed acyclic graph whose nodes are attention heads and MLP blocks and whose edges are residual-stream-mediated pathways. GCL transforms it into a directed line graph (one node per candidate edge) or an incidence graph (component nodes plus edge nodes) so that circuit membership becomes node classification on the transformed graph. Each edge node carries six context-specific features—clean and corrupted source states, target gradient, clean and corrupted edge messages, and the gradient mapped back through the edge—aligned across heterogeneous dimensions by a 1D feature-attention layer borrowed from tabular foundation models, processed by either DirGNN or DAGformer, pooled over token positions and prompt pairs, and read out to edge scores. The motivating identity is the shared-target interaction formula, which shows that two edges entering the same read input interact through the Hessian of the task metric, giving the graph learner a principled reason to share information between computationally related pathways.","core_discovery":"The paper's central claim is that circuit localization can be framed as supervised amortized graph learning: build a component-level directed graph of a transformer whose edges are residual-stream pathways, train a GNN on labeled model–task pairs to predict circuit membership of each edge, and apply the same predictor to unseen pairs. On the 16 original held-out InterpBench cases, the best of 14 configurations (a directed line graph processed by a DirGNN GraphConv backend) scores a median edge AUROC of 0.902, close to the published EAP-IG median of 0.910 and below ACDC's 0.959; with all message-passing edges removed the median falls to 0.825, and an adapted PGExplainer reaches 0.858. The paper reports the top score as a post-selection estimate, since the configuration was chosen after evaluating all 14 on the held-out cases. It also proves a local interaction identity: for two edges feeding the same component input, the leading interaction equals $\\Delta m_{e_1,p}^\\top Q_{t,p} \\Delta m_{e_2,p}$, a Hessian-weighted bilinear form of the two message changes, so edge relevance cannot in general be decomposed into independent scores.","pith_inferences":["If GCL transfers to real transformers, circuit localization could become a reusable infrastructure task, but this depends on whether the regularity of Tracr-derived synthetic circuits survives contact with LayerNorm and learned representations.","The interaction identity suggests scalar edge scores are incomplete descriptors, yet GCL's readout still emits one score per edge; a testable extension is to make the predictor explicitly pair-aware, for example by predicting interaction terms or using the Hessian form as an auxiliary loss.","The paper's leakage-control split is explicitly acknowledged as incomplete; a stronger test would match latent program templates or circuit motifs rather than the three syntactic checks, and would likely lower the reported transfer numbers.","One could test the amortization hypothesis directly on real models by using faithfulness instead of AUROC: if predicted circuits reproduce behavior under causal masking as well as per-case baselines do, the synthetic-to-real gap is smaller than feared."],"forward_implications":["Circuit localization can be amortized: after one training phase, a learned predictor localizes circuits for new model–task pairs without per-case optimization, reducing the sequential per-case cost.","Message passing over the observed computation graph carries signal: stripping all message-passing edges lowers median held-out AUROC from 0.902 to 0.825 while keeping nodes and features.","GNN explainability methods transfer to mechanistic interpretability: the PGExplainer adaptation reaches 0.858 median edge AUROC without using ground-truth circuits at fit time.","The framework produces edge-level scores that can be evaluated with the same head-promotion rule as existing baselines, making cross-case methods directly comparable to per-case circuit discovery."],"supporting_citations":[{"why":"Provides the InterpBench semi-synthetic transformers, the SIIT-trained circuits with known ground truth, the 16 held-out evaluation cases, and the published baseline AUROC values used for comparison.","marker":"[12]"},{"why":"Supplies Tracr, the compiler that turns RASP programs into transformer weights with known internal structure, which underlies the augmented dataset.","marker":"[23]"},{"why":"Supplies TracrBench programs from which the 30 additional model–task pairs are derived.","marker":"[24]"},{"why":"Defines RASP, the sequence-processing language whose program templates ground the related-pair leakage check.","marker":"[22]"},{"why":"Provides the PGExplainer method that the paper adapts to per-case circuit localization.","marker":"[11]"},{"why":"Supplies the DirGNN directed message-passing backend used by the best-performing GCL configuration.","marker":"[17]"},{"why":"Defines the directed line graph transformation that converts edge-membership prediction into node classification.","marker":"[13]"},{"why":"Supplies the feature-alignment approach used to map heterogeneous edge features to a fixed width across models.","marker":"[16]"}],"fun_headline_variants":["GNN trained on many model–task pairs finds circuits on new ones","Amortized graph learning predicts circuit edges on unseen transformers","One GNN localizes circuits across many model–task pairs","GNN-based circuit localization: near EAP-IG accuracy on new tasks"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The claim assumes that circuits learned on small semi-synthetic transformers—whose ground-truth circuits are known by construction and which have no normalization layers—transfer to real transformers, and that the three related-pair checks used in the data split catch enough leakage that the held-out scores are not inflated by training/test similarity.","fun_headline_variants_meta":{"raw":{"variants":["GNN trained on many model–task pairs finds circuits on new ones","Amortized graph learning predicts circuit edges on unseen transformers","One GNN localizes circuits across many model–task pairs","GNN-based circuit localization: near EAP-IG accuracy on new tasks"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000701,"raw_usage":{"total_tokens":3225,"prompt_tokens":1067,"completion_tokens":2158,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":683,"completion_tokens_details":{"reasoning_tokens":2083}},"tokens_in":683,"tokens_out":2158,"duration_ms":17717,"temperature":1.0,"reasoning_tokens":2083,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-14T04:30:54.194156+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Train the same GCL configuration on the 50-pair pool and evaluate it on real transformers using a faithfulness metric: does the predicted circuit reproduce the target behavior when kept edges are clean and masked edges are corrupted? If faithfulness is no better than the no-message-passing control, or if replacing the three related-pair checks with a stricter program-template match drops the held-out median edge AUROC from 0.902 toward 0.825, the paper's central transfer claim is refuted.","supporting_citations":[{"cited_title":"Tracr: Compiled Transformers as a Laboratory for Interpretability","cited_arxiv_id":null,"evidence_quote":"Supplies Tracr, the compiler that turns RASP programs into transformer weights with known internal structure, which underlies the augmented dataset."},{"cited_title":"TracrBench: Generating Interpretability Testbeds with Large Language Models","cited_arxiv_id":null,"evidence_quote":"Supplies TracrBench programs from which the 30 additional model–task pairs are derived."},{"cited_title":"Thinking Like Transformers","cited_arxiv_id":null,"evidence_quote":"Defines RASP, the sequence-processing language whose program templates ground the related-pair leakage check."},{"cited_title":"Parameterized Explainer for Graph Neural Network","cited_arxiv_id":null,"evidence_quote":"Provides the PGExplainer method that the paper adapts to per-case circuit localization."},{"cited_title":"Bronstein","cited_arxiv_id":null,"evidence_quote":"Supplies the DirGNN directed message-passing backend used by the best-performing GCL configuration."}],"review_version":1}