{"id":"eb362f89-e8c2-4364-9131-54c26be37ba5","arxiv_id":"2608.12692","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":4.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":18,"one_line_summary":"A 65 nm nMOSFET is measured from 292 K to 4.5 K and fitted by TCAD with TEM-derived structure, yielding a single cryogenic parameter set with only saturation velocity made temperature dependent.","lead":"This paper calibrates a commercial TCAD model to match electrical measurements of a 65 nm nMOSFET from room temperature down to 4.5 K, using TEM images to build the simulated device. It reports a single fitted parameter set and argues that, apart from a temperature-dependent saturation velocity, existing models suffice for cryogenic simulation.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Band-tail vs interface-trap degeneracy leaves the portability and 'no new temperature-dependent model' claim unproven.","rationale":"The reader's weakest assumption is exactly the load-bearing concern I identify: the physical origin of SS saturation is assumed to be band-tail states even though the paper names the competing interface-trap explanation. My read agrees, and the manuscript's own Section IV language plus the absence of cryogenic CV data makes this degeneracy concrete rather than speculative. The paper's practical contribution, a transparent TCAD calibration flow with apparently good fits, remains intact; the concern is about the broader interpretive and portability claims, which is why the existing CONDITIONAL verdict is appropriate. I do not see an internal inconsistency that would justify rejection, and I have no reason to doubt the motivation or the quality of the measurements. The proposed re-fit with an interface-trap model is a focused way to decide whether the band-tail attribution is unique or merely an effective parameterization.","tokens_in":13727,"tokens_out":4530,"duration_ms":55183,"concrete_test":"Re-fit the 77 K and 4.5 K IDVG data with the Gaussian band-tail term of Eq. (3) disabled and an acceptor-type interface-trap distribution at the Si/SiO2 interface enabled instead, as in Refs. [17][18], keeping all other Table IV parameters fixed. Compare the rms log-current error in subthreshold and on-state regimes with the band-tail fit. If the interface-trap model matches the measured data to within 10% of the band-tail fit's error and yields a trap density consistent with known 65 nm gate-stack values, then the SS-saturation mechanism is not uniquely identified and the portability claim should be restricted to statements about this device.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central conclusion that no new temperature-dependent model is needed beyond saturation velocity depends on attributing the cryogenic sub-threshold swing saturation to the Gaussian band-tail of Eq. (3) with a single fitted width sigma = 0.004 eV (Section VI). The paper itself flags the competing mechanism in Section IV: the same SS saturation 'might also be modeled by including band-edge traps at the insulator/silicon interface [17][18].' These two mechanisms are observationally degenerate in a single-device IV fit; both add a temperature-activated density of states near the band edge. Only sigma is adjusted, Nt in Eq. (3) is not reported as fitted, and the CV measurements were taken only at 300 K, so no cryogenic capacitance or conductance data constrain the charge-trapping contribution. If interface traps are the actual cause, the fitted sigma is an effective lumped parameter absorbing interface-quality physics of this particular 65 nm device, and the fitted band-tail width will not transfer to other technologies or even to devices with different processing. The fit itself is plausible and the calibration workflow is useful, but the physical-attribution step is not independently supported, so the abstract's 'applicable to other technologies' statement and the conclusion that no new temperature-dependent model is needed are conditional.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"This paper reports a TCAD calibration study for 65 nm nMOSFETs at cryogenic temperatures. The authors fabricated a large-area nMOSFET for CV and a minimum-size nMOSFET for IV, measured CV at 300 K and IDVG/IDVD at 292 K, 77 K, and 4.5 K, and used TEM to define the device geometry. They then calibrated a Sentaurus TCAD stack, including the Lucent mobility model, density-gradient quantum correction, band-tail states, and a temperature-dependent saturation velocity, to simultaneously fit CV, sub-threshold, and on-state IV curves. The main claims are that a single parameter set fits all measured temperatures and that, apart from saturation velocity, no new temperature-dependent models are required.","tokens_in":14103,"tokens_out":5467,"duration_ms":48915,"significance":"If the fitting results are taken at face value, the paper provides a useful cryogenic TCAD calibration workflow and a concrete parameter set for 65 nm nMOSFETs, with detailed fitting strategies and convergence tricks that are likely transferable to other technology nodes. The use of TEM to constrain device geometry and the comparison of fitted parameters to literature values are strengths. However, the physical attribution of the cryogenic sub-threshold swing to band-tail states is not uniquely identified, and the portability claims extend beyond the single-device evidence. The paper is a solid engineering contribution, but its central conclusions are more conditional than the abstract suggests.","major_comments":[{"comment":"The central claim that the simulation curves 'match closely' is supported only by visual comparison; no quantitative error metric (e.g., RMS or relative error in ID, SS error per temperature, or capacitance error) is reported. Because several parameters (C, v_sat, k, σ) are adjusted to fit these same curves, the absence of residuals makes it impossible to assess whether the deviations are within experimental uncertainty, and it weakens the conclusion in Section VIII that a single parameter set fits the data 'well.' Please add numeric error metrics and, if feasible, a validation subset (e.g., one temperature or one bias condition held out of the fit).","section":"VI, Figs. 6–8; Section VIII"},{"comment":"The attribution of the cryogenic SS saturation to a Gaussian band-tail with σ = 0.004 eV is not uniquely determined. Section IV itself notes that interface traps at the insulator/silicon interface could also model the same SS saturation, and the CV measurements are taken only at 300 K, so no cryogenic capacitance or conductance data constrain the trap contribution. Since only σ is reported as adjusted and N_t in Eq. (3) is not listed as a fitted parameter, the band-tail width effectively absorbs any interface-trap physics; the conclusion that no new temperature-dependent model is needed is therefore conditional on this attribution. A concrete test would be to compare cryogenic CV or multi-frequency conductance measurements against the band-tail model, or to validate the σ value on a device with a known different interface-trap density.","section":"IV, Eq. (3); VI, step 2; VII-A"},{"comment":"The abstract and conclusions claim that the calibrated parameters are 'expected to be applicable to other technologies' because TCAD models are not technology-specific, but this extrapolates far beyond the evidence: only one large-area device for CV and one minimum-length device for IV were measured, and no second device or technology was used for validation. Many fitted quantities (e.g., Lombardi parameters A, C, k, the stress magnitude, and the doping profiles in Tables II and IV) are process- and geometry-dependent by the paper's own discussion. The transferable claim should be restricted to the calibration workflow and the qualitative finding about the temperature dependence of saturation velocity, unless additional validation data are provided.","section":"Abstract; Section VIII; Table IV"}],"minor_comments":[{"comment":"The abstract states that CV, IDVG, and IDVD curves are fitted 'well' without specifying that CV is at 300 K only; specify the temperatures in the abstract or at first mention.","section":"Abstract"},{"comment":"The TEM gate length is reported as 39 nm, while the device is described as W/L = 120 nm/60 nm; clarify whether 39 nm is the physical gate length or the effective electrical length after processing.","section":"III"},{"comment":"The saturation velocity expression uses Tc in Eq. (13), but Table IV and the text use 'TC'; unify the notation.","section":"VI, Eq. (13) and Table IV"},{"comment":"The definition of SS as 'the voltage difference between current at 5×10-9 A and 5×10-8 A' is ambiguous about the gate-voltage range over one decade; state explicitly that this is the mV/decade extracted from the IDVG curve in that current window.","section":"VII-A"},{"comment":"In the sentence following Eq. (5), 'The total election density' contains a typo ('election' should be 'electron').","section":"IV, Eq. (3)"},{"comment":"The asterisk footnote in Table IV is not defined in the caption; indicate which values are simulator defaults and which are from the literature.","section":"Table IV"},{"comment":"Fig. 5 shows doping profiles at various cut locations, but the cut locations are not marked in Fig. 3; adding a reference to the cut lines would improve readability.","section":"V, Fig. 5"}],"recommendation":"major_revision","confidential_remarks":"The paper is a competent fitting study with a useful parameter set, but the band-tail vs. interface-trap degeneracy is the main scientific risk. If the authors cannot provide cryogenic CV or second-device validation, the portability claims should be softened. The engineering contribution is sufficient for major revision."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Colleague,\n\nThis is a solid engineering calibration paper: 65 nm NMOS measured from 292 K to 4.5 K, TEM-informed TCAD structure, and a single parameter set fitting CV, IDVG, and IDVD across temperatures. The fitting strategy is transparent and the convergence tips are genuinely useful for anyone doing cryogenic Sentaurus work. The Lucent model choice is well explained, and the weak temperature dependence of acoustic phonon scattering (small fitted k) echoes prior work, so the result is plausible.\n\nWhat's actually new: the 65 nm data, the TEM-derived geometry, the specific calibrated parameter set (including sigma = 0.004 eV band-tail width and the tanh saturation velocity). That combination isn't in the cited literature. As a data product and recipe, it has value.\n\nThe soft spots are real but not fatal. First, there are no quantitative error metrics — the judgment is visual. Second, no second device or independent validation, so the 'single parameter set' claim is demonstrated only on this one transistor. Third, and most important, the band-tail vs. interface-trap degeneracy: the paper explicitly acknowledges in Section IV that the same SS saturation could be modeled by interface traps, and only sigma is fitted. With CV only at 300 K, the cryogenic charge-trapping contribution is unconstrained, so the fitted sigma may be lumping interface physics into a band-tail width. That means the abstract's 'applicable to other technologies' claim is not supported by the evidence. The fit itself is still perfectly good as a calibration exercise; it just doesn't establish transferability.\n\nI'd also note the paper doesn't ship input decks or data. For a calibration paper, that's a missed opportunity — reviewers should ask for at least the parameter tables in machine-readable form.\n\nOverall: worth engaging, especially for TCAD practitioners in cryo-CMOS. It deserves a serious referee; with minor revisions (quantitative errors, a discussion of the degeneracy, tempering the portability claim, and ideally code/data release) it could be a useful reference. I would not desk-reject it.\n\nRecommended: send to peer review with these comments.","headline":"Useful cryogenic TCAD calibration workflow for 65 nm NMOS, with a plausible fit but a portability claim that outruns the evidence.","tokens_in":14552,"tokens_out":2505,"would_cite":true,"duration_ms":22678,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"A single set of TCAD parameters, plus a temperature-dependent saturation velocity, reproduces measured currents in a 65 nm nMOSFET from 292 K down to 4.5 K.","keywords":["band-tail states","cryogenic CMOS","TCAD calibration","65 nm nMOSFET","subthreshold swing saturation","mobility model calibration","saturation velocity","quantum correction"],"falsifier":"Fabricate or select two 65 nm nMOSFETs with the same channel doping and dimensions but different gate-oxide or interface quality, then measure subthreshold swing at 4.5 K and fit each with the same band-tail width $\\sigma=0.004$ eV. If the same width fits both, band-tail states are sufficient; if subthreshold swing tracks the interface-trap density, the band-tail assignment is absorbing trap physics.","tokens_in":13529,"feed_emoji":"❄️","tokens_out":9718,"duration_ms":91034,"temperature":0.7,"pith_summary":"This paper reports a technology computer-aided design (TCAD) calibration for a foundry 65 nm nMOSFET measured at 292 K, 77 K, and 4.5 K, using transmission electron microscopy to fix the real device structure. It claims that one consistent parameter set fits the measured capacitance-voltage, drain current-gate voltage, and drain current-drain voltage curves in both the subthreshold and on-state regimes at all three temperatures. The central result is that existing TCAD models, with adjusted parameters, are sufficient down to 4.5 K; the only explicitly temperature-dependent addition is the saturation velocity. The work matters because cryogenic CMOS is a candidate platform for quantum-computer control electronics and other low-temperature systems, and a transferable calibration workflow means device behavior can be predicted without building new physics into the simulator.","feed_headline":"One TCAD parameter set fits a 65 nm transistor down to 4.5 K","feed_subtitle":"CV and current curves match from 292 K to 4.5 K in subthreshold and on-state with one parameter set.","key_machinery":"The machinery has three load-bearing parts. First, the Lucent mobility model, a composite of an extended PhuMob bulk mobility model, the Lombardi surface mobility model, and the Hänsch high-field saturation model, governs the current; the parameters $A$, $C$, and $k$ are tuned against the measured curves. Second, a Gaussian band-tail density of states, Eq. (3), is added to the conduction-band electron density, and its single fitted width $\\sigma=0.004$ eV produces the temperature-independent subthreshold swing at 4.5 K. Third, a density-gradient quantum correction and a tanh saturation-velocity law carry the quantum-confinement and high-field effects, with the velocity law being the only explicitly temperature-dependent addition.","core_discovery":"On the paper's own terms, the discovery is that the cryogenic behavior of a 65 nm nMOSFET can be captured by adjusting parameters in existing TCAD models rather than by adding new model forms. With a composite mobility picture combining the Lucent model (extended PhuMob, Lombardi surface mobility, and Hänsch high-field saturation), a Gaussian band-tail density of states, and a density-gradient quantum correction, the simulator fits the measured curves at 292 K, 77 K, and 4.5 K using a single parameter set. The only new temperature-dependent element is the saturation velocity, written as $v_{sat}=v_0\\tanh(T_c/T)$ with $v_0=1.74\\times10^7$ m/s and $T_c=332$ K. The fitted band-tail width $\\sigma=0.004$ eV is what produces the saturation of subthreshold swing at low temperature. The paper presents this as evidence that the standard TCAD model library is adequate for cryogenic simulation, provided the calibration follows the documented strategy.","pith_inferences":["Editorial inference: the fitted acoustic-phonon exponent $k=0.01$ is far below the usual value near 1.7, suggesting the low-temperature current in this device is not limited by acoustic phonon scattering; a direct mobility-versus-temperature measurement below 77 K could test that.","Editorial inference: if the band-tail mechanism is transferable, the same $\\sigma=0.004$ eV can serve as a starting guess for other 65 nm-class devices, with significant deviations flagging interface-trap-dominated parts.","Editorial inference: the tanh saturation-velocity law has a crossover temperature $T_c=332$ K, so measuring saturation velocity at intermediate temperatures would show whether the law is a physical model or merely an effective fit."],"forward_implications":["The calibrated setup should transfer to other technologies, because the TCAD models themselves are not technology-specific; only structural and doping parameters need re-fitting.","No new temperature-dependent mobility physics is required down to 4.5 K: the existing temperature dependencies, with adjusted constants, suffice.","The calibration recipe, start at 292 K, ramp the simulator down to the target temperature, and solve the on-state before the off-state, can be reused for other transistor types.","Subthreshold swing saturation at low temperature can be represented by a single band-tail width parameter, giving a practical stand-in for whatever microscopic physics produces it."],"supporting_citations":[{"why":"Supplies the simulator's band-tail density of states, Fermi statistics, density-gradient quantum correction, and the convergence scheme used throughout.","marker":"[21]"},{"why":"Defines the Lucent mobility model whose PhuMob, Lombardi, and Hänsch components are the calibration targets.","marker":"[27]"},{"why":"Supplies the PhuMob bulk mobility model that provides the lattice and bulk scattering terms.","marker":"[28]"},{"why":"Supplies the Lombardi surface mobility equations for acoustic phonon and surface roughness scattering.","marker":"[29]"},{"why":"Supplies the Hänsch high-field mobility model used for the saturation region.","marker":"[30]"},{"why":"Prior cryogenic TCAD nMOSFET fitting that this work extends to a 65 nm technology with quantum correction.","marker":"[18]"},{"why":"The competing interface-trap explanation for subthreshold swing saturation that the band-tail choice must contend with.","marker":"[17]"},{"why":"Establishes the revised theoretical limit of subthreshold swing and attributes low-temperature saturation to band-tail states.","marker":"[14]"},{"why":"Earlier cryogenic characterization of the same 65 nm foundry process that provides the measurement context.","marker":"[20]"}],"fun_headline_variants":["One TCAD parameter set fits 65nm FET from 292K to 4.5K","Cryo TCAD calibration: one set fits 65nm nMOSFET from 292K to 4.5K","Existing TCAD models reproduce cryo FET curves with single calibration","Band-tail width sets subthreshold swing saturation in cryo TCAD","Only saturation velocity varies with temperature in cryo TCAD model"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The load-bearing premise is that the flattened sub-threshold swing at cryogenic temperature comes from a spread of extra energy states near the band edge, not from defects at the oxide-silicon interface; if the defects are the real cause, the fitted width merely absorbs that physics and the conclusion may not transfer to other devices.","fun_headline_variants_meta":{"raw":{"variants":["One TCAD parameter set fits 65nm FET from 292K to 4.5K","Cryo TCAD calibration: one set fits 65nm nMOSFET from 292K to 4.5K","Existing TCAD models reproduce cryo FET curves with single calibration","Band-tail width sets subthreshold swing saturation in cryo TCAD","Only saturation velocity varies with temperature in cryo TCAD model"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.001427,"raw_usage":{"total_tokens":5784,"prompt_tokens":998,"completion_tokens":4786,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":614,"completion_tokens_details":{"reasoning_tokens":4677}},"tokens_in":614,"tokens_out":4786,"duration_ms":33670,"temperature":1.0,"reasoning_tokens":4677,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-16T04:29:06.494590+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Fabricate or select two 65 nm nMOSFETs with the same channel doping and dimensions but different gate-oxide or interface quality, then measure subthreshold swing at 4.5 K and fit each with the same band-tail width $\\sigma=0.004$ eV. If the same width fits both, band-tail states are sufficient; if subthreshold swing tracks the interface-trap density, the band-tail assignment is absorbing trap physics.","supporting_citations":[{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Supplies the simulator's band-tail density of states, Fermi statistics, density-gradient quantum correction, and the convergence scheme used throughout."},{"cited_title":"An Improved Electron and Hole Mobility Model for General Purpose Device Simulation,","cited_arxiv_id":null,"evidence_quote":"Defines the Lucent mobility model whose PhuMob, Lombardi, and Hänsch components are the calibration targets."},{"cited_title":"A Unified Mobility Model for Device Simulation — I. Model Equations and Concentration Dependence,","cited_arxiv_id":null,"evidence_quote":"Supplies the PhuMob bulk mobility model that provides the lattice and bulk scattering terms."},{"cited_title":"A Physically Based Mobility Model for Numerical Simulation of Nonplanar Devices,","cited_arxiv_id":null,"evidence_quote":"Supplies the Lombardi surface mobility equations for acoustic phonon and surface roughness scattering."},{"cited_title":"The hot-electron problem in small semiconductor devices,","cited_arxiv_id":null,"evidence_quote":"Supplies the Hänsch high-field mobility model used for the saturation region."},{"cited_title":"TCAD Modeling of Cryogenic nMOSFET ON- State Current and Sub-threshold Slope,","cited_arxiv_id":null,"evidence_quote":"Prior cryogenic TCAD nMOSFET fitting that this work extends to a 65 nm technology with quantum correction."},{"cited_title":"Characterization and modeling of 28- nm bulk cmos technology down to 4.2 k,","cited_arxiv_id":null,"evidence_quote":"The competing interface-trap explanation for subthreshold swing saturation that the band-tail choice must contend with."},{"cited_title":"Cryogenic Behaviors of 65nm Transistor: On- State IV and Parameters,","cited_arxiv_id":null,"evidence_quote":"Earlier cryogenic characterization of the same 65 nm foundry process that provides the measurement context."}],"review_version":1}