{"work":{"id":"632b7411-e0c0-4cdb-a7a7-91e70a64bc7d","openalex_id":null,"doi":null,"arxiv_id":"2506.14074","raw_key":null,"title":"Comprehensive verilog design problems: A next-generation benchmark dataset for evaluating large language models and agents on rtl design and verification,","authors":null,"authors_text":"Nathaniel Pinckney, Chenhui Deng, Chia-Tung Ho, Yun-Da Tsai, Mingjie Liu, Wenfei Zhou, Brucek Khailany, and Haoxing Ren","year":2025,"venue":null,"abstract":null,"external_url":"https://arxiv.org/abs/2506.14074","cited_by_count":null,"metadata_source":"arxiv_reference","metadata_fetched_at":"2026-07-04T15:09:55.523834+00:00","pith_arxiv_id":null,"created_at":"2026-05-10T08:02:25.036297+00:00","updated_at":"2026-07-04T15:09:55.523834+00:00","title_quality_ok":true,"display_title":"Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification","render_title":"Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification"},"hub":{"state":{"work_id":"632b7411-e0c0-4cdb-a7a7-91e70a64bc7d","tier":"hub","tier_reason":"10+ Pith inbound or 1,000+ external citations","pith_inbound_count":16,"external_cited_by_count":null,"distinct_field_count":6,"first_pith_cited_at":"2026-04-16T07:19:34+00:00","last_pith_cited_at":"2026-06-26T17:21:06+00:00","author_build_status":"not_needed","summary_status":"needed","contexts_status":"needed","graph_status":"needed","ask_index_status":"not_needed","reader_status":"not_needed","recognition_status":"not_needed","updated_at":"2026-07-05T05:17:48.374640+00:00","tier_text":"hub"},"tier":"hub","role_counts":[],"polarity_counts":[],"runs":{},"summary":{},"graph":{},"authors":[]}}