Pinnacle Architecture using QLDPC codes reduces physical qubits needed to factor RSA-2048 to under 100,000 at 10^{-3} error rate.
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Generalizes iterative phase estimation to randomized Hamiltonians per step plus importance sampling, yielding fewer terms and sometimes fewer qubits for gapped chemical Hamiltonians.
A scalable Trotterization and Localized Diagonal Operator Approximation enable real-time quantum simulation of the multi-flavor Gross-Neveu model on utility-scale superconducting hardware.
Tensor-network compression of nearest-neighbor circuits plus four-type measurements yields 0.4-4.7% error on 8-qubit Hubbard energy gaps and enables QPE-type runs on IBM devices up to 52 qubits with over 4000 two-qubit gates.
citing papers explorer
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The Pinnacle Architecture: Reducing the cost of breaking RSA-2048 to 100 000 physical qubits using quantum LDPC codes
Pinnacle Architecture using QLDPC codes reduces physical qubits needed to factor RSA-2048 to under 100,000 at 10^{-3} error rate.
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Phase estimation with randomized Hamiltonians
Generalizes iterative phase estimation to randomized Hamiltonians per step plus importance sampling, yielding fewer terms and sometimes fewer qubits for gapped chemical Hamiltonians.
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Quantum Simulation of the Real-time Dynamics in the multi-flavor Gross-Neveu Model at the utility scale using Superconducting Quantum Computers
A scalable Trotterization and Localized Diagonal Operator Approximation enable real-time quantum simulation of the multi-flavor Gross-Neveu model on utility-scale superconducting hardware.
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Tensor-based phase difference estimation on time series analysis
Tensor-network compression of nearest-neighbor circuits plus four-type measurements yields 0.4-4.7% error on 8-qubit Hubbard energy gaps and enables QPE-type runs on IBM devices up to 52 qubits with over 4000 two-qubit gates.