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TIGER: Topology-aware Assignment using Ising machines Application to Classical Algorithm Tasks and Quantum Circuit Gates

T0 review · 3 major / 4 minor · reviewed 2026-08-27 · deepseek-v4-flash

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Pith's one-line read TIGER claims that topology-aware assignment in both classical and quantum computing can be solved as a QUBO problem on an Ising machine, and that a quantum annealer beats the classical qbsolv solver by up to 15% while cutting…

desk verdict Useful tool-flow paper with a real partitioning idea; the quantum-gate cost model and on-test-set tuning make the headline numbers optimistic, but the work deserves a serious referee. read the letter →

arxiv 2009.10151 v1 pith:CTJF34SB submitted 2020-09-21 cs.ET quant-ph

Anastasiia Butko , Ilyas Turimbetov , George Michelogiannakis , David Donofrio , Didem Unat , John Shalf This is my paper · ORCID
classification cs.ETquant-ph
keywords topology-awareassignmentIsingmachinequantumannealingQUBOtaskschedulingcircuitmappingSWAPminimizationgraphpartitioning
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper argues that the topology-aware assignment problem—mapping the tasks of a parallel program onto processing units, or the gates of a quantum circuit onto physical qubits—can be cast as a QUBO optimization and solved on an Ising machine, specifically a quantum annealer. The authors implement this mapping in a tool called TIGER, together with a dependency-level partitioner that breaks large problems into smaller sub-QUBOs and a weight-optimization algorithm that tunes the balance between computation and communication, or fidelity and SWAP count. On three classical task-communication workloads, TIGER with the quantum annealer reports up to 15% lower total cost than the classical qbsolv/TABU solver, and on 5-qubit benchmark circuits it reports an average 68% reduction in data movement compared to the IBM QX optimizer. If these results hold, they give a practical hybrid classical-quantum route to two NP-hard assignment problems that otherwise rely on heuristics with unknown solution quality.

What carries the argument

The carrying mechanism is the QUBO encoding of the assignment problem, with the quadratic form $E = \sum_i h_i q_i + \sum_{i<j} J_{ij} q_i q_j$; TIGER translates a task-communication graph or quantum circuit graph together with an architecture graph into the coefficients $h_i$ and $J_{ij}$, then reads the binary solution back as a placement. Around that core sit two supporting mechanisms: a dependency-level partitioner that splits the graph into sub-QUBOs and injects virtual qubits encoding previous placements, and the weight-optimization algorithm that scans a preference coefficient to trade off, for quantum circuits, mapping fidelity against the number of SWAPs through $fidelity_{total} = fidelity_{mapping} \cdot fidelity_{swap}^{N_{swaps}}$.

What would settle it

For a small circuit such as 4mod5-v0_18 on the QX2 topology, compute TIGER's placement and then compile that exact placement with an independent routing-aware compiler; if the compiler inserts more SWAPs than graph distance predicts, the distance-only movement model, and with it the 68% claim, is falsified.

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Extended reading notes

Core claim

TIGER's central claim is that both flavors of topology-aware assignment can be solved by the same QUBO construction: binary variables represent placing a task or gate on a resource, computation or fidelity costs become qubit weights, communication or SWAP costs become coupler strengths, and assignment constraints become penalty couplings. To fit the limited size and connectivity of current annealers, the task-communication graph is split along dependency levels, with virtual qubits carrying the placement of already-solved predecessor levels into the next sub-QUBO; a separate weight-optimization loop searches a preference coefficient that scales the relative weight of movement versus mapping fidelity. The paper reports that on its classical workloads, the quantum annealer outperforms the classical TABU-search solver by up to 8% on computation cost, up to 25% on communication cost, and up to 15% on total cost. For 48 small IBM benchmark circuits, the SWAP count is reduced by 68% on average relative to the IBM QX optimizer, with zero-SWAP solutions found in 16.7% of circuits on the QX2 topology.

Load-bearing premise

The load-bearing premise is that each two-qubit gate needs exactly as many SWAP operations as the graph distance between the physical qubits its logical endpoints land on, with no extra moves for routing; if other qubits using the same paths force additional SWAPs, the reported savings are too optimistic.

Editorial extensions

If this is right

  • Topology-aware assignment in both classical parallel computing and quantum circuit compilation can be expressed in one QUBO format and solved by the same hardware, without a new solver per application domain.
  • Dependency-level partitioning plus a classical decomposer lets problems that exceed annealer capacity still be solved, with the quantum annealer delivering better cost than pure classical tabu search on the tested workloads.
  • The weight-optimization algorithm provides an automatic way to move a solution along the computation-communication or fidelity-SWAP trade-off curve, which matters when hardware topologies change.
  • On the denser IBM QX2 topology, the advantage over the classical IBM QX optimizer is larger than on the sparser Vigo topology, suggesting the hybrid approach pays off most when the assignment search space is complex.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • TIGER's distance-only SWAP estimate ignores routing contention, so the reported 68% saving is best read as an upper bound until a routing-aware back-end confirms it.
  • The paper itself notes that output edges of each partitioned sub-graph are excluded from the QUBO; on communication-dominated graphs this omitted cost could offset the speed gains from partitioning.
  • Because QUBO minimizes a sum of placement costs, the authors' own formulation does not guarantee minimized parallel execution time when makespan is the metric; users should treat reported cost improvements as data-movement improvements unless delay is explicitly modeled.
  • The same QUBO-generation and weight-scanning machinery is likely portable to other Ising-style hardware, since the paper presents its results in terms of virtual QUBOs rather than hardware-specific instructions.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 4 minor

Summary. The paper introduces TIGER, a tool that formulates topology-aware task and quantum-gate assignment problems as QUBO instances and solves them with Ising machines (a D-Wave annealer) as well as with the classical qbsolv/TABU solver. The main contributions are a QUBO mapping for task-communication graphs and quantum circuit graphs, a dependency-level partitioning scheme that generates sub-QUBOs with virtual qubits for already-fixed neighbor placements, and a weight optimization algorithm (WOA) that searches a preference coefficient to trade off mapping fidelity and SWAP count. The paper evaluates the tool on three COSMIC workloads for classical task assignment and on 48 reduced 5-qubit IBM benchmark circuits for quantum gate assignment. It reports up to 15% total cost improvement over a classical TABU-based solver for task assignment and a 68% average data-movement reduction compared to the IBM QX optimizer for quantum circuit assignment.

Significance. If the central claims hold, the paper makes a useful engineering contribution: it provides a concrete, open-source tool flow that converts two NP-hard assignment problems into QUBO form, integrates with the D-Wave stack, and demonstrates scalable partitioning that reduces the time-to-solution of the decomposer-solver phase. The QUBO construction is described with enough detail to be reproduced, and the TIGER implementation is publicly available, which are strengths. The paper also proposes a practical weight-tuning loop (WOA) that is relevant beyond the specific QUBO formulation. However, the headline quantum results rest on a simplified SWAP-cost model and on an in-sample evaluation of the weight tuner; these issues need to be resolved before the quantitative claims can be accepted.

major comments (3)
  1. [Section 4.2, Eq. (2); Section 6.4.2] The quantum objective assumes that the number of SWAPs needed to realize a two-qubit gate equals the graph distance between the physical qubits assigned to its two endpoint tasks. This neglects routing contention: intermediate physical qubits may be occupied by other logical qubits, and extra SWAPs are needed to free or reroute them. The reported final SWAP counts in Figure 10 are therefore estimates under the same model, not necessarily actual SWAP counts after a full routing pass. If TIGER's counts and the IBM QX optimizer's counts are not produced by the same routing procedure, the comparison in Section 6.4.2 is not apples-to-apples. The authors should validate the assignments with a complete routing pass (for example, a standard compiler with explicit SWAP insertion) and report the resulting SWAP counts, or clearly restrict the claims to the distance-based model.
  2. [Section 6.4.1 and Figure 9] The WOA evaluation is in-sample: for each benchmark circuit, the preference coefficient pref is optimized to maximize fidelity_total on the same circuit for which the improvement is then reported. This guarantees that the reported final fidelity is at least as good as the initial value on that specific circuit, so the reported average improvements (39% for Vigo, 107% for QX2) are a measure of in-sample training performance, not of the algorithm's ability to find a good coefficient for unseen circuits. The paper should evaluate WOA with a held-out procedure (for example, tuning pref on a subset of circuits and evaluating on the rest), or at minimum report the distribution of pref values selected and the sensitivity of the results to the fixed initial value prefbest=0.05.
  3. [Section 6.2-6.4 and Algorithm 1] Several free parameters are load-bearing for the reported gains but are fixed without sensitivity analysis: the QUBO penalty J is only specified as J >> |h|, the WOA parameters sSpr=2 and sRed=0.9 are hard-coded, and the initial preference coefficient is 0.05, which the paper itself identifies as the boundary of the region producing valid solutions. Because WOA's improvement is one of the central claims, the authors should show how solution quality varies with these parameters and, where possible, justify the chosen values from data rather than by inspection.
minor comments (4)
  1. [Section 3.5] The sentence 'For other metrics, such as data movement, power consumption, energy, the proposed method provides an optimal solution' is too strong: the method is a heuristic QUBO solver combined with a dependency-level partition that explicitly excludes some edges. Please rephrase to state that the method provides an optimal solution to each sub-QUBO or a locally optimized solution to the overall problem.
  2. [Abstract and Section 6.4.2] The 68% average data-movement reduction is dominated by the QX2 topology, where TIGER wins in 87.5% of cases, while on Vigo IBM QX actually outperforms TIGER in 41.7% of cases. The abstract should report the per-topology numbers and the variance rather than a single global average.
  3. [Algorithm 1] The WOA search visits prefleft = pref/sSpr = 0.025 on the first iteration, which is below the 0.05 threshold that the paper states is needed to avoid invalid solutions. This should be either justified as an intentional exploration of the invalid region or prevented by a lower bound.
  4. [Throughout] There are several typos and formatting issues, including 'restuls' in the abstract, 'different form' in Section 2, and 'the the U.S.' in the acknowledgements. Also, Figure 10 lists the circuit name 4gt11_83 twice.

Circularity Check

1 steps flagged · score 4.0 of 10

Only the WOA self-evaluation reduces to its own search objective; the central TIGER-vs-baseline claims are external and non-circular.

  1. fitted input called prediction [Section 4.3 (Algorithm 1); Section 6.4.1 (Figure 9)]
    "To arrive at the optimal solutions either in terms of the resulting number of SWAP gates inserted or gate fidelity, we propose an optimization algorithm. It searches for the coefficient value that maximizes fidelity total. ... In average, WOA improves total fidelity by 39% for IBM Vigo topology. ... In average, WOA improves total fidelity by 107% for IBM QX2 topology."

    Algorithm 1 defines fidelitybest as the running maximum of fidelitytotal over the sampled preference coefficients: it is initialized to tiger(pref) and overwritten only when fidelityleft or fidelityright is larger. Section 6.4.1 then reports the difference between this selected best and the initial value as the WOA improvement. Since the search objective is exactly the reported metric, computed on the same circuits, the reported 39% and 107% gains are a restatement of the selection rule rather than an independent validation. The evaluation certifies that hill-climbing on fidelitytotal finds a coefficient with higher fidelitytotal; it does not provide an out-of-sample or externally anchored check of the weight optimization algorithm.

full rationale

The main claimed results are external and non-circular. Section 6.2 compares D-Wave versus classical solver delays, Section 6.3 compares TIGER-generated assignments against TABU-search/qbsolv on the same TCG inputs, and Section 6.4.2 compares final SWAP counts against the IBM QX optimizer; none of these fits a parameter to the reported metric. The 68% data-movement reduction is a direct cost comparison of final SWAP counts, and the SWAP-distance model in Eq. (2) is a modeling simplification, not a circular input. The only self-referential element is the WOA evaluation in Section 6.4.1, where the preference coefficient is chosen by maximizing fidelitytotal and the same fidelitytotal is then reported as improved; that is a fitted-parameter-renamed-as-improvement pattern. Because this sub-evaluation is auxiliary and the central benchmark claims stand independently, the overall circularity score is moderate rather than severe.

Assumptions & free parameters 4 free parameters · 4 assumptions · 1 invented entities

The central method depends on several modeling choices that are not independently verified: additive costs, dependency-level decomposability, distance-as-SWAP-count, penalty scaling, and the annealer's solution quality. The WOA search hyperparameters and the preference coefficient are fitted to the evaluated cases, while no held-out generalization test is provided.

free parameters (4)
  • preference coefficient pref (priority coefficient) = varies; initial 0.05, WOA search range scaled by sSpr
    Scales SWAP-movement versus mapping-fidelity weights in the QUBO objective (Section 4.3); WOA tunes it per circuit and topology to maximize fidelitytotal, so reported fidelity gains are partly fit to the benchmark set.
  • search spread sSpr and reduction sRed = sSpr = 2, sRed = 0.9
    Hand-set hyperparameters of Algorithm 1; no sensitivity analysis to their values is provided.
  • QUBO penalty J for one-task one-PU and one-PU one-task constraints = not specified, stated only as J >> |h|
    Penalty magnitude determines whether constraints are respected; exact values and scaling with problem size are not reported, and invalid solutions are reported for pref < 0.05 in Section 6.4, indicating weight calibration matters.
  • dependency-level cut when tasks exceed PUs = task ID increment order
    Section 3.2 chooses to delay tasks to the next level by task ID; this is an ad hoc policy that affects the assignment solution.
assumptions (4)
  • domain assumption A task-communication graph is a DAG whose tasks can be partitioned into independent dependency levels, each solved as a separate linear assignment problem.
    Section 3.2 uses dependency levels to split the QUBO; if dependencies couple assignments across levels, the decomposition changes the objective.
  • domain assumption The objective is additive over tasks and edges, so QUBO sum-minimization is an appropriate proxy; for makespan or delay objectives this is not true.
    Section 3.5 states that QUBO minimizes the sum of placement costs and does not guarantee parallel execution time is minimized, yet the paper evaluates delay-to-solution and cost quality.
  • ad hoc to paper The SWAP count needed to execute a two-qubit gate equals the graph distance between the physical qubits assigned to its two endpoint gate-tasks, independent of other logical qubit states moving concurrently.
    Section 4.2 and Figure 3 model each two-qubit gate as two connected tasks and use topology distance as the movement cost; this ignores routing contention and the need to free intermediate qubits.
  • domain assumption D-Wave 2X plus qbsolv returns low-energy solutions whose quality is representative enough for comparative evaluation.
    Evaluation relies on the annealer's samples and the tabu-based decomposer; solution variation is reported as within 5% but no distribution or optimality gap is given.
invented entities (1)
  • virtual qubits in sub-QUBOs
    purpose: Anchoring previous placements of source tasks whose communication edges enter a sub-QUBO from outside, as introduced in Section 3.3.
    These are internal QUBO variables with no external falsifiable handle; their use assumes prior placements are correct and do not need revision.

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Cite this review

Pith. "Pith review of TIGER: Topology-aware Assignment using Ising machines Application to Classical Algorithm Tasks and Quantum Circuit Gates." pith.science (2026). https://pith.science/paper/CTJF34SB

@misc{pith2026200910151,
  author       = {Pith},
  title        = {Pith review of: TIGER: Topology-aware Assignment using Ising machines Application to Classical Algorithm Tasks and Quantum Circuit Gates},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/CTJF34SB}},
  note         = {Machine review of arXiv:2009.10151}
}
read the original abstract

Optimally mapping a parallel application to compute and communication resources is increasingly important as both system size and heterogeneity increase. A similar mapping problem exists in gate-based quantum computing where the objective is to map tasks to gates in a topology-aware fashion. This is an NP-complete graph isomorphism problem, and existing task assignment approaches are either heuristic or based on physical optimization algorithms, providing different speed and solution quality trade-offs. Ising machines such as quantum and digital annealers have recently become available and offer an alternative hardware solution to solve this type of optimization problems. In this paper, we propose an algorithm that allows solving the topology-aware assignment problem using Ising machines. We demonstrate the algorithm on two use cases, i.e. classical task scheduling and quantum circuit gate scheduling. TIGER---topology-aware task/gate assignment mapper tool---implements our proposed algorithms and automatically integrates them into the quantum software environment. To address the limitations of physical solver, we propose and implement a domain-specific partition strategy that allows solving larger-scale problems and a weight optimization algorithm that allows tuning Ising model parameters to achieve better restuls. We use D-Wave's quantum annealer to demonstrate our algorithm and evaluate the proposed tool flow in terms of performance, partition efficiency, and solution quality. Results show significant speed-up compared to classical solutions, better scalability, and higher solution quality when using TIGER together with the proposed partition method. It reduces the data movement cost by 68\% in average for quantum circuit assignment compared to the IBM QX optimizer.

Figures

Figures reproduced from arXiv: 2009.10151 by the authors.

Figure 1
Figure 1. Task Communication Graph (TCG) assignment on a heterogeneous multi-PU system: problem mapping [PITH_FULL_IMAGE:figures/full_fig_p004_1.png] view at source ↗
Figure 2
Figure 2. Binary solution interpretation: computation task assignment and communication impact. [PITH_FULL_IMAGE:figures/full_fig_p005_2.png] view at source ↗
Figure 3
Figure 3. Quantum circuit graph: gate-to-qubit assignment. [PITH_FULL_IMAGE:figures/full_fig_p007_3.png] view at source ↗
Figures from the paper (7 more)
Figure 4
Figure 4. Figure 4: Topology-aware task assignment using TIGER and quantum annealing. [PITH_FULL_IMAGE:figures/full_fig_p008_4.png]
Figure 5
Figure 5. Figure 5: Topology-aware task assignment problem input. [PITH_FULL_IMAGE:figures/full_fig_p009_5.png]
Figure 6
Figure 6. Figure 6: Delay-to-Solution evaluation: (I) - classical TABU-search solver w/o TIGER sQ partition, (II) - quantum DW solver w/o TIGER sQ partition and (III) - quantum DW solver with TIGER sQ partition. the COSMIC benchmark suite [33] [PITH_FULL_IMAGE:figures/full_fig_p010_6.png]
Figure 7
Figure 7. Figure 7: Task assignment sensitivity and quality of the solution. [PITH_FULL_IMAGE:figures/full_fig_p011_7.png]
Figure 8
Figure 8. Figure 8: IBM Vigo: mapping fidelity, number of swaps [PITH_FULL_IMAGE:figures/full_fig_p012_8.png]
Figure 9
Figure 9. Figure 9: Quantum gate assignment: wieght optimization algorithm search [PITH_FULL_IMAGE:figures/full_fig_p013_9.png]
Figure 10
Figure 10. Figure 10: Optimizer comparison: TIGER vs. IBM QX 7 Conclusions In this paper, we propose an algorithm for solving the topology-aware task/gate assignment problem on physical Ising machines in order to accelerate and improve the quality of the solution to this challeng￾ing NP-co…

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

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    A NERSC analysis finds that more than 50% of its workload could ultimately benefit from quantum computing and that vendor roadmaps and quantum application requirements are projected to overlap in the next 5 to 10 years.

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