{"as_of":"2026-08-06T19:29:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:e7cd1cc271687a2ab117de095beeeecad612ee0fe2e88491f403370631061282","coverage":[{"denominator":0,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":2,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":2,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-06T06:34:29.942622+00:00","state":"measured"},{"denominator":2,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":2,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-05T05:41:47.885556Z","state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"arxiv_reference","source_observed_at":"2026-05-19T00:16:55.187066Z","state":"measured"}],"external_citation_measurements":[],"inbound":[{"citation":{"cited_paper":{"arxiv_id":"2306.10250","last_updated":"2024-10-13T14:59:43Z","snapshot_observed_at":"2026-08-06T00:03:48.625433Z","submitted_at":"2023-06-17T03:46:14Z","title":"Hardware-Efficient Quantum Random Access Memory Design with a Native Gate Set on Superconducting Platforms","version":2},"cited_work":{"arxiv_id":"2306.10250","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2306.10250","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"4637a8b4-fb2a-4ef5-b5ae-95cee8442b70","year":2024},"citing_paper":{"arxiv_id":"2508.02855","last_updated":"2026-04-08T11:20:06Z","snapshot_observed_at":"2026-08-03T02:29:08.770157Z","submitted_at":"2025-08-04T19:29:49Z","title":"A resource-efficient quantum-walker Quantum RAM","version":2},"reference_index":29,"source":"pdf_text","source_observed_at":"2026-05-19T00:15:49.515736Z"},"links":{"cited_paper":"/paper/2306.10250","citing_paper":"/paper/2508.02855"},"observation_digest":"sha256:07ed1ba0778bb43f3e0f259ce7e46497e6b4b5fc6607568dd44d786d0100b3a8","observation_id":"8ab6ae51-9676-41d0-ae49-1964ee8c14ea","resolution":{"observed_at":"2026-05-19T00:16:55.189051Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-06T06:34:29.942622+00:00","source":"crossref"},{"observed_at":"2026-08-06T06:34:23.284952+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2306.10250","last_updated":"2024-10-13T14:59:43Z","snapshot_observed_at":"2026-08-06T00:03:48.625433Z","submitted_at":"2023-06-17T03:46:14Z","title":"Hardware-Efficient Quantum Random Access Memory Design with a Native Gate Set on Superconducting Platforms","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2306.10250","snapshot_observed_at":"2026-08-05T05:41:47.885556Z","title":null,"venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2509.05395","last_updated":"2025-09-05T12:58:13Z","snapshot_observed_at":"2026-08-05T05:41:36.369423Z","submitted_at":"2025-09-05T12:58:13Z","title":"Practical Fidelity Limits of Toffoli Gates in Superconducting Quantum Processors","version":1},"reference_index":109,"source":"pdf_text","source_observed_at":"2026-08-05T05:41:47.885556Z"},"links":{"cited_paper":"/paper/2306.10250","citing_paper":"/paper/2509.05395"},"observation_digest":"sha256:91d79fdb03e5385a9ce992cfa23f84f9fc75ccd8fa9efe111fa957df028b31b0","observation_id":"6483e0c8-f153-48ad-bf54-52e04aa70f04","resolution":{"observed_at":"2026-08-05T05:41:47.885556Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}}],"links":{"evidence":"/evidence","html":"/paper/2306.10250/citation-record","integrity":"/paper/2306.10250/integrity","json":"/paper/2306.10250/citation-record.json","paper":"/paper/2306.10250"},"outbound":[],"paper":{"arxiv_id":"2306.10250","last_updated":"2024-10-13T14:59:43Z","latest_version":2,"primary_category":"quant-ph","snapshot_observed_at":"2026-08-06T00:03:48.625433Z","submitted_at":"2023-06-17T03:46:14Z","title":"Hardware-Efficient Quantum Random Access Memory Design with a Native Gate Set on Superconducting Platforms"},"reference_resolution":{"displayed":0,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":0,"verified_exact":0,"verified_fuzzy":0},"total_outbound_references":0},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-06T06:34:29.942622+00:00","source":"crossref"},{"observed_at":"2026-08-06T06:34:23.284952+00:00","source":"retraction_watch"}],"thesis":"As of 6 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2306.10250."}