{"as_of":"2026-08-24T03:55:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:ad6cad970c3ac96bc1163c59604ae3e63a479340114729b140406bf8d402b921","coverage":[{"denominator":0,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":2,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":2,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-23T06:30:58.430688+00:00","state":"measured"},{"denominator":2,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":2,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-16T11:25:20.237360Z","state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"pith","source_observed_at":"2026-08-10T19:49:56.259965Z","state":"measured"}],"external_citation_measurements":[],"inbound":[{"citation":{"cited_paper":{"arxiv_id":"2403.07039","last_updated":"2024-03-11T09:57:16Z","snapshot_observed_at":"2026-08-17T13:43:26.263359Z","submitted_at":"2024-03-11T09:57:16Z","title":"From English to ASIC: Hardware Implementation with Large Language Model","version":1},"cited_work":{"arxiv_id":"2403.07039","doi":null,"metadata_source":"pith","pith_arxiv_id":"2403.07039","snapshot_observed_at":"2026-08-10T19:49:56.259965Z","title":"From English to ASIC: Hardware Implementation with Large Language Model","venue":"cs.AR","work_id":"6e881389-a315-45e6-befd-bb47ac98758f","year":2024},"citing_paper":{"arxiv_id":"2501.09655","last_updated":"2025-01-16T16:51:59Z","snapshot_observed_at":"2026-08-17T13:09:52.130334Z","submitted_at":"2025-01-16T16:51:59Z","title":"A Survey of Research in Large Language Models for Electronic Design Automation","version":1},"reference_index":20,"source":"pdf_text","source_observed_at":"2026-08-10T19:49:55.519828Z"},"links":{"cited_paper":"/paper/2403.07039","citing_paper":"/paper/2501.09655"},"observation_digest":"sha256:dd188edc4323aab97d090bb1e192a1dbc0d70bedff728458650eff326319c87b","observation_id":"bcf33d63-c951-4be3-93c8-239676790d3a","resolution":{"observed_at":"2026-08-10T19:49:56.264371Z","resolver_source":"local_arxiv","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-23T06:30:58.430688+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-23T06:30:58.430688+00:00","source":"crossref"},{"observed_at":"2026-08-23T06:30:53.778098+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2403.07039","last_updated":"2024-03-11T09:57:16Z","snapshot_observed_at":"2026-08-17T13:43:26.263359Z","submitted_at":"2024-03-11T09:57:16Z","title":"From English to ASIC: Hardware Implementation with Large Language Model","version":1},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2403.07039","snapshot_observed_at":"2026-08-16T11:25:20.237360Z","title":"From english to asic: Hardware implementation with large language model,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2504.15659","last_updated":"2025-08-24T19:32:34Z","snapshot_observed_at":"2026-08-17T20:04:15.047150Z","submitted_at":"2025-04-22T07:32:46Z","title":"VeriCoder: Enhancing LLM-Based RTL Code Generation through Functional Correctness Validation","version":2},"reference_index":31,"source":"pdf_text","source_observed_at":"2026-08-16T11:25:20.237360Z"},"links":{"cited_paper":"/paper/2403.07039","citing_paper":"/paper/2504.15659"},"observation_digest":"sha256:cdede87465464154818af749df8eec130249266cbe524688b2683411315e2619","observation_id":"c6945a3b-04c8-4fa6-933d-680406703d96","resolution":{"observed_at":"2026-08-16T11:25:20.237360Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}}],"links":{"evidence":"/evidence","html":"/paper/2403.07039/citation-record","integrity":"/paper/2403.07039/integrity","json":"/paper/2403.07039/citation-record.json","paper":"/paper/2403.07039"},"outbound":[],"paper":{"arxiv_id":"2403.07039","last_updated":"2024-03-11T09:57:16Z","latest_version":1,"primary_category":"cs.AR","snapshot_observed_at":"2026-08-17T13:43:26.263359Z","submitted_at":"2024-03-11T09:57:16Z","title":"From English to ASIC: Hardware Implementation with Large Language Model"},"reference_resolution":{"displayed":0,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":0,"verified_exact":0,"verified_fuzzy":0},"total_outbound_references":0},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-23T06:30:58.430688+00:00","source":"crossref"},{"observed_at":"2026-08-23T06:30:53.778098+00:00","source":"retraction_watch"}],"thesis":"As of 24 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2403.07039."}