{"as_of":"2026-08-07T20:55:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:2228d1fd2c548eee3ea46aea0c0008fcd160bea8cc4468b5a54ede2b59273f38","coverage":[{"denominator":0,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":5,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":5,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-07T06:34:17.273281+00:00","state":"measured"},{"denominator":5,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":5,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-07T10:45:07.112196Z","state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"arxiv_reference","source_observed_at":"2026-06-29T18:53:51.275719Z","state":"measured"}],"external_citation_measurements":[],"inbound":[{"citation":{"cited_paper":{"arxiv_id":"2407.01910","last_updated":"2024-07-03T15:15:20Z","snapshot_observed_at":"2026-07-06T18:40:01.321429Z","submitted_at":"2024-07-02T03:21:24Z","title":"MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2407.01910","snapshot_observed_at":"2026-08-07T10:45:07.112196Z","title":"Available: https://arxiv.org/abs/2407.01910","venue":null,"work_id":null,"year":null},"citing_paper":{"arxiv_id":"2506.04544","last_updated":"2025-07-08T19:43:08Z","snapshot_observed_at":"2026-08-07T10:37:19.750438Z","submitted_at":"2025-06-05T01:29:18Z","title":"hdl2v: A Code Translation Dataset for Enhanced LLM Verilog Generation","version":2},"reference_index":2024,"source":"pdf_text","source_observed_at":"2026-08-07T10:45:07.112196Z"},"links":{"cited_paper":"/paper/2407.01910","citing_paper":"/paper/2506.04544"},"observation_digest":"sha256:bfa50fc3840c70c519416df0e2fd2b9c2691c70439d3b5e9b94817ecd5018257","observation_id":"4ad2bf82-372a-4604-9876-94bfd7ac9336","resolution":{"observed_at":"2026-08-07T10:45:07.112196Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2407.01910","last_updated":"2024-07-03T15:15:20Z","snapshot_observed_at":"2026-07-06T18:40:01.321429Z","submitted_at":"2024-07-02T03:21:24Z","title":"MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2407.01910","snapshot_observed_at":"2026-08-06T15:19:52.391272Z","title":"Mg-verilog: Multi-grained dataset towards enhanced llm-assisted verilog generation,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2507.16200","last_updated":"2025-07-22T03:29:23Z","snapshot_observed_at":"2026-08-06T15:13:16.621566Z","submitted_at":"2025-07-22T03:29:23Z","title":"RealBench: Benchmarking Verilog Generation Models with Real-World IP Designs","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-08-06T15:19:52.391272Z"},"links":{"cited_paper":"/paper/2407.01910","citing_paper":"/paper/2507.16200"},"observation_digest":"sha256:d8a7a2a396fbf5b46c4e779e0877e5de653fd68129e17466fc215b2a77eec1c9","observation_id":"2bfb09c1-36c3-425a-80c4-61964f959cc9","resolution":{"observed_at":"2026-08-06T15:19:52.391272Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2407.01910","last_updated":"2024-07-03T15:15:20Z","snapshot_observed_at":"2026-07-06T18:40:01.321429Z","submitted_at":"2024-07-02T03:21:24Z","title":"MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2407.01910","snapshot_observed_at":"2026-08-06T12:46:40.784054Z","title":"Mg-verilog: Multi-grained dataset to- wards enhanced llm-assisted verilog generation,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2507.21485","last_updated":"2025-07-29T03:59:19Z","snapshot_observed_at":"2026-08-06T12:46:40.103579Z","submitted_at":"2025-07-29T03:59:19Z","title":"HLSDebugger: Identification and Correction of Logic Bugs in HLS Code with LLM Solutions","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-08-06T12:46:40.784054Z"},"links":{"cited_paper":"/paper/2407.01910","citing_paper":"/paper/2507.21485"},"observation_digest":"sha256:4a68f1f90245d1eb9af137a9e2c7a437c47a708b71bad32ab8b14770ac7454c6","observation_id":"abbd5ceb-0abd-48ab-9a6f-56eac6e079f9","resolution":{"observed_at":"2026-08-06T12:46:40.784054Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2407.01910","last_updated":"2024-07-03T15:15:20Z","snapshot_observed_at":"2026-07-06T18:40:01.321429Z","submitted_at":"2024-07-02T03:21:24Z","title":"MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation","version":2},"cited_work":{"arxiv_id":"2407.01910","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2407.01910","snapshot_observed_at":"2026-06-29T18:53:51.275719Z","title":"Mg-verilog: Multi-grained dataset towards enhanced llm-assisted verilog generation,","venue":null,"work_id":"7693e51d-2542-436a-a5c1-e9b12e6ba641","year":2024},"citing_paper":{"arxiv_id":"2605.05267","last_updated":"2026-05-06T09:38:31Z","snapshot_observed_at":"2026-08-04T17:41:12.164736Z","submitted_at":"2026-05-06T09:38:31Z","title":"Bridging Generation and Training: A Systematic Review of Quality Issues in LLMs for Code","version":1},"reference_index":152,"source":"pdf_text","source_observed_at":"2026-05-08T17:37:51.790000Z"},"links":{"cited_paper":"/paper/2407.01910","citing_paper":"/paper/2605.05267"},"observation_digest":"sha256:1f9bcaeb7cbcd99fd51f34e55d96d676985579367394deacd8a53e437ccdad50","observation_id":"76c72a40-dea1-45eb-bd45-ee1ab929465f","resolution":{"observed_at":"2026-05-11T17:26:04.516231Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2407.01910","last_updated":"2024-07-03T15:15:20Z","snapshot_observed_at":"2026-07-06T18:40:01.321429Z","submitted_at":"2024-07-02T03:21:24Z","title":"MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation","version":2},"cited_work":{"arxiv_id":"2407.01910","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2407.01910","snapshot_observed_at":"2026-06-29T18:53:51.275719Z","title":"Mg-verilog: Multi-grained dataset towards enhanced llm-assisted verilog generation,","venue":null,"work_id":"7693e51d-2542-436a-a5c1-e9b12e6ba641","year":2024},"citing_paper":{"arxiv_id":"2605.26498","last_updated":"2026-05-26T03:21:32Z","snapshot_observed_at":"2026-07-06T23:36:20.072253Z","submitted_at":"2026-05-26T03:21:32Z","title":"Verilog-Evolve: Feedback-Driven and Skill-Evolving Verilog Generation","version":1},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-06-29T18:49:52.243940Z"},"links":{"cited_paper":"/paper/2407.01910","citing_paper":"/paper/2605.26498"},"observation_digest":"sha256:42db06b2b884b709e1b31dc26b9fd2de5c73501b412c45c8c259fd8a9a0cc1fc","observation_id":"4eb87482-feb0-4f68-a339-b43cdb218134","resolution":{"observed_at":"2026-06-29T18:53:51.277813Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}}],"links":{"evidence":"/evidence","html":"/paper/2407.01910/citation-record","integrity":"/paper/2407.01910/integrity","json":"/paper/2407.01910/citation-record.json","paper":"/paper/2407.01910"},"outbound":[],"paper":{"arxiv_id":"2407.01910","last_updated":"2024-07-03T15:15:20Z","latest_version":2,"primary_category":"cs.LG","snapshot_observed_at":"2026-07-06T18:40:01.321429Z","submitted_at":"2024-07-02T03:21:24Z","title":"MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation"},"reference_resolution":{"displayed":0,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":0,"verified_exact":0,"verified_fuzzy":0},"total_outbound_references":0},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"thesis":"As of 7 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 5 inbound Pith citation observations for arXiv:2407.01910."}