{"as_of":"2026-08-13T04:04:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:900c0bed4ea52d8a3463b372bfb67a73330a767059539db70970af2da222dac3","coverage":[{"denominator":25,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":25,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-12T14:30:21.363577Z","state":"measured"},{"denominator":25,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":25,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-12T06:34:41.77262+00:00","state":"measured"},{"denominator":0,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"cited_works","source_observed_at":null,"state":"measured"}],"external_citation_measurements":[],"inbound":[],"links":{"evidence":"/evidence","html":"/paper/2411.15332/citation-record","integrity":"/paper/2411.15332/integrity","json":"/paper/2411.15332/citation-record.json","paper":"/paper/2411.15332"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.283398Z","title":"Characterizing quantum supremacy in near-term devices,","venue":null,"work_id":null,"year":2018},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.283398Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:bf0968a1bc50054003ede099ef38acd6d35d19786c027db55243b228c0ab2326","observation_id":"b2c2f012-03d7-474f-9370-7235c19e2026","resolution":{"observed_at":"2026-08-12T14:30:21.283398Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.287626Z","title":"Polynomial-time algorithms for prime factorization and discrete logarithms on a quantum computer,","venue":null,"work_id":null,"year":1999},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.287626Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:7de456e351fa8774e106f2998637516d14a9743435c84e4b445919a3e8f1cb80","observation_id":"eb723e62-4faa-42a6-bc90-fcb8878b0590","resolution":{"observed_at":"2026-08-12T14:30:21.287626Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.708015Z","title":"A fast quantum mechanical algorithm for database search,","venue":null,"work_id":"a3e78027-1163-4d45-b5e5-f3376319717c","year":1996},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.290897Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:6ed3fb088f6fb248feb7ea0ff49c2782da99b1e18a9ba7807cf7bd6a821c0e5d","observation_id":"509c31d8-d59f-41c9-a4f7-972b9b13b9e1","resolution":{"observed_at":"2026-08-12T14:30:21.711410Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.696463Z","title":"A co-design framework of neural networks and quantum circuits towards quantum advantage,","venue":null,"work_id":"900b3b99-7f7b-426c-85b1-5368be5a07e9","year":2021},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.293836Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:07fdd1139236cc9015f1737f3464cb4627503ff569548b14b76dee0fb7ab9326","observation_id":"e2dad63b-d62b-4e9e-9bcc-a04e274a1f60","resolution":{"observed_at":"2026-08-12T14:30:21.701070Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.685394Z","title":"Quantum neural network compression,","venue":null,"work_id":"9005eadc-884e-4be6-be25-1b697e5e8896","year":2022},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.297067Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:ac132a0c5e2b3c6bdc98050500fdbd97f9a929a7721782094ad4d29a0aaa2c5a","observation_id":"7171854e-1682-4bef-b6be-9ba3e2c0f6a9","resolution":{"observed_at":"2026-08-12T14:30:21.689906Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.675927Z","title":"List of qc simulators","venue":null,"work_id":"d60350fc-fd9b-4f4a-a27e-096c20c93c62","year":2022},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.300874Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:ccfea7da2a09307bab446e2c8d30ddac3313a13d72ccfe289dce68d7a753157c","observation_id":"99f6b6c1-efe8-4968-9af9-133ab627a9f6","resolution":{"observed_at":"2026-08-12T14:30:21.679575Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.664186Z","title":"Massively paral- lel quantum computer simulator,","venue":null,"work_id":"233f0585-a53e-4a49-b060-0e6cad94ed3c","year":2007},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.304733Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:b7a8f5f6c238f6c13c9831f35dfe3a3fbcd0b8ccfbd5d140cb96608fcd0764f0","observation_id":"9a513502-b007-443e-b12f-01a604cede4a","resolution":{"observed_at":"2026-08-12T14:30:21.668841Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.654452Z","title":"5 petabyte simulation of a 45-qubit quantum circuit,","venue":null,"work_id":"090810f7-a402-452b-9dbe-199dd66749f4","year":2017},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.308285Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:cb02d66bce4ee488784a481ae44726c13cecb745be2106cae455df6c7ac7c516","observation_id":"9979679b-6600-4a38-bb44-fb0bd1c7fc79","resolution":{"observed_at":"2026-08-12T14:30:21.657783Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.644484Z","title":"Quantum supremacy circuit simulation on sunway taihulight,","venue":null,"work_id":"390b1f20-af57-493f-9251-5a8e564ae184","year":2019},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.312335Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:8aae4610585ee5f3a6279d0fdda85db9072b4636894e61c345a806538063644b","observation_id":"847358b0-50fd-42ef-a3e3-6d3f0df1f3a7","resolution":{"observed_at":"2026-08-12T14:30:21.648134Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.633227Z","title":"Top500 list","venue":null,"work_id":"9fe606d0-675a-4ccb-93e3-9a8112d2a408","year":2021},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.315872Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:1c7d573f10fb278090f96513a62e143378ef08e793864afa0dc65cd6f24212e8","observation_id":"6908a6c6-b6ea-4167-bebe-2dd94b038704","resolution":{"observed_at":"2026-08-12T14:30:21.637860Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"1601.07195","last_updated":"2016-05-12T21:23:03Z","snapshot_observed_at":"2026-08-06T22:08:02.082252Z","submitted_at":"2016-01-26T21:30:20Z","title":"qHiPSTER: The Quantum High Performance Software Testing Environment","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"1601.07195","snapshot_observed_at":"2026-08-12T14:30:21.318728Z","title":"qhipster: The quantum high performance software testing environment,","venue":null,"work_id":null,"year":2016},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.318728Z"},"links":{"cited_paper":"/paper/1601.07195","citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:1e6c59c44aedf834d86df018c1de6767a26941f8e8f3ae709c332feb5a73512d","observation_id":"f9347ea9-b2fa-48ea-ade1-4f98720f58c2","resolution":{"observed_at":"2026-08-12T14:30:21.318728Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.622590Z","title":"Qx: A high-performance quantum computer simulation platform,","venue":null,"work_id":"81b751ef-32b5-4c55-a0c8-f567e7eb6c67","year":2017},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.322263Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:72b97d95473197f4bf69c8efac216824f9f6b30ab4150ebd2128f81ac015f00d","observation_id":"e294df8a-fbb9-4de4-ae5d-6cb1fb5436f2","resolution":{"observed_at":"2026-08-12T14:30:21.626458Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.613418Z","title":"Quantum complexity theory,","venue":null,"work_id":"bf0b61d8-cb70-4d69-9295-68e0a98fe321","year":1997},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":13,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.325383Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:0e1f435ce16dd4d7b077d261ec0716b4c3f43d9a3c59657450cfc1a81754aa97","observation_id":"a8ac8f75-af81-4ca3-835a-ee13606aa181","resolution":{"observed_at":"2026-08-12T14:30:21.616464Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"1712.05384","last_updated":"2018-01-19T19:53:51Z","snapshot_observed_at":"2026-08-05T20:17:53.516037Z","submitted_at":"2017-12-14T18:35:09Z","title":"Simulation of low-depth quantum circuits as complex undirected graphical models","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"1712.05384","snapshot_observed_at":"2026-08-12T14:30:21.328457Z","title":"Simulation of low-depth quantum circuits as complex undirected graphical models,","venue":null,"work_id":null,"year":2017},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":14,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.328457Z"},"links":{"cited_paper":"/paper/1712.05384","citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:fcb3121e5014a0bdb30726ed29a350239f07a6074091d4704a54b5913081154f","observation_id":"62627737-458f-41b8-8bf3-839572e64cc5","resolution":{"observed_at":"2026-08-12T14:30:21.328457Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"1710.05867","last_updated":"2020-08-27T14:10:49Z","snapshot_observed_at":"2026-08-05T20:53:24.704203Z","submitted_at":"2017-10-16T17:00:59Z","title":"Pareto-Efficient Quantum Circuit Simulation Using Tensor Contraction Deferral","version":4},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"1710.05867","snapshot_observed_at":"2026-08-12T14:30:21.332227Z","title":"Breaking the 49-qubit barrier in the simulation of quantum circuits,","venue":null,"work_id":null,"year":2017},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":15,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.332227Z"},"links":{"cited_paper":"/paper/1710.05867","citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:47fe7aeec8cf8683eb3805c4787732c014b6c01d47a012a7d27bacf03eab3b9b","observation_id":"71bc746c-6b6c-4d21-a35f-53f9b8031e6b","resolution":{"observed_at":"2026-08-12T14:30:21.332227Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.600969Z","title":"Validating quantum-classical programming models with tensor network simulations,","venue":null,"work_id":"9b25fe27-f3e4-4ad0-a334-889518600075","year":2018},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":16,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.335791Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:30bb2795738e4b125dd73427171a8b851556f72dd7a950e5f5df252ff17b8687","observation_id":"dd164ca5-147c-49d8-9a15-ff61faccd7cd","resolution":{"observed_at":"2026-08-12T14:30:21.605055Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"1805.01450","last_updated":"2018-05-07T17:53:50Z","snapshot_observed_at":"2026-08-05T08:24:24.678067Z","submitted_at":"2018-05-03T17:52:18Z","title":"Classical Simulation of Intermediate-Size Quantum Circuits","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"1805.01450","snapshot_observed_at":"2026-08-12T14:30:21.339433Z","title":"Classi- cal simulation of intermediate-size quantum circuits,","venue":null,"work_id":null,"year":2018},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":17,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.339433Z"},"links":{"cited_paper":"/paper/1805.01450","citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:aa23a65375019ab6e3819aeb1c84b836ebe3e37249174b90ca4b961ebe86bff1","observation_id":"48d99604-2499-4c9b-aad0-ef6da94f3a57","resolution":{"observed_at":"2026-08-12T14:30:21.339433Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.342839Z","title":"64-qubit quantum circuit simulation,","venue":null,"work_id":null,"year":2018},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":18,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.342839Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:e5d34936db6e7ad14011b0c934608bca8ef8c0203535ed5d47a47f23469a8c7b","observation_id":"d0ef95fe-869a-47f8-bb4a-eabbbf49975b","resolution":{"observed_at":"2026-08-12T14:30:21.342839Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.587206Z","title":"Superconducting quantum circuits at the surface code threshold for fault tolerance,","venue":null,"work_id":"3222c41e-90fb-413b-bf62-6eab1705f150","year":2014},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":19,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.345531Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:773baaa919a7e8c0d48f75597b55d8dee874176f6834650093d76f882a4ae9ab","observation_id":"c7dbf873-4309-43bd-bc4c-1ea39abd7749","resolution":{"observed_at":"2026-08-12T14:30:21.590841Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.573911Z","title":"Statistical assertions for validating patterns and finding bugs in quantum programs,","venue":null,"work_id":"f8b9dd12-f56b-4b6a-869a-8bcbd9ecf275","year":2019},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":20,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.348095Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:901bc055a8db52df74c1b61f5fa46df4a8ea0e0b7178a7347d5cef41333c65e5","observation_id":"f4e96c36-c927-4169-be1a-71db3b967d7e","resolution":{"observed_at":"2026-08-12T14:30:21.577907Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.563248Z","title":"Full-state quantum circuit simulation by using data compression,","venue":null,"work_id":"752d64ad-d5a1-46d5-9b9e-5510487eea31","year":2019},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":21,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.351248Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:2afcadfa262cd747bf8935ea734818173d1416839e9a696ba32335177a803e55","observation_id":"bc9e6393-4f37-462b-b554-b4ccff25006c","resolution":{"observed_at":"2026-08-12T14:30:21.567588Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.354678Z","title":"A method for the construction of minimum-redundancy codes,","venue":null,"work_id":null,"year":1952},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":22,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.354678Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:ee8d8e46a497e55c7a2944a57d8bfec8b92b4094d7103366019922d0cf6f6a4f","observation_id":"c8f9a9bb-2c34-421e-9192-5e5e26005cb6","resolution":{"observed_at":"2026-08-12T14:30:21.354678Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.441595Z","title":"Arithmetic coding for data compression,","venue":null,"work_id":"e1ca05ac-8437-417a-b51a-cb6aadc0eb04","year":1987},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":23,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.357626Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:033be8f4d1fa27b6038d71fc6dfe63c403f0c3d0bf7ddc2f0cf954e4e31b8da5","observation_id":"0d3516dc-97cd-4f6d-ab11-227c46e6d585","resolution":{"observed_at":"2026-08-12T14:30:21.444556Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.430578Z","title":"Error-controlled lossy compression optimized for high compression ratios of scientific datasets,","venue":null,"work_id":"67f5d4f7-aa12-408e-a696-fb7cc8fc3119","year":2018},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":24,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.360698Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:ddc97493224aa87d0f6fa2d4ee793d3e119c63cca524512c0a6baa8d19bc6651","observation_id":"730b1c57-b8be-4707-ac1f-f4112433158e","resolution":{"observed_at":"2026-08-12T14:30:21.434214Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-12T14:30:21.418803Z","title":"Exploration of lossy compression for application-level checkpoint/restart,","venue":null,"work_id":"c4f8e6ba-2b82-4c31-8d6a-243d4835340b","year":2015},"citing_paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration","version":1},"reference_index":25,"source":"pdf_text","source_observed_at":"2026-08-12T14:30:21.363577Z"},"links":{"citing_paper":"/paper/2411.15332"},"observation_digest":"sha256:99336b0035a5156768e9de8bcf8d0a9cdad320f76c6e627d5108096b18a3a10e","observation_id":"99e8a95d-dc64-4885-9a1a-69932be2c17d","resolution":{"observed_at":"2026-08-12T14:30:21.423668Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"state":"measured"}}],"paper":{"arxiv_id":"2411.15332","last_updated":"2024-11-22T20:07:31Z","latest_version":1,"primary_category":"quant-ph","snapshot_observed_at":"2026-08-12T14:22:53.673281Z","submitted_at":"2024-11-22T20:07:31Z","title":"Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration"},"reference_resolution":{"displayed":25,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":8,"verified_exact":0,"verified_fuzzy":17},"total_outbound_references":25},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-12T06:34:41.77262+00:00","source":"crossref"},{"observed_at":"2026-08-12T06:34:36.333875+00:00","source":"retraction_watch"}],"thesis":"As of 13 August 2026, this Paper Citation Record lists 25 of 25 outbound references and 0 inbound Pith citation observations for arXiv:2411.15332."}