{"as_of":"2026-08-14T13:10:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:24f6733bf5211c5aaf394315487c5f3d0b8987f69a7f880e70847f0a359b8307","coverage":[{"denominator":15,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":15,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-11T16:50:14.751120Z","state":"measured"},{"denominator":16,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":16,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-14T06:32:32.682623+00:00","state":"measured"},{"denominator":1,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":1,"source":"paper_references, paper_reference_links","source_observed_at":"2026-05-10T12:38:45.687975Z","state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"arxiv_reference","source_observed_at":"2026-05-11T11:46:20.456407Z","state":"measured"}],"external_citation_measurements":[],"inbound":[{"citation":{"cited_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"cited_work":{"arxiv_id":"2412.09745","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2412.09745","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"2d199b59-da48-45a8-b080-433bedf6415c","year":2024},"citing_paper":{"arxiv_id":"2604.13523","last_updated":"2026-07-12T19:35:34Z","snapshot_observed_at":"2026-08-13T01:40:26.479285Z","submitted_at":"2026-04-15T06:15:56Z","title":"TensorLift: Automatic Extraction of Tensor-Level ISA Semantics from Accelerator RTL via MLIR Semantic Lifting","version":1},"reference_index":40,"source":"pdf_text","source_observed_at":"2026-05-10T12:38:45.687975Z"},"links":{"cited_paper":"/paper/2412.09745","citing_paper":"/paper/2604.13523"},"observation_digest":"sha256:6b631bb457d86abfbaf48bb34ae2d4c172e4367bea87c6b41d977f4a1a7bfdea","observation_id":"c625280d-8c81-4029-818b-262661235439","resolution":{"observed_at":"2026-05-11T11:46:20.478358Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}}],"links":{"evidence":"/evidence","html":"/paper/2412.09745/citation-record","integrity":"/paper/2412.09745/integrity","json":"/paper/2412.09745/citation-record.json","paper":"/paper/2412.09745"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:15.187662Z","title":"Introduction to large language models (llms),","venue":null,"work_id":"d29138ed-79ea-46d5-ac70-9727df7bd165","year":2024},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.623570Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:c6c32f70e1fb4f68953119492d7d8a4561b543b504ba28130eef91cf281149d4","observation_id":"9b56091d-dd58-4dc8-af78-02b1f8e9c84b","resolution":{"observed_at":"2026-08-11T16:50:15.193010Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:15.159983Z","title":"Openroad: Toward a self-driving, open-source digital layout implementation tool chain,","venue":null,"work_id":"9eb94470-607d-44c9-bb04-99c8aa42a96d","year":2019},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.632381Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:621a0c7d6bfd8f61288a7b6cc2338957b377ac01971a05aad57dda24b3826f2d","observation_id":"92be4852-5d6e-45e5-84fb-0c5c560f407b","resolution":{"observed_at":"2026-08-11T16:50:15.169794Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:15.140539Z","title":"Exploring agentic workflows: The power of ai-agent collaboration,","venue":null,"work_id":"278b54f4-832f-414c-ab73-a0824ef4dd54","year":2024},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.638905Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:276dfac16e12956ae535ba2e646b0a4aac090fe2ff0fb538bc2f11a74df4491c","observation_id":"f892e6b0-e2d6-4d4c-8b35-6e45c44fd05d","resolution":{"observed_at":"2026-08-11T16:50:15.146885Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2401.08500","last_updated":"2024-01-16T17:00:36Z","snapshot_observed_at":"2026-08-13T04:41:52.622365Z","submitted_at":"2024-01-16T17:00:36Z","title":"Code Generation with AlphaCodium: From Prompt Engineering to Flow Engineering","version":1},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2401.08500","snapshot_observed_at":"2026-08-11T16:50:14.651241Z","title":"Code generation with alpha- codium: From prompt engineering to flow engineering,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.651241Z"},"links":{"cited_paper":"/paper/2401.08500","citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:c9f726454c6ccacbeb5f822ea8831c2cd9f23d272a15102b881ddec9bff1d5e0","observation_id":"7cc3fe29-3034-44fb-a207-3309c763e574","resolution":{"observed_at":"2026-08-11T16:50:14.651241Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:15.121317Z","title":"Dave: Deriving automatically verilog from english,","venue":null,"work_id":"8b27cdb7-e7c6-432a-a4e8-eecec478a3a2","year":2020},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.661647Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:8579557334192714c0ec2ad3aa23202b37a77e58fd0ce7f31251c0d0fc9dc3e2","observation_id":"5b5d33bd-e95a-4893-b435-baed545bfa9c","resolution":{"observed_at":"2026-08-11T16:50:15.127249Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:14.678121Z","title":"Verigen: A large language model for verilog code generation,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.678121Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:99e458f77e2bd8bfa5f3e979167f762a52969c271efb1c0fb3b4e13a079d9f40","observation_id":"e5fdfb5a-038d-43aa-a0b3-69f5dad1e6d3","resolution":{"observed_at":"2026-08-11T16:50:14.678121Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2311.00176","last_updated":"2024-04-04T20:18:57Z","snapshot_observed_at":"2026-08-14T10:42:30.917842Z","submitted_at":"2023-10-31T22:35:58Z","title":"ChipNeMo: Domain-Adapted LLMs for Chip Design","version":5},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2311.00176","snapshot_observed_at":"2026-08-11T16:50:14.685619Z","title":"Chipnemo: Domain- adapted llms for chip design,","venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.685619Z"},"links":{"cited_paper":"/paper/2311.00176","citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:8d04214ac0f41738dd52ceadfdf198c55c0f034f7b9db0399dad63fb80489b5f","observation_id":"658c4514-8baa-4bd5-91b8-e4ec9f3c2d3a","resolution":{"observed_at":"2026-08-11T16:50:14.685619Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2407.01910","last_updated":"2024-07-03T15:15:20Z","snapshot_observed_at":"2026-08-12T23:30:46.608122Z","submitted_at":"2024-07-02T03:21:24Z","title":"MG-Verilog: Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2407.01910","snapshot_observed_at":"2026-08-11T16:50:14.694942Z","title":"Mg-verilog: Multi-grained dataset towards enhanced llm-assisted verilog generation,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.694942Z"},"links":{"cited_paper":"/paper/2407.01910","citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:a84c2b75b1b9ec6606064d32ca0248a216ab615fd734877b3eb04c83cb8c8e31","observation_id":"6baacd1a-89df-4495-8481-37763c42c676","resolution":{"observed_at":"2026-08-11T16:50:14.694942Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:14.701648Z","title":"Gpt4aigchip: Towards next-generation ai accelerator design automation via large language models,","venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.701648Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:d2d10539f5aa0ea865b97faa5b0b8be0d88158563731db55f9a1de700cefe2f8","observation_id":"d3dca82d-0830-4b36-95df-a38f3807728e","resolution":{"observed_at":"2026-08-11T16:50:14.701648Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2311.04887","last_updated":"2024-06-04T19:12:48Z","snapshot_observed_at":"2026-08-13T05:29:38.982995Z","submitted_at":"2023-11-08T18:46:39Z","title":"AutoChip: Automating HDL Generation Using LLM Feedback","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2311.04887","snapshot_observed_at":"2026-08-11T16:50:14.707534Z","title":"Au- tochip: Automating hdl generation using llm feedback,","venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.707534Z"},"links":{"cited_paper":"/paper/2311.04887","citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:a898259d8fe6b1f8723fae1954e8839bfbedab6f110f6e4be6a494c9be7ee49f","observation_id":"513c2a44-7ed9-4065-999c-65f34399f050","resolution":{"observed_at":"2026-08-11T16:50:14.707534Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:15.067779Z","title":"Toward an open-source digital flow: First learnings from the openroad project,","venue":null,"work_id":"bd20888f-e7e9-43bc-8d5a-f3f77e73643d","year":2019},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.716842Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:bb15e432f1ccc911e78529e298aaeff24fdc6c6d4ec758e5190d67ddc4c772c5","observation_id":"c3ca7e95-4fe5-412d-9936-6850ac3ec4e5","resolution":{"observed_at":"2026-08-11T16:50:15.081077Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:15.044854Z","title":"0.08mm2 128nw mfcc engine for ultra-low power, always-on smart sensing applications,","venue":null,"work_id":"3c3f8a89-cfb9-4cec-bfab-9a7fbe283b36","year":2022},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.722769Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:6f4c2a199d1d9763d3a5c4ab0e4f853d6bb8076094357342f64a54c2c58d6742","observation_id":"01f65ea9-7d8b-4fc8-85d5-73e510061939","resolution":{"observed_at":"2026-08-11T16:50:15.051959Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:15.016578Z","title":"An efficient mfcc extraction method in speech recognition,","venue":null,"work_id":"cbd08727-1293-4979-8db3-e6a6d609cfc3","year":2006},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":13,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.728838Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:b155f4b44673ed47b3dfdd5e5d3476d5bc7092a607b018ec357d0309b26efbf5","observation_id":"2d71b2dd-4c07-4d41-a6ac-280e7427930f","resolution":{"observed_at":"2026-08-11T16:50:15.023568Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:14.987905Z","title":"Speech recognition based on convolutional neural networks and mfcc algorithm,","venue":null,"work_id":"2e9fbd11-e758-4abc-9f8f-c7f5f4c295ca","year":2021},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":14,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.744085Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:4cf2f23cdaf494a010bd0807d64708ec26c5177736d677e3d663d9c81bf16f16","observation_id":"68b5f8f0-2cb9-459f-887c-0cbf36d7a97e","resolution":{"observed_at":"2026-08-11T16:50:14.994390Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-11T16:50:14.955185Z","title":"Langgraph: Build resilient language agents as graphs,","venue":null,"work_id":"1cebb5ac-ddad-4119-ae0c-3a69f65e40c8","year":2024},"citing_paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design","version":1},"reference_index":15,"source":"pdf_text","source_observed_at":"2026-08-11T16:50:14.751120Z"},"links":{"citing_paper":"/paper/2412.09745"},"observation_digest":"sha256:8a8a5d608a24a3c4cf265244942e4b276650e100c021af362ef3253251a8a613","observation_id":"fd56fa1d-b52f-4e87-8eda-18f129be1799","resolution":{"observed_at":"2026-08-11T16:50:14.965859Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}}],"paper":{"arxiv_id":"2412.09745","last_updated":"2024-12-12T22:28:03Z","latest_version":1,"primary_category":"cs.AR","snapshot_observed_at":"2026-08-13T18:41:39.203494Z","submitted_at":"2024-12-12T22:28:03Z","title":"AiEDA: Agentic AI Design Framework for Digital ASIC System Design"},"reference_resolution":{"displayed":15,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":6,"verified_exact":0,"verified_fuzzy":9},"total_outbound_references":15},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"thesis":"As of 14 August 2026, this Paper Citation Record lists 15 of 15 outbound references and 1 inbound Pith citation observation for arXiv:2412.09745."}