{"as_of":"2026-08-05T21:33:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:495641890f9d6649be1b289f16dded3ad17fc7c4cb621d2a18325a165ba47b91","coverage":[{"denominator":47,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":47,"source":"paper_references, paper_reference_links","source_observed_at":"2026-05-23T04:49:00.750151Z","state":"measured"},{"denominator":48,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":48,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-05T06:32:48.257954+00:00","state":"measured"},{"denominator":1,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":1,"source":"paper_references, paper_reference_links","source_observed_at":"2026-05-24T02:45:48.455887Z","state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"pith","source_observed_at":"2026-05-24T02:45:56.103716Z","state":"measured"}],"external_citation_measurements":[],"inbound":[{"citation":{"cited_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"cited_work":{"arxiv_id":"2501.16205","doi":null,"metadata_source":"pith","pith_arxiv_id":"2501.16205","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","venue":"cs.DC","work_id":"fd07609b-f62a-4453-b0c1-f35e927567bf","year":2025},"citing_paper":{"arxiv_id":"2404.00507","last_updated":"2025-05-06T16:32:38Z","snapshot_observed_at":"2026-08-03T14:14:09.304047Z","submitted_at":"2024-03-31T00:29:55Z","title":"THEMIS: Time, Heterogeneity, and Energy Minded Scheduling for Fair Multi-Tenant Use in FPGAs","version":3},"reference_index":18,"source":"pdf_text","source_observed_at":"2026-05-24T02:45:48.455887Z"},"links":{"cited_paper":"/paper/2501.16205","citing_paper":"/paper/2404.00507"},"observation_digest":"sha256:649c636380423d7773e56b2ea2b102a21dfeb98dedecc939f4d5bc24cabb611b","observation_id":"0d91272e-7dac-43fa-836e-1e2417c5bb6d","resolution":{"observed_at":"2026-05-24T02:45:56.106099Z","resolver_source":"local_arxiv","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}}],"links":{"evidence":"/evidence","html":"/paper/2501.16205/citation-record","integrity":"/paper/2501.16205/integrity","json":"/paper/2501.16205/citation-record.json","paper":"/paper/2501.16205"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Dynamic Function eXchange, UG909 (v2023.2)","venue":null,"work_id":"a451e011-bdff-4ddb-adbb-68f1f2886f11","year":2023},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:bf972166919690060957b38ea03ae8756f4ccc68635a5a8b1d8a691537d1ef55","observation_id":"763f1f74-a8e6-4043-a8b2-c2681c9b3117","resolution":{"observed_at":"2026-05-23T04:57:34.876329Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Spatiotemporal Strategies for Long-Term FPGA Resource Management","venue":null,"work_id":"c650c58c-9bb4-47d2-9151-c6c73447d115","year":2022},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:7c491517f6777051ba3291d508bc89f6bf57add5a975f5c4989a0bfbc7886790","observation_id":"fef2c187-4230-46dc-9f18-0378675a6c7f","resolution":{"observed_at":"2026-05-23T04:57:34.894094Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Do OS abstractions make sense on FPGAs?","venue":null,"work_id":"a100e406-0474-41d8-9fc5-3b88d241d361","year":2020},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:27fe63a43bee05acf89159a41f24c22bad21a461e374fd71518b5dd92ae4fe6a","observation_id":"e81c24ff-2c18-4b95-a123-b236b7b4e5da","resolution":{"observed_at":"2026-05-23T04:57:34.839366Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Sharing, Protection, and Compatibility for Reconfigurable Fabric with AmorphOS","venue":null,"work_id":"e0ac2b74-e882-472f-8743-d6b6fd63a96e","year":2018},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:d252a8c763f913f091c8e0283cfb15d5748da3f2516aa3e75fea31383eab4297","observation_id":"916cc478-12e6-45b4-88c5-fd130ab1f4bd","resolution":{"observed_at":"2026-05-23T04:57:34.800201Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":"2025.35668","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"THEMIS: Time, Heterogeneity, and Energy Minded Scheduling for Fair Multi-Tenant Use in FPGAs","venue":null,"work_id":"4c635a6d-7348-4ca0-afb8-ec0ea4a5b683","year":2025},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:a7ef296f09d47a8ba3e936a8b64ff9e468a57205be30cf27eed7969bbe8bfb3d","observation_id":"51d78b1f-6766-4e40-893d-a6d94f4c3531","resolution":{"observed_at":"2026-05-23T04:52:34.279941Z","resolver_source":"arxiv_id","status":"metadata_mismatch"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Context save and restore of partial reconfiguration regions for Xilinx FPGAs","venue":null,"work_id":"37e04f20-a9c9-44cd-a909-04d2ba423787","year":2019},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:46a31f080750265d768a8181c1fa9b3bd3a3a10bfef5035746163bcb4b11a6bd","observation_id":"439e4f47-2e2a-469e-989c-56ab031a0bc3","resolution":{"observed_at":"2026-05-23T04:57:34.794118Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"A hypervisor for shared-memory FPGA platforms","venue":null,"work_id":"1e035957-b03d-40b6-b696-7738a31e9d1c","year":2020},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:be856e99d3cb9f05ff2d59c4502f48e777a9bcf23b6ae97026d89ef53fd4c26c","observation_id":"0878f344-a045-4833-910f-b770f8200065","resolution":{"observed_at":"2026-05-23T04:57:34.784954Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Hardware Checkpointing and Productive Debugging Flows for FPGAs","venue":null,"work_id":"feb3d326-cd5a-4266-b44a-1c4b217affdc","year":2022},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:5d9c780c81e1fe5a65fc946769bf206e1664483ddb8e31aaf7988459edac51c6","observation_id":"0399cf10-9a24-460a-80ff-38ade35bd963","resolution":{"observed_at":"2026-05-23T04:57:34.788050Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Preemptive hardware multitasking in ReconOS","venue":null,"work_id":"b87d862c-8b91-4286-bb1c-6d882833e6a5","year":2015},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:c42c26e70bd9023a86fc90a61dd59b06f8f0089ea923b598e49f1f64a8a7bb58","observation_id":"fddea993-762e-421b-adf2-310a5a4acb2a","resolution":{"observed_at":"2026-05-23T04:57:34.797300Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Feel free to interrupt: Safe task stopping to enable FPGA checkpointing and context switching","venue":null,"work_id":"415216ca-36b1-4dcf-ab7f-e6a2e36d7e68","year":2020},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:5d1aa6b4351a740af045377351bc36c67de7953d3f839dc4e66d8b5d81539bb8","observation_id":"1fb8eef9-2f76-4d9c-a79e-33d54d64f5c1","resolution":{"observed_at":"2026-05-23T04:57:34.844797Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Stop and look: A novel checkpointing and debugging flow for FPGAs","venue":null,"work_id":"d1f69447-415f-41f4-a672-10966c57f813","year":2021},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:9a6c19eee1f328770c82054b250e8b1c251a7997b0fdc426392ef94f16f571ee","observation_id":"0f71aa46-7059-4e9c-9589-90ad135a90d3","resolution":{"observed_at":"2026-05-23T04:57:34.851335Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"7 Series FPGAs Configurable Logic Block, UG474, v1. 13.1","venue":null,"work_id":"40640934-86ea-4b98-a455-03fc3fea45fe","year":2016},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:ef8d415f844849b39c7a8e67833bab5be37f30e21ebbe6f96ea66b0d1a08eba8","observation_id":"00102e68-4923-4423-ac65-409f2e41fe4f","resolution":{"observed_at":"2026-05-23T04:57:34.774487Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"7 Series FPGAs Configuration User Guide, UG470 (v1. 11)","venue":null,"work_id":"30268550-f171-4400-a4a2-00db7864e172","year":2016},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":13,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:def31fe4cd353ccc98d2055fec31c3579f2f05ca05e7fd1e89bd62aab8307fbf","observation_id":"7c4c48df-02d6-4bcf-9ce5-992cf90d6e79","resolution":{"observed_at":"2026-05-23T04:57:34.873495Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"A hybrid approach to FPGA configuration scrubbing","venue":null,"work_id":"157bec49-245a-4017-8e7a-651c6281c532","year":2016},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":14,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:4a10daf6e86e720244be6dce80fc698b3b586f48a47ae44630b4bea51e75b958","observation_id":"a74209ec-4c02-4d79-b954-81fcd07e9f1d","resolution":{"observed_at":"2026-05-23T04:57:34.778772Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"246af85a-4aea-4b21-a059-bdbe9255cb41","year":2022},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":15,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:11d192eedb8c23c9ae2e6b649da660605bf5d3bdfc20222e6151617fab727878","observation_id":"a722bb28-39b3-45fb-99e3-736826c4107a","resolution":{"observed_at":"2026-05-23T04:57:34.842090Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"BITMAN: A tool and API for FPGA bitstream manipulations","venue":null,"work_id":"2ed7301e-cdd3-4e01-9875-a52ff9872472","year":2017},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":16,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:962557270999e581d0b71a2cd02c461dc795358db26cc9a89716e4d336b70b87","observation_id":"50ffef6b-2be1-4e7f-b748-e2b05893a044","resolution":{"observed_at":"2026-05-23T04:57:34.767105Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Zynq-7000 All Programmable SoC Overview","venue":null,"work_id":"2f533072-6aa8-40c5-8490-dc82888624e3","year":2012},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":17,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:6c4f51c57a39ef73159e4d7c9cbfe881fb7cdd0a7a639e4739a6dd8483b6bf60","observation_id":"5170c26e-607a-488f-b7df-dd6495e6991a","resolution":{"observed_at":"2026-05-23T04:57:34.791122Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"The RISC-V instruction set manual","venue":null,"work_id":"7e2d2b9a-78c2-4adf-9fba-8533cf5e0038","year":2014},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":18,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:77e158119c6f099034bf02b5b6cbd8e5dbb6a268aeed27189e5da32e14394f29","observation_id":"2c2bdaa7-fb1c-4996-b16e-56df1a164cad","resolution":{"observed_at":"2026-05-23T04:57:34.833668Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Machsuite: Benchmarks for accelerator design and customized architectures","venue":null,"work_id":"ef0c32d3-8e61-455a-a774-16a6b692db56","year":2014},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":19,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:3a7e0f8994da06dbffd940064593ff0e7286cce016da6c00638c1a16a728daa1","observation_id":"fc581d9d-4d3f-48be-9a1d-b8bb1f6dd817","resolution":{"observed_at":"2026-05-23T04:57:34.888397Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Conte, B-Con/crypto-algorithms","venue":null,"work_id":"956ce17d-f718-4faa-90d2-b4179283a2a6","year":2020},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":20,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:26302bacbf9acfe90fcdd02e9a4cc1de4f49ace49797e32c9a61a8552e17af78","observation_id":"ed59e7d2-eba6-4d1d-b81d-825f87c2d2ec","resolution":{"observed_at":"2026-05-23T04:57:34.891147Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"An overview of common benchmarks","venue":null,"work_id":"a7f1f6b6-ed04-4a6a-af38-a565f3cf4a04","year":1990},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":21,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:c7f0452e3a6bc01e81a7c25051c8b1ba6635e478f6081117c42387412c9ae0f1","observation_id":"70d23412-98ed-479b-a538-e418441212ae","resolution":{"observed_at":"2026-05-23T04:57:34.900380Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Fast-fourier lattice-based compact signatures over NTRU","venue":null,"work_id":"d7fdae42-a19f-4bb7-bd99-e827687b59f7","year":2019},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":22,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:a06cdfcd8137f90e6f9ba292747833efec8610756e580f0b426719e0471fb7a7","observation_id":"e35733bd-65ad-4329-b85b-24f4bf65f08b","resolution":{"observed_at":"2026-05-23T04:57:34.884895Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Vivado Design Suite Properties Reference Guide, UG912 (v2023.2)","venue":null,"work_id":"f2480647-7653-41be-8f0f-154fc128d564","year":2023},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":23,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:b41739711da18f97296ce80313f9722916c826c8d4aca8fb02327de8677bdbb7","observation_id":"062872a4-f500-47db-a894-510b20bda81c","resolution":{"observed_at":"2026-05-23T04:57:34.897096Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Configuration Readback Capture in UltraScale FP- GAs","venue":null,"work_id":"d6d64392-7db1-4cf7-9b7a-409b85922eb0","year":2015},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":24,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:d9c9ed265c10dcd0c8dc3ce78d0ec7b79ff2d0267a8cd0464c7c1292af7c451a","observation_id":"62903d09-a23d-4d00-9c0a-93c1e68061f0","resolution":{"observed_at":"2026-05-23T04:57:34.864145Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Chstone: A benchmark program suite for practical C-based high-level synthesis","venue":null,"work_id":"d48903ed-6aee-46dc-a034-2268baa8b944","year":2008},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":25,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:c6d16248860c8e628b1220034e1579899fbce612940d2376fa017b6fc86ae951","observation_id":"4fc502c0-8b6e-4d46-b726-480436b9af6b","resolution":{"observed_at":"2026-05-23T04:57:34.860907Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Rosetta: A realistic high-level synthesis benchmark suite for software programmable FPGAs","venue":null,"work_id":"13342ed2-97d8-461a-82c9-2f3b9c767f97","year":2018},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":26,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:eeaa869b80f74842b9d867814a789c0a70d8d73b3ce37bba5c94671bfcd5245a","observation_id":"3fc7c7c9-d20c-43fb-a726-19e074fdc016","resolution":{"observed_at":"2026-05-23T04:57:34.870702Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Rosetta: A realistic benchmark suite for software programmable FP- GAs","venue":null,"work_id":"157fc30b-012b-4802-b7ac-56728fc130c2","year":2015},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":27,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:9eb4b477de5025435ed91e5a0f8f60a6608510e8410ea1b8bf5716ba2e226c3e","observation_id":"2155d32b-8971-4b6c-8dff-cba0170968a6","resolution":{"observed_at":"2026-05-23T04:57:34.857940Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"MLSBench: A Benchmark Set for Machine Learning based FPGA HLS Design Flows","venue":null,"work_id":"ee4adc84-6e31-4022-aa40-956bf36efe6b","year":2022},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":28,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:a7c6915406ff8d5a27788313d2dd754b26dd72b675fb1748aa85a91b7e20d64b","observation_id":"be9186cc-3106-4fc7-9137-947c3cfc9450","resolution":{"observed_at":"2026-05-23T04:57:34.867438Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"A verilog RTL synthesis tool for heterogeneous FPGAs","venue":null,"work_id":"56397b74-e085-4ce0-bdc0-8b6940fe1d0f","year":2005},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":29,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:850ba5b6e7c26848ecc70038649f4fea568a91b58db97d444280c6f3267246ef","observation_id":"2357218a-3a16-48a5-9e87-5504f91794fc","resolution":{"observed_at":"2026-05-23T04:57:34.848355Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Unveiling the ISCAS-85 benchmarks: A case study in reverse engineering","venue":null,"work_id":"122f88f2-896a-442b-8bbd-eb122a01f025","year":1999},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":30,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:3df777844f3f52ac6df7d6a3a5a699da52a46a53cb2bdec6663e2e712fafe9aa","observation_id":"178bf80d-3d22-4634-9b9d-ad35308fa13c","resolution":{"observed_at":"2026-05-23T04:57:34.854802Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"An improved fault simulation approach based on verilog with application to ISCAS 12 benchmark circuits","venue":null,"work_id":"e3978e43-269a-4264-a33e-089f1938a9a1","year":2006},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":31,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:d15998ab51b35c7577c42953c8e3cbd34565c994b8c1ad4cf9464b6913c3363c","observation_id":"1354ec82-7806-48f2-92e6-e9e62ced663d","resolution":{"observed_at":"2026-05-23T04:57:34.879390Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Minimizing partial reconfiguration overhead with fully streaming DMA engines and intelligent ICAP controller","venue":null,"work_id":"581b1c20-c1c8-4ee3-a87b-bee3b2931418","year":2010},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":32,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:7c4e4f68d0cda560c4a0e0d522c16a1bf963293dbf854679d5d2da0b69a4b5b9","observation_id":"b39da61d-e213-465b-88bc-4d08534f1a8a","resolution":{"observed_at":"2026-05-23T04:57:34.882010Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"DyRACT: A partial reconfiguration enabled accelerator and test platform","venue":null,"work_id":"3ca21997-63dd-4057-b1fc-dbdc175732ef","year":2014},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":33,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:68ec55cf7fb238b37ba77f8c35faf35a86bb61dfb13b20cd276e26463bdea14e","observation_id":"7396a6ee-3f66-4db7-bb43-31ddcde99807","resolution":{"observed_at":"2026-05-23T04:57:34.818746Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"ZyCAP: Efficient partial reconfiguration management on the Xilinx Zynq","venue":null,"work_id":"878fcded-df63-4534-adac-2a4386ecf9b8","year":2014},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":34,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:57495324eab0fe144f05ecd65bee758edb2d8085f9a7045911e4178f96b357cb","observation_id":"5715f529-40a3-4fc1-b5b1-e4cc0b0836b8","resolution":{"observed_at":"2026-05-23T04:57:34.822148Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Reducing FPGA compile time with separate compilation for FPGA building blocks","venue":null,"work_id":"9a810b77-9574-4943-aaf1-82c147cf4740","year":2019},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":35,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:03baa0ff63ff573fd1dd9b80c6b0113d6427fa9f215f75a67ccc1cf210c20b62","observation_id":"7483a0f6-41d7-4c7f-89ea-e6789d6bca9a","resolution":{"observed_at":"2026-05-23T04:57:34.831192Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"MiCAP: A custom reconfiguration controller for dynamic circuit specialization","venue":null,"work_id":"0d5e2eb4-a7ce-48b9-aa5c-25a2563ddaef","year":2015},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":36,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:de6b0fc4e6d31193c9924004a9295c1554b32283c60f986543e73c567c7d08e2","observation_id":"79feffc9-faba-4e7c-86fb-fb1fdddb5e5b","resolution":{"observed_at":"2026-05-23T04:57:34.836377Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"MiCAP-Pro: A high speed custom reconfiguration controller for Dynamic Circuit Specialization","venue":null,"work_id":"c97adad8-3483-4779-aff5-51657b2f6187","year":2016},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":37,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:ff878cc304767dc117feb1f91afff2e66e0e9e9feab37e7bc4cd0b3f326a8fd7","observation_id":"622aa37c-5f61-43d7-8d0a-4834b8b186f1","resolution":{"observed_at":"2026-05-23T04:57:34.813091Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"A tiny and multifunctional ICAP con- troller for dynamic partial reconfiguration system","venue":null,"work_id":"df3a1024-52a6-43c5-b053-27feaa9a96ee","year":2017},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":38,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:6bcf214b866ee0f7cf6d403fed4313b5571a11f6663ffe2ea7b8ac65b5ab9c65","observation_id":"af3927dd-4438-4f4c-851d-b48f19944a2c","resolution":{"observed_at":"2026-05-23T04:57:34.809751Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"VR-ZYCAP: a versatile resource-level ICAP controller for ZYNQ SOC","venue":null,"work_id":"cc80ad14-dcf2-4bc8-8667-4f65e029c7a3","year":2021},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":39,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:bf224ea829fa4bf1f751cc51eb3e608583632dab02d0f4c1ca59f42b8472ad2e","observation_id":"64cefb9b-0c63-4f7b-bd97-406e8ce989eb","resolution":{"observed_at":"2026-05-23T04:57:34.828402Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Fast Partial Reconfiguration, XAPP1338 (v1.0)","venue":null,"work_id":"d5b360a1-faeb-49c0-aec1-d53b2ed5b55e","year":2019},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":40,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:1db9f83382f986c8245f85adeffdc3cbe1056be61485ded4098e27071b584fcb","observation_id":"0b63c341-20a1-4522-97bb-da8e2d34c666","resolution":{"observed_at":"2026-05-23T04:57:34.816156Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Cryptkeeper: Improving security with encrypted RAM","venue":null,"work_id":"2ddc2514-a4e1-4450-bdb0-67a2da222baf","year":2010},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":41,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:abb243d9a947ff3194dc475d080001bd334d9568e92cf6b500f404e8e679dfca","observation_id":"bd36e5ff-612b-44b8-8a78-3e525e3e7b2e","resolution":{"observed_at":"2026-05-23T04:57:34.825336Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Memory encryption for general-purpose processors","venue":null,"work_id":"1a176189-a098-45c5-8a22-b64c6e608169","year":2016},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":42,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:d97f64964b1cf3d140e3d69f74095abb7d9801622f3725858bab5819af1b8325","observation_id":"ef9b5e33-0078-4340-80d1-a130cf10c602","resolution":{"observed_at":"2026-05-23T04:57:34.803259Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"An overview of DRAM-based security primitives","venue":null,"work_id":"459dbe88-0d54-4933-bd01-115e9e0cfc8f","year":2018},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":43,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:58013421841e12f26700226850b8788520c4aa820e1af3f69e70eb7d96760b97","observation_id":"7a42bb77-cf28-4755-8503-923ea859e506","resolution":{"observed_at":"2026-05-23T04:57:34.781884Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Isolation design flow effectiveness evaluation methodology for Zynq SoCs","venue":null,"work_id":"0c32f69c-c03a-469a-a483-c69fd1e3c064","year":2020},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":44,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:81e1335689cc7ce95bb02eb2c12db7e02db32f67607b89eb679e94831c4e10ba","observation_id":"d981ec93-ac80-43bd-bfcb-40296413472f","resolution":{"observed_at":"2026-05-23T04:57:34.806267Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Enabling secure and efficient sharing of accelerators in expeditionary systems","venue":null,"work_id":"27f4a3a0-3934-4d9e-83cf-d5d0d8ab4c08","year":2024},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":45,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:121736ede58d1c6a7e816c68097b8c5d8bc4e228999d2f2487ef1c8a224faf3d","observation_id":"00475ece-0e8c-42e6-8ed0-166d3409f1a0","resolution":{"observed_at":"2026-05-23T04:57:34.763003Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":"2503.03877","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Craft: Characterizing and root-causing fault injection threats at pre-silicon","venue":null,"work_id":"0867ed00-e944-4753-a514-15b15695e62f","year":2025},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":46,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:af491c0d07c97c5551e3e1b6d7a4243bfd45f28449e8ef67a06747fe73a37bcb","observation_id":"d1b16040-9bf8-494b-99fd-3056993fd70a","resolution":{"observed_at":"2026-05-23T04:52:34.275076Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Ephemeral Key-based Hybrid Hardware Obfuscation","venue":null,"work_id":"9f7eaac2-a45f-4960-a7ce-0e7ffbae1f3d","year":2022},"citing_paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems","version":3},"reference_index":47,"source":"pdf_text","source_observed_at":"2026-05-23T04:49:00.750151Z"},"links":{"citing_paper":"/paper/2501.16205"},"observation_digest":"sha256:4131bf91736b67c6fb5e0ac705fae4bacc36fd992c0a7985a0a6090c1252ecfd","observation_id":"64170d92-29a0-441a-a0b3-3edaeb66dab1","resolution":{"observed_at":"2026-05-23T04:57:34.771475Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}}],"paper":{"arxiv_id":"2501.16205","last_updated":"2025-05-06T16:37:03Z","latest_version":3,"primary_category":"cs.DC","snapshot_observed_at":"2026-08-03T14:18:03.063166Z","submitted_at":"2025-01-27T16:58:33Z","title":"EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems"},"reference_resolution":{"displayed":47,"state_counts":{"malformed_identifier":0,"metadata_mismatch":1,"parse_uncertain":0,"unresolved":1,"verified_exact":1,"verified_fuzzy":44},"total_outbound_references":47},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"thesis":"As of 5 August 2026, this Paper Citation Record lists 47 of 47 outbound references and 1 inbound Pith citation observation for arXiv:2501.16205."}