{"as_of":"2026-08-08T08:32:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:4256f60df7e085be26085293b3e0d173385e171167ce6e51ef8fc3d991437c67","coverage":[{"denominator":12,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":12,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-07T11:29:56.636535Z","state":"measured"},{"denominator":12,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":12,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-08T06:32:00.761636+00:00","state":"measured"},{"denominator":0,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"cited_works","source_observed_at":null,"state":"measured"}],"external_citation_measurements":[],"inbound":[],"links":{"evidence":"/evidence","html":"/paper/2506.02233/citation-record","integrity":"/paper/2506.02233/integrity","json":"/paper/2506.02233/citation-record.json","paper":"/paper/2506.02233"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:57.085483Z","title":"https://learn.arm.com/ learning-paths/servers-and-cloud-computing/ran/, RAL library for various vector processing technologies","venue":null,"work_id":"f0361b91-0588-439e-aaae-c25d31350ac7","year":null},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.547031Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:1dd70db649eecf936ee5debab4121691a346cb481afb912b9991c7db060b6c61","observation_id":"3c5b20d3-a0c3-4f93-938f-a291f4a9ce9f","resolution":{"observed_at":"2026-08-07T11:29:57.090970Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:57.065035Z","title":"https://developer.arm","venue":null,"work_id":"583109f4-cac3-4478-9d1d-02e361820cf3","year":null},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.553433Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:e292bc6810ce58903659558c6221245edd9a9adf5b4a45cf01d04e371e8467dc","observation_id":"bf0452f7-490f-4660-bd8c-0f7f602b3e6b","resolution":{"observed_at":"2026-08-07T11:29:57.071909Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:57.035523Z","title":"https://developer.arm.com/documentation/109246/ 0100/SME-Overview/Streaming-SVE-mode","venue":null,"work_id":"446741c5-5fa3-4aa4-bdbc-8a9b443ec83c","year":null},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.561383Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:fecd22d75cb32f3ab55033b2b7c148f1fdf7cac5f3e28b4e077d705f380b48b1","observation_id":"69dfb3ec-9430-44ee-a816-92279ab69f34","resolution":{"observed_at":"2026-08-07T11:29:57.042154Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:57.008981Z","title":null,"venue":null,"work_id":"babeb9ac-1a28-4165-a44a-dd7078af5372","year":null},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.575583Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:20f632618f458ee4256ceacf07771dce63f39bd00b9357e3223ff5eab1275302","observation_id":"8f1b800a-58a2-4104-a640-0b928c4e2517","resolution":{"observed_at":"2026-08-07T11:29:57.015522Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:56.582520Z","title":"Kistowski, J.: Spec cpu2017: Next-generation compute benchmark","venue":null,"work_id":null,"year":2018},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.582520Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:eb9171d39f06f12e28d2e0e3c01a404aca0e93dd3f2d9c66dc85c9274da7a595","observation_id":"c9ea01ba-c4a4-4061-98bb-881db6c278ae","resolution":{"observed_at":"2026-08-07T11:29:56.582520Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:56.986640Z","title":"https://github.com/skeeto/ mandel-simd","venue":null,"work_id":"729ccb60-59f3-49de-8c83-30dd58744a4b","year":null},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.592226Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:c2268bf948f3417d356d93f776fd63f0cf8c130fba8bb90dd3632d8569047c6f","observation_id":"7e2ee437-aa2b-476d-a4f6-0c83a953f85c","resolution":{"observed_at":"2026-08-07T11:29:56.992677Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2002.11054","last_updated":"2020-03-01T00:38:46Z","snapshot_observed_at":"2026-07-06T09:00:04.280961Z","submitted_at":"2020-02-25T17:24:50Z","title":"MLIR: A Compiler Infrastructure for the End of Moore's Law","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2002.11054","snapshot_observed_at":"2026-08-07T11:29:56.600962Z","title":null,"venue":null,"work_id":null,"year":2020},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.600962Z"},"links":{"cited_paper":"/paper/2002.11054","citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:1c071920c4de790510ddad5fbbc4ad8f9a85a731f33b1b776dbe2d8975244f12","observation_id":"1560df72-affb-4e3c-b09f-8cf44e6b29ee","resolution":{"observed_at":"2026-08-07T11:29:56.600962Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:56.964734Z","title":"https://github.com/llvm/llvm-project/blob/ llvmorg-20.1.5/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, Stack hazards for GPR and FPR","venue":null,"work_id":"bec0d0ad-6213-4c8c-a8e9-e45ead7a7cf3","year":null},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.610108Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:a0ccb723fecb73aaf9ec2663b65a203adc117cbc8e44d075d78e2c6e7d245364","observation_id":"073fcf9c-49b8-4619-b3f5-68e0643ab271","resolution":{"observed_at":"2026-08-07T11:29:56.973290Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":"10.1109/pact","metadata_source":"doi_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:56.676425Z","title":"In: 2011 International Conference on Parallel Architectures and Compilation Techniques","venue":null,"work_id":"aad41e65-da51-4650-a2ad-e0e2d8db3d2d","year":2011},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.616887Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:1301b6259e81d4a4e01644991692daa84cd2d0222e907b944b28c965e3532bdc","observation_id":"c27e2a55-1402-4941-8ce9-48bc6238267f","resolution":{"observed_at":"2026-08-07T11:29:56.687260Z","resolver_source":"doi_truncated","status":"malformed_identifier"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:56.946950Z","title":"In: Proceedings of the ACM International Conference on Parallel Ar- chitectures and Compilation Techniques","venue":null,"work_id":"f4656213-4a6b-46c3-86e7-a497f81a23a6","year":2021},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.622563Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:dd72f5b6a3b6d4bf2e21943bf5925216440ae5d5f2a06794ce80fcfd1ed44ec0","observation_id":"192a7935-a2a5-41e1-a3d2-2e655812c245","resolution":{"observed_at":"2026-08-07T11:29:56.951750Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:56.927914Z","title":"https://llvm.org/devmtg/2021-11/slides/2021- OptimizingCodeForScalableVectorArchitectures.pdf","venue":null,"work_id":"f01ed718-a0b3-46e8-827e-6995be009d14","year":2021},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.630420Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:6b3a1c08e015e96abe114ce58154d9ba2f6551eeba1bf4260427cc616ceaf13b","observation_id":"e3220d1f-a88a-473b-acdd-77adec19aab9","resolution":{"observed_at":"2026-08-07T11:29:56.933540Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T11:29:56.636535Z","title":"In: 2022 IEEE/ACM International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS) (2022)","venue":null,"work_id":null,"year":2022},"citing_paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-08-07T11:29:56.636535Z"},"links":{"citing_paper":"/paper/2506.02233"},"observation_digest":"sha256:7f874eee72ccbf69c84a56f1e59ee778fd7bcd7d8e334f9aec093b441029bea3","observation_id":"b37ffd02-188d-408b-8afa-bb7b6e14a287","resolution":{"observed_at":"2026-08-07T11:29:56.636535Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}}],"paper":{"arxiv_id":"2506.02233","last_updated":"2025-06-02T20:24:32Z","latest_version":1,"primary_category":"cs.PL","snapshot_observed_at":"2026-08-07T11:25:34.089226Z","submitted_at":"2025-06-02T20:24:32Z","title":"Improving compiler support for SIMD offload using Arm Streaming SVE"},"reference_resolution":{"displayed":12,"state_counts":{"malformed_identifier":1,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":4,"verified_exact":0,"verified_fuzzy":7},"total_outbound_references":12},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-08T06:32:00.761636+00:00","source":"crossref"},{"observed_at":"2026-08-08T06:31:55.24221+00:00","source":"retraction_watch"}],"thesis":"As of 8 August 2026, this Paper Citation Record lists 12 of 12 outbound references and 0 inbound Pith citation observations for arXiv:2506.02233."}