{"as_of":"2026-08-05T22:53:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:8f41bc6bc8bbfd68b088aba037859acf44c3265a7c8c0fab5f653a8b4577cc84","coverage":[{"denominator":27,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":27,"source":"paper_references, paper_reference_links","source_observed_at":"2026-05-10T18:13:24.729237Z","state":"measured"},{"denominator":27,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":27,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-05T06:32:48.257954+00:00","state":"measured"},{"denominator":0,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"cited_works","source_observed_at":null,"state":"measured"}],"external_citation_measurements":[],"inbound":[],"links":{"evidence":"/evidence","html":"/paper/2604.06955/citation-record","integrity":"/paper/2604.06955/integrity","json":"/paper/2604.06955/citation-record.json","paper":"/paper/2604.06955"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Attention is all you need","venue":null,"work_id":"33c315d8-1c4d-47ad-b05a-574940d7d2fd","year":2017},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:777086ad899e83ec02a8bfe9f076481ea1ef0d501a3d3c42a967e1451ecc1648","observation_id":"9648219c-0a6b-4eae-9ff5-8556d38a8acc","resolution":{"observed_at":"2026-05-17T06:29:11.215617Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Efficient memory management for large language model serving with pagedattention","venue":null,"work_id":"5a26e144-58ae-498d-a72a-f044a77d6952","year":2023},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:e747b43ddbd5d4f550b5acf0893b2327fc91711dea6a0ff0556bfe47d09eb764","observation_id":"54dea64e-3b13-4dce-a272-d9b84c5dbb73","resolution":{"observed_at":"2026-05-17T06:29:11.206080Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"1911.02150","last_updated":"2019-11-06T00:19:05Z","snapshot_observed_at":"2026-07-06T08:35:01.386074Z","submitted_at":"2019-11-06T00:19:05Z","title":"Fast Transformer Decoding: One Write-Head is All You Need","version":1},"cited_work":{"arxiv_id":"1911.02150","doi":"10.48550/arxiv.1911.02150","metadata_source":"pith","pith_arxiv_id":"1911.02150","snapshot_observed_at":"2026-08-05T02:28:24.338817Z","title":"Fast Transformer Decoding: One Write-Head is All You Need","venue":"cs.NE","work_id":"160ea164-b1d4-4adb-8ccb-a4655d8a0bb4","year":2019},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"cited_paper":"/paper/1911.02150","citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:a71e19351c88b1525a97f9090be159b536f30ff36cb836a69b3f2acfb5881448","observation_id":"e1709431-cf10-4a07-ba2c-4a895608eff3","resolution":{"observed_at":"2026-05-11T05:16:04.775248Z","resolver_source":"local_arxiv","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"GQA: Training generalized multi-query transformer models from multi-head checkpoints","venue":null,"work_id":"ed77e376-6705-4be5-8d08-d51da9e43f51","year":2023},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:464cb1330e6743b032ecc7677a124a5e3011f973ba68ad0124ed3cd3eb6606b7","observation_id":"b3b40680-62a7-4ff1-9355-5ab409d3c356","resolution":{"observed_at":"2026-05-17T06:29:11.209492Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2412.15115","last_updated":"2025-01-03T02:18:21Z","snapshot_observed_at":"2026-07-06T02:11:23.670680Z","submitted_at":"2024-12-19T17:56:09Z","title":"Qwen2.5 Technical Report","version":2},"cited_work":{"arxiv_id":"2412.15115","doi":"10.1145/3581783.3612503","metadata_source":"pith","pith_arxiv_id":"2412.15115","snapshot_observed_at":"2026-08-05T02:28:24.338817Z","title":"Qwen2.5 Technical Report","venue":"cs.CL","work_id":"d8432992-4980-4a81-85c7-9fa2c2b87f85","year":2024},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"cited_paper":"/paper/2412.15115","citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:215c72eaa9244ffeb500253c8e2b4656b4a61476165106a48224c90837240a2f","observation_id":"0bbe51b8-b73c-4db4-ab1f-e1bb18e858b3","resolution":{"observed_at":"2026-05-11T05:16:04.793808Z","resolver_source":"local_arxiv","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2407.21783","last_updated":"2024-11-23T23:27:33Z","snapshot_observed_at":"2026-07-06T18:55:11.576666Z","submitted_at":"2024-07-31T17:54:27Z","title":"The Llama 3 Herd of Models","version":3},"cited_work":{"arxiv_id":"2407.21783","doi":"10.1016/s0749-0720(15","metadata_source":"pith","pith_arxiv_id":"2407.21783","snapshot_observed_at":"2026-07-11T11:50:26.030339Z","title":"The Llama 3 Herd of Models","venue":"cs.AI","work_id":"1549a635-88af-4ac1-acfe-51ae7bb53345","year":2024},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"cited_paper":"/paper/2407.21783","citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:51d446757031f5425d1f72cfd3d92f8c8450822d2e1dfa9e4e5a996cea1aa7b5","observation_id":"a2749ecb-7e2e-49fd-9fa1-ff4f7eab00e8","resolution":{"observed_at":"2026-05-11T05:16:04.787292Z","resolver_source":"local_arxiv","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Timeloop: A systematic approach to dnn accelerator evaluation","venue":null,"work_id":"1158e3d6-427d-4742-98aa-90b8e4fc63b9","year":2019},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:1fadc6e2c85f1d4f09e3655c1b452ee0b4719c62b60014581a8e9193c66bf33b","observation_id":"3f9eb41c-f66e-47a2-a8c3-0efb4d696903","resolution":{"observed_at":"2026-05-17T06:29:11.212843Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Maestro: A data-centric approach to understand reuse, performance, and hardware cost of dnn mappings","venue":null,"work_id":"2871240d-1814-411e-8241-27222fafa7cb","year":2020},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:8af9b089d45b0c901899013aafc385a9a85e0a9c6350b18ca7dae8dbb1ac9b76","observation_id":"02fb15c3-d090-4236-be13-46abff776cd5","resolution":{"observed_at":"2026-05-17T06:29:11.218695Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Accelergy: An architecture-level energy estimation methodology for accelerator designs","venue":null,"work_id":"b708df7d-55bb-4695-b090-f5518ad221b0","year":2019},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:4400d8a0c642f690ade5aca3ec3cffcd51d2c7079af19ea1f025fd9f3c687742","observation_id":"820b9d85-8e91-479e-a21b-b55ca5f9d68d","resolution":{"observed_at":"2026-05-17T06:29:11.221616Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Banked scratch-pad memory manage- ment for reducing leakage energy consumption","venue":null,"work_id":"58513d3c-74f2-4dbb-b6f7-18d06152cb10","year":2004},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:3ef0625ce43f450f65ba826246d20dc30e221784f5f5fbec9a181774bdffb2a7","observation_id":"ef866d9d-608d-44eb-a311-7b31b7b77b3f","resolution":{"observed_at":"2026-05-17T06:29:11.224695Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"DESCNet: Developing efficient scratchpad memories for capsule network hardware","venue":null,"work_id":"345381e3-7dde-4810-babc-62e65ad4e0bb","year":2021},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:e799827fbd7a0ff074098cf3d6feb679d70b7fd5be5ed2a6a1e0c9ecbec4b981","observation_id":"c5b7f0bc-be57-45cd-ba6d-5877974d4a74","resolution":{"observed_at":"2026-05-17T06:29:11.170606Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Drowsy caches: simple techniques for reducing leakage power","venue":null,"work_id":"a1d8d5e5-5853-4a32-bf9b-c1be175c60fd","year":2002},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:9890cf9337364d1f1cddd51a3f847dacfbeb47c32830314797ad0785560e5928","observation_id":"ac43981a-deca-4e4a-8add-2fb2471cb5f6","resolution":{"observed_at":"2026-05-17T06:29:11.173778Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Cache decay: exploiting genera- tional behavior to reduce cache leakage power","venue":null,"work_id":"62ba8923-7d12-4724-a72b-581af44d33da","year":2001},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":13,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:f0f4916ad77c2e41e193bdaa1f99d2ca4eec81cb351f1d5274652b282b9a97ed","observation_id":"8af1f27f-4c35-4363-add7-e174f685d27e","resolution":{"observed_at":"2026-05-17T06:29:11.201307Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Exploring the limits of leakage power reduction in caches","venue":null,"work_id":"2eb08ee0-115d-4e3c-bbe3-ffa281af7777","year":2005},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":14,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:accd1a535096f59b6a4955f38d0a59f49619451e9172d9388bfa522fcf544d62","observation_id":"92a9b646-97af-4458-98d5-8f708b46d8e3","resolution":{"observed_at":"2026-05-17T06:29:11.177257Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Managing static leakage energy in micro- processor functional units","venue":null,"work_id":"b959ede6-cc4d-4f96-8d42-3112fd5ae1bf","year":2002},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":15,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:738e1a3b02dcf5ce9655ced40fdcfd9048205fe88a1821b7a26d3e095cfa0c35","observation_id":"6b3b2ddc-6722-4514-9a0b-03b043ad5996","resolution":{"observed_at":"2026-05-17T06:29:11.197815Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Cacti 7: New tools for interconnect exploration in innovative off-chip memories","venue":null,"work_id":"907acda5-df4c-4940-8468-68bacffe5566","year":2017},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":16,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:759a9f4aacb3fd887e46f5418654f68c0ee12e762bfe96cd06bbac8771ae36ab","observation_id":"7c529230-dc8e-40fe-af14-77de6cd62996","resolution":{"observed_at":"2026-05-17T06:29:11.154871Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Cacti-p: Architecture-level modeling for sram- based structures with advanced leakage reduction techniques","venue":null,"work_id":"6af1c903-488d-46a5-8e7a-3765c7fc5475","year":2011},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":17,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:5a00269b47d766ca35667303c3ca0a6d2e84f901d5b592430f8183da396f028f","observation_id":"f24353b0-2f0c-4bb3-a7c4-2f7901595570","resolution":{"observed_at":"2026-05-17T06:29:11.147072Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"DOTA: detect and omit weak attentions for scalable transformer acceleration","venue":null,"work_id":"ff6e6637-6e23-46e1-bdfb-f76987f247da","year":2022},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":18,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:e9654c3bfa585c450d8ce6a42f9cad8b14c31a1c74c44b672c100f5a22c3c163","observation_id":"9b358924-c06e-4c0e-981e-e32cc3cdc4f2","resolution":{"observed_at":"2026-05-17T06:29:11.167095Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"ELSA: Hardware-software co-design for efficient, lightweight self-attention mechanism in neural networks","venue":null,"work_id":"5c020256-1695-417a-9482-e28f225e8517","year":2021},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":19,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:f2a9b26466caa7294d633577657611526e3becc64a90a8228dbcbdd23ddcfdf5","observation_id":"c42432e7-a205-483e-af38-deffa03bed7a","resolution":{"observed_at":"2026-05-17T06:29:11.183951Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Swifttron: An efficient hardware accel- erator for quantized transformers","venue":null,"work_id":"131bab0d-a67a-4c18-b640-4d640c6d387c","year":2023},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":20,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:345df6358c562aa1e2c88d57c1073200bec677d26b8fcab395ea5b00fbd84957","observation_id":"fe0c91d9-d099-4ba9-8113-36aa53d412ff","resolution":{"observed_at":"2026-05-17T06:29:11.180751Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Sofa: A compute-memory optimized sparsity accelerator via cross-stage coordinated tiling","venue":null,"work_id":"2e464fbd-34d0-44a4-9457-5f888a06f2b3","year":2024},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":21,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:dbcd96057067634c4cf293fc4b170219bc70eccdc756efb8120275d80c9044f3","observation_id":"7fddd20f-de40-4ee4-9d38-a8284abf62e1","resolution":{"observed_at":"2026-05-17T06:29:11.163208Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Stonne: Enabling cycle-level microarchitectural simulation for dnn inference accelerators","venue":null,"work_id":"aa4ee66d-45b9-43df-9886-de87d7c6804b","year":2021},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":22,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:52b2af95c6c757e9f4c004dbc71db911a9398e4c9b170af66c9411952298d56f","observation_id":"7cc45702-2721-4a95-a86c-2d392ee995d9","resolution":{"observed_at":"2026-05-17T06:29:11.187001Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"LLMCompass: Enabling efficient hardware design for large language model inference","venue":null,"work_id":"1cd33455-71e6-411f-835e-c2561578bbae","year":2024},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":23,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:e08631497fe81a11f3bf53d4031ad4137abd20f25432d258f33accca6fb307d7","observation_id":"1783dd02-aff2-4ade-88cc-fae4e1abb1c8","resolution":{"observed_at":"2026-05-17T06:29:11.150766Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2407.12736","last_updated":"2025-06-10T18:33:53Z","snapshot_observed_at":"2026-07-06T18:47:56.109836Z","submitted_at":"2024-07-17T16:56:06Z","title":"CHOSEN: Compilation to Hardware Optimization Stack for Efficient Vision Transformer Inference","version":4},"cited_work":{"arxiv_id":"2407.12736","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2407.12736","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Chosen: Compilation to hardware optimization stack for efficient vision transformer inference","venue":null,"work_id":"22ea5ed0-2245-48f2-9a20-913ac7dcc981","year":2024},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":24,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"cited_paper":"/paper/2407.12736","citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:1b2f110270af1e1c86a3cf62cfce551fab3637901ef9f128e1f7f20b02555d7f","observation_id":"30cafe6b-edaa-4520-9cca-8f74efe2a099","resolution":{"observed_at":"2026-05-11T05:16:04.781127Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Transinfersim: Toward fast and accurate evaluation of embedded hardware accelerators for transformer networks","venue":null,"work_id":"ed900912-148a-4c55-853e-4f9dccc43aa3","year":2025},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":25,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:e1d149bdac3b167cac751c8a02e4fd019f4da59024addbc4dc3f1f1236d06615","observation_id":"15abc48f-d649-4036-a11d-47e442005cbd","resolution":{"observed_at":"2026-05-17T06:29:11.193603Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Language models are unsupervised multitask learners","venue":null,"work_id":"d6d51262-f5d8-4051-8db2-33d37590ec9e","year":2019},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":26,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:c10d9d452985820275d8e8b7d0e9a3830700dc28886541319fef16a734a0a7d4","observation_id":"5aba83d7-4fd2-4919-9c66-4a4d4d73f438","resolution":{"observed_at":"2026-05-17T06:29:11.190291Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Deepseek-r1 incentivizes reasoning in llms through reinforcement learning","venue":null,"work_id":"d75fe4b3-f14e-47bc-b36c-1336b89440ca","year":2025},"citing_paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference","version":1},"reference_index":27,"source":"pdf_text","source_observed_at":"2026-05-10T18:13:24.729237Z"},"links":{"citing_paper":"/paper/2604.06955"},"observation_digest":"sha256:2ea14c16f374a4ac305e8802bba972775f45adaa659dca2c1a66f90daec9931f","observation_id":"61bb3109-4a76-44ba-bda5-6d3e08cedab6","resolution":{"observed_at":"2026-05-17T06:29:11.159036Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-05T06:32:48.257954+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"state":"measured"}}],"paper":{"arxiv_id":"2604.06955","last_updated":"2026-04-08T11:15:52Z","latest_version":1,"primary_category":"cs.AR","snapshot_observed_at":"2026-08-02T21:38:54.234747Z","submitted_at":"2026-04-08T11:15:52Z","title":"TRAPTI: Time-Resolved Analysis for SRAM Banking and Power Gating Optimization in Embedded Transformer Inference"},"reference_resolution":{"displayed":27,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":0,"verified_exact":4,"verified_fuzzy":23},"total_outbound_references":27},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-05T06:32:48.257954+00:00","source":"crossref"},{"observed_at":"2026-08-05T06:32:44.755628+00:00","source":"retraction_watch"}],"thesis":"As of 5 August 2026, this Paper Citation Record lists 27 of 27 outbound references and 0 inbound Pith citation observations for arXiv:2604.06955."}