{"as_of":"2026-08-07T08:23:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:9694fb51b2553996942c25c7038ce2f8c34f424bc5420c7c222cc2e2ea63fd9d","coverage":[{"denominator":25,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":25,"source":"paper_references, paper_reference_links","source_observed_at":"2026-05-10T04:28:31.416096Z","state":"measured"},{"denominator":25,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":25,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-07T06:34:17.273281+00:00","state":"measured"},{"denominator":0,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"cited_works","source_observed_at":null,"state":"measured"}],"external_citation_measurements":[],"inbound":[],"links":{"evidence":"/evidence","html":"/paper/2604.17692/citation-record","integrity":"/paper/2604.17692/integrity","json":"/paper/2604.17692/citation-record.json","paper":"/paper/2604.17692"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"09260dfe-3db2-4ec8-937e-a20aea8e67d6","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:d3d5b8bc77e754d8c5d71bdc5e0bbe8e0f7a4446d6551924cf7a72e090c3acf1","observation_id":"089b9f32-b58c-4c88-ab36-014f9028671c","resolution":{"observed_at":"2026-05-22T05:16:07.065464Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-07-05T13:11:06.620017Z","title":null,"venue":null,"work_id":"6e5fbff2-00cb-473e-9804-4d83c8544520","year":2020},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:ca9bd70f99321c909f4c82515fcab6e901d92612a1f3a26ee8a3fe307a980bfd","observation_id":"fe61350d-109b-48fc-8d85-0fca407e4ce1","resolution":{"observed_at":"2026-05-22T05:16:07.068408Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"a2052eed-3e60-43f1-8355-64ed50b86a07","year":2023},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:7f5f60cb8942e1a40d6bdd3d75da539c696954eb6ff7384f80698fe47da926e1","observation_id":"26d89013-3c85-4eec-aefa-dbc053c7fb1b","resolution":{"observed_at":"2026-05-22T05:16:07.041702Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"a81afbd0-2d48-4cc7-8d34-f6dbd438c6b9","year":2023},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:998f9f11e535ccf7aeaf1af03a533e86716a6c59a6d7fcb182413a1294a6ab08","observation_id":"9fa7e774-e8b7-47be-be67-c9db716378e9","resolution":{"observed_at":"2026-05-22T05:16:07.062806Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"256a0a7a-91ed-480e-9c1d-ed7bff726578","year":2025},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:37bf70d95a43010e74b6537c4a06da801368118804e1527fc41f775dae0e6fd9","observation_id":"3ed83df4-08bd-42d9-bac4-9785e85109b4","resolution":{"observed_at":"2026-05-22T05:16:07.051773Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"2024.Corsair","venue":null,"work_id":"da4261de-116b-4fdc-a120-fce500fd85c7","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:ea2dc9eb32d5696c6df2e2f51e8149f9d43ffee26e8b0571467800d099b6e332","observation_id":"4406a45f-3e60-46c3-9056-2946afecadc6","resolution":{"observed_at":"2026-05-22T05:16:07.048521Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-07-09T08:16:06.526490Z","title":null,"venue":null,"work_id":"6d35d3b2-5bfb-470a-8771-9513c607d8b6","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:637e11371fd43e2203bf93ed8dc8c28049f678a00900ea86cd3144c3e629cf53","observation_id":"ec04e11c-bd6e-4aaf-bbea-9287dea60fda","resolution":{"observed_at":"2026-05-22T05:16:07.045213Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"e15dbe17-fbf8-4cd7-a58d-4a183fb2b28f","year":2022},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:b927cea4e54f0bdd2ce14c5fbb639571de6a03272fb3f817a37a0af7e7c7cb14","observation_id":"98ea6d3c-833a-4c48-8d57-021005b85969","resolution":{"observed_at":"2026-05-22T05:16:07.054869Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"fe3cfa41-bea7-405d-9d4f-e6a22678f63e","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:491a823f7fa09aaa3bfa164e0826ad7e4cbb99519d5ca3c66a0f28515be00732","observation_id":"ad60134e-ca3f-494d-84a0-3d58a1f779af","resolution":{"observed_at":"2026-05-22T05:16:07.074289Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"5cefbb23-17b2-48f0-8bc8-753236adc8bc","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:2676812d6050a75263c9af5a8e38a5377cedecad0ced025a86e47457386a5a33","observation_id":"504b4c17-21a3-4850-b57e-a463682c47b5","resolution":{"observed_at":"2026-05-22T05:16:07.039082Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"2024.HaloDrive TM30","venue":null,"work_id":"4531a89e-3d8a-403b-a0cf-5a894398e4a9","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:4e55eeb79878a0d7c37c2ed5853164457843f6cb1eba6ac898d25f9a36c24997","observation_id":"81eb888d-a78d-41fd-afe8-57eca47c6787","resolution":{"observed_at":"2026-05-22T05:16:07.057568Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"2025.CIAL-CIMCompiler","venue":null,"work_id":"a88d7a40-4e27-4795-b374-0b10f1132c12","year":2025},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:58072ea75a1bc76aa19810861117db2c6b548e7cb165229d5dbd986e8dca289c","observation_id":"d5326792-13e1-4233-8fcb-8442c7525f19","resolution":{"observed_at":"2026-05-22T05:16:07.060226Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"a6ad4a32-514a-4982-a42a-2edd70c17b76","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":13,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:1d5e15a533f28c561198a64621565a8ab5973ce687f90bf8e53b9f3798334a0f","observation_id":"8a9bc9ff-9282-47f3-8cd6-42cfc930fda2","resolution":{"observed_at":"2026-05-22T05:16:07.071252Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"37216d79-a216-445c-80a0-990a83004236","year":2021},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":14,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:8e98296896d9cdc01d8707a58b627ed697c04e156339a2ab0d0e3248dad30571","observation_id":"c7d8e985-a9e6-4875-9188-528976d6c3ec","resolution":{"observed_at":"2026-05-22T05:16:07.098328Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2505.01107","last_updated":"2025-05-02T08:38:30Z","snapshot_observed_at":"2026-08-01T21:53:26.914995Z","submitted_at":"2025-05-02T08:38:30Z","title":"CIMFlow: An Integrated Framework for Systematic Design and Evaluation of Digital CIM Architectures","version":1},"cited_work":{"arxiv_id":"2505.01107","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2505.01107","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"45435b21-ff13-4d7d-8865-9ecbf1f18361","year":2025},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":15,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"cited_paper":"/paper/2505.01107","citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:24064ac15c5eff78bbfc3897ceb61edb73e5d82d852cfea1f6749839ae8c70af","observation_id":"0201e22d-649b-4d59-85ae-d01028ad9789","resolution":{"observed_at":"2026-05-11T11:56:20.025955Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"f1d5c046-6add-41a9-b119-606b88964aab","year":2025},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":16,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:c06a723a6628959be32209236d5194ba45715b457753b6c7d2f30691b3561ec9","observation_id":"f236e4ea-8255-4350-b573-1bff1a3625ff","resolution":{"observed_at":"2026-05-22T05:16:07.080698Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":"9657.2024","doi":"10.1109/isscc49657.2024","metadata_source":"arxiv_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-05T02:28:24.338817Z","title":"In: 2024 IEEE International Solid-State Circuits Conference (ISSCC)","venue":null,"work_id":"abcef84d-db7c-4667-88b0-155999d7df30","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":17,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:b49d8acfb4342bfa548653a0f444b7431a4b6838ebcaa1abb68a1f0ded89ba81","observation_id":"3a8f5574-1da8-4906-b845-c88aae46db7c","resolution":{"observed_at":"2026-05-10T04:30:15.111303Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"815ffc09-6a33-48bb-9c85-4b71634d73bb","year":2023},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":18,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:fb20330eaf6708fc678af865f72bdd97c14375d1384b345bde7163bbd763bb41","observation_id":"74deca44-d297-4a0f-965c-ed61999449c1","resolution":{"observed_at":"2026-05-22T05:16:07.101137Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"29db2050-5c06-4fcb-8074-329232e57b8e","year":2025},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":19,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:45e7e84dd5ba4dcd2c583ba42217b80855eb6bfa657b234db4b1337e146ab4cc","observation_id":"e9f34441-5560-4fec-97d8-d764684684a4","resolution":{"observed_at":"2026-05-22T05:16:07.095128Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"f116d4cc-c373-4300-9348-8881624c4a68","year":2025},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":20,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:0fecd4ade37af76fae8bfe548a583cd69228abc601934375c01f298d3576a6ac","observation_id":"f31d22b9-2464-4ba2-83b9-0ab19d701c90","resolution":{"observed_at":"2026-05-22T05:16:07.083376Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2505.09388","last_updated":"2025-05-14T13:41:34Z","snapshot_observed_at":"2026-07-06T02:11:23.670680Z","submitted_at":"2025-05-14T13:41:34Z","title":"Qwen3 Technical Report","version":1},"cited_work":{"arxiv_id":"2505.09388","doi":"10.1016/j.aiopen.2022.12","metadata_source":"pith","pith_arxiv_id":"2505.09388","snapshot_observed_at":"2026-07-11T11:50:26.030339Z","title":"Qwen3 Technical Report","venue":"cs.CL","work_id":"25a4e30c-1232-48e7-9925-02fa12ba7c9e","year":2025},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":21,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"cited_paper":"/paper/2505.09388","citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:26a5a5bd6b88c61e54e6c19c37dab3789df591940b7b6817b43c43230f4559cc","observation_id":"09c84457-004e-44f8-b959-3ab0393371e7","resolution":{"observed_at":"2026-05-11T11:56:20.119179Z","resolver_source":"local_arxiv","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"7ff28541-f107-4678-ade1-32d87c9e09a0","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":22,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:a69c249cb3a11a80a0826bbfe91d8adf946cfadd7a088c6667d96b82915dada0","observation_id":"8e0a651a-da23-4b79-a449-a7ecd0304228","resolution":{"observed_at":"2026-05-22T05:16:07.077358Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"e09954d2-c184-4b65-8619-b236fd226e5e","year":2024},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":23,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:bf2785043fb58f650d5689e9278ffefe6e5aae122cdf8a73b8628715710e8074","observation_id":"ba7387ad-b959-41e6-b0a5-b95c655903c5","resolution":{"observed_at":"2026-05-22T05:16:07.092133Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"0262acef-1713-4ecb-a60e-2146093fdf2c","year":2025},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":24,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:9bbb523d88e416a0832c7de18cbaf0a316c5c228ee11d2a89e602bb5b164bde8","observation_id":"22801c8c-cbf5-4932-a141-c28d62d1e9cc","resolution":{"observed_at":"2026-05-22T05:16:07.086141Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":null,"venue":null,"work_id":"5065f342-557b-40e0-860d-13275cd9eae7","year":2023},"citing_paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator","version":1},"reference_index":25,"source":"pdf_text","source_observed_at":"2026-05-10T04:28:31.416096Z"},"links":{"citing_paper":"/paper/2604.17692"},"observation_digest":"sha256:f371260070bf3bd88c03fcfe6ced8b8b3e2ecf0c76def3bb340611a28abd2c4b","observation_id":"26cd0e3a-2cf7-4dc3-bc26-f2915417d928","resolution":{"observed_at":"2026-05-22T05:16:07.089268Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"state":"measured"}}],"paper":{"arxiv_id":"2604.17692","last_updated":"2026-04-20T01:14:43Z","latest_version":1,"primary_category":"cs.AR","snapshot_observed_at":"2026-08-04T01:43:37.187276Z","submitted_at":"2026-04-20T01:14:43Z","title":"AccelCIM: Systematic Dataflow Exploration for SRAM Compute-in-Memory Accelerator"},"reference_resolution":{"displayed":25,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":19,"verified_exact":3,"verified_fuzzy":3},"total_outbound_references":25},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-07T06:34:17.273281+00:00","source":"crossref"},{"observed_at":"2026-08-07T06:34:11.927384+00:00","source":"retraction_watch"}],"thesis":"As of 7 August 2026, this Paper Citation Record lists 25 of 25 outbound references and 0 inbound Pith citation observations for arXiv:2604.17692."}