{"as_of":"2026-08-20T15:22:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:c855db4ef2411b3747b25cce124451899e8b4d40bd60557d9ca88460fb75811a","coverage":[{"denominator":15,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":15,"source":"paper_references, paper_reference_links","source_observed_at":"2026-06-25T19:39:19.171282Z","state":"measured"},{"denominator":15,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":15,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-20T06:33:59.587034+00:00","state":"measured"},{"denominator":0,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"cited_works","source_observed_at":null,"state":"measured"}],"external_citation_measurements":[],"inbound":[],"links":{"evidence":"/evidence","html":"/paper/2606.25562/citation-record","integrity":"/paper/2606.25562/integrity","json":"/paper/2606.25562/citation-record.json","paper":"/paper/2606.25562"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Medical image segmentation review: The success of u-net,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:c737a62416c95eef47e486cd8d72887ee7ce9f2bf1099395e68b6f0a53cee05d","observation_id":"f4763cd4-a30b-4553-a559-cf642b952cb6","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Efficient hardware design of a deep u-net model for pixel-level ecg classification in healthcare device,","venue":null,"work_id":null,"year":2022},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:56dafc484672d6aa19f0e6dcd18b76d3056b1b0dc7a47be975ffa7ceddf0247a","observation_id":"db6e5c8e-8054-4a44-a426-5606365b2acb","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Review of neural network model acceleration techniques based on fpga platforms,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:6748bef1fc320cc5ddb1b3c912daa1ff2887254fe035649d6647740d9623426f","observation_id":"b03e505c-fad8-4dcf-809b-e789658ba6ee","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Appq-cnn: An adaptive cnns inference accelerator for syn- ergistically exploiting pruning and quantization based on fpga,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:b01c4099cea5183b88cfbaa6ad47e9cd9eb376ba42501b6ef4bd29a8dcefcd72","observation_id":"4583959b-dcfc-4291-8fa7-05f70aba286c","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Bitmac: Bit-serial computation- based efficient multiply-accumulate unit for dnn accelerator,","venue":null,"work_id":null,"year":2022},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:bfb1a732ee6746b664112eb2f1eaa82f707909dedfc97745daa9e1534255d977","observation_id":"ccef20cd-8668-48df-a9e7-cf8822f28a2d","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Bitcluster: Fine-grained weight quantization for load- balanced bit-serial neural network accelerators,","venue":null,"work_id":null,"year":2022},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:d31c993625e45edbd02c69a7b03eb12fb32c8c08a40672d932928a4d5c7cad8a","observation_id":"fc40b614-7808-48da-86cc-b8d081fc5723","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Usefuse: Uniform stride for enhanced performance in fused layer architecture of deep neural networks,","venue":null,"work_id":null,"year":2025},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:8372011c9d53bab221f22173da4d362862376ed7b4547687d148bbcbe2b51f7c","observation_id":"c5db833f-4774-458d-8713-0d5102672ec9","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Low-latency online multiplier with reduced activities and mini- mized interconnect for inner product arrays,","venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:4df4cb49ff29313e98d87b3edfcceb9bf0edaf570b32b88a54f3e0c092794685","observation_id":"2aa5e1fb-bdd7-4de3-be4a-755b45a9b6bd","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"On-cnn: Low latency and high throughput online arithmetic based convolutional neural network accelerator,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:53368b65fe074a9f9a60afd61f92e28883f73d220aff7036552d953836ca1366","observation_id":"27e8a503-68e7-4105-8462-b6102addd8e8","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"An efficient dot-product unit based on online arithmetic for variable precision applications,","venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:b7eeee87d8c397f865b62ef7a4833e15887296ee70a1b0d54259c5267e287cb0","observation_id":"980c8627-f000-4830-9a1a-f9801b295e66","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Echo: Energy-efficient computation harnessing online arithmetic—an msdf-based accelerator for dnn inference,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:7254df45a82d3941ca1778051f29513b5db0e8a0ce1873b75f2304c02e36d990","observation_id":"f6b3ccd1-20c0-4ed9-80f0-9f6e3c80c1d7","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Optimizing fpga-based accelerator design for deep convolutional neural networks,","venue":null,"work_id":null,"year":2015},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:05956116b480526011f058aa6f9df67f314c045103ece5b3bb37284a350eff48","observation_id":"72a72efb-b722-42fe-b411-7a4b7ff74f54","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Unpu: An energy-efficient deep neural network accelerator with fully variable weight bit precision,","venue":null,"work_id":null,"year":2018},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":13,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:9c10de7d49bfa8eac31e9ed5d495b1d335fa1c65ff41a100e9e6ed7356faafcb","observation_id":"83468348-5ed3-44f0-8353-d34e95817e28","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-06-25T19:39:19.171282Z","title":"Constant-time addition with hybrid-redundant numbers: Theory and implementa- tions,","venue":null,"work_id":null,"year":2008},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":14,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:9d7c39bec2758634b92829827ddf074715de2746a42bcfbbce261a1e73de156f","observation_id":"81e1a7b1-5bc7-4f39-8a2b-613128b20885","resolution":{"observed_at":"2026-06-25T19:39:19.171282Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2101.05615","last_updated":"2021-01-13T00:34:04Z","snapshot_observed_at":"2026-08-16T18:52:40.870137Z","submitted_at":"2021-01-13T00:34:04Z","title":"FBGEMM: Enabling High-Performance Low-Precision Deep Learning Inference","version":1},"cited_work":{"arxiv_id":"2101.05615","doi":"10.48550/arxiv.2101.05615","metadata_source":"arxiv_reference","pith_arxiv_id":"2101.05615","snapshot_observed_at":"2026-08-05T02:28:24.338817Z","title":"Fbgemm: Enabling high-performance low-precision deep learning inference","venue":"arXiv (Cornell University)","work_id":"4d19953f-a282-40d6-bc5a-a1c9cf0ff506","year":2021},"citing_paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA","version":1},"reference_index":15,"source":"pdf_text","source_observed_at":"2026-06-25T19:39:19.171282Z"},"links":{"cited_paper":"/paper/2101.05615","citing_paper":"/paper/2606.25562"},"observation_digest":"sha256:4eb14285a56707a96b634684b35d086329dc901caaa6a0d1477df53a66960a7f","observation_id":"07555963-89e6-40ca-b723-6a9d7d261074","resolution":{"observed_at":"2026-07-04T20:50:10.678976Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-20T06:33:59.587034+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-20T06:33:59.587034+00:00","source":"crossref"},{"observed_at":"2026-08-20T06:33:54.927442+00:00","source":"retraction_watch"}],"state":"measured"}}],"paper":{"arxiv_id":"2606.25562","last_updated":"2026-06-24T08:37:40Z","latest_version":1,"primary_category":"cs.AR","snapshot_observed_at":"2026-08-13T00:51:38.914757Z","submitted_at":"2026-06-24T08:37:40Z","title":"Energy-Efficient CNN Acceleration with MSDF Digit-Serial Arithmetic on FPGA"},"reference_resolution":{"displayed":15,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":14,"verified_exact":1,"verified_fuzzy":0},"total_outbound_references":15},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-20T06:33:59.587034+00:00","source":"crossref"},{"observed_at":"2026-08-20T06:33:54.927442+00:00","source":"retraction_watch"}],"thesis":"As of 20 August 2026, this Paper Citation Record lists 15 of 15 outbound references and 0 inbound Pith citation observations for arXiv:2606.25562."}