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arxiv: 2605.16841 · v1 · pith:OQHPS6KSnew · submitted 2026-05-16 · ⚛️ physics.optics

Dispersion-Engineered Terahertz Silicon Interconnects Enabling Terabit-Scale Data Links

Bodhan Chakraborty , Wenhao Wang , Nikhil Navaratna , Thomas Caiwei Tan , Pascal Szriftgiser , Hadjer Nihel Khelil , Guillaume Ducournau , Ranjan Singh This is my paper

Pith reviewed 2026-05-19 19:51 UTC · model grok-4.3

classification ⚛️ physics.optics
keywords terahertz interconnectssilicon waveguidesdispersion engineeringon-chip communicationterabit data ratesCMOS compatibleBragg stopbandsgroup velocity dispersion
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The pith

Dispersion-engineered unclad silicon waveguides enable 1.004 Tbps multi-band THz on-chip data links.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper shows a way to create high-capacity data paths on silicon chips using terahertz waves that fits within standard manufacturing. AI and data systems need faster short-range links than current electrical or optical options can easily provide at low power. By adding effective-medium structures to unclad silicon guides, the design removes frequency bands where reflections would block transmission and keeps the signal delay nearly constant. This flat response across 220-500 GHz supports both polarizations and lets fourteen channels carry over a terabit per second in straight paths or twelve channels in bends. The result gives a compact, CMOS-compatible platform for dense chip-to-chip connections in future processors and networks.

Core claim

The authors demonstrate a CMOS-compatible, centimetre-scale, multi-band on-chip THz data link achieving an aggregate throughput of 1.004 Tbps. The performance is enabled by suppressing Bragg-induced stopbands using dispersion-engineered, effective-medium-supported unclad silicon waveguides, resulting in flat transmission and low-ripple group delay across multiple THz bands. The waveguide platform operates from 220 to 500 GHz and supports both TE and TM polarizations with low path loss, low bending loss, and low GVD. Fourteen channels in a straight waveguide and twelve channels in a 90° bend achieve aggregate data rates of 1.004 Tbps and 0.895 Tbps, respectively, with GVD as low as 0.15 ps²/μ

What carries the argument

Dispersion-engineered, effective-medium-supported unclad silicon waveguides that suppress Bragg-induced stopbands to produce flat transmission and low group-velocity dispersion.

Load-bearing premise

The dispersion-engineered unclad silicon waveguides will suppress Bragg stopbands and deliver the stated low propagation loss, bending loss, and GVD of 0.15 ps²/mm across the full fabricated 220-500 GHz band without hidden penalties.

What would settle it

Fabricate the waveguides and measure transmission spectra plus group delay over 220-500 GHz; if stopbands appear or GVD rises well above 0.15 ps²/mm with high ripple, the claimed suppression mechanism does not hold.

read the original abstract

The rapid growth of artificial intelligence (AI) and data-centric computing is driving exabyte-scale data transfer, pushing conventional interconnect technologies toward fundamental bandwidth and energy limits. Although optical interconnects provide high-capacity and long-reach communication, their complexity and energy overhead limit scalability in short-reach chiplet-based and on-chip systems. Terahertz (THz) silicon interconnects offer a promising alternative by bridging electronics and photonics in compact, complementary metal-oxide-semiconductor (CMOS)-compatible platforms capable of high bandwidth and low latency. However, practical THz interconnects require simultaneous multi-band operation, dual-polarization support, low propagation loss, low group-velocity dispersion (GVD), and terabit-per-second throughput, while avoiding Bragg-induced stopbands and dispersion penalties at high frequencies. Here, we demonstrate a CMOS-compatible, centimetre-scale, multi-band on-chip THz data link achieving an aggregate throughput of 1.004 Tbps. The performance is enabled by suppressing Bragg-induced stopbands using dispersion-engineered, effective-medium-supported unclad silicon waveguides, resulting in flat transmission and low-ripple group delay across multiple THz bands. The waveguide platform operates from 220 to 500 GHz and supports both transverse-electric (TE) and transverse-magnetic (TM) polarizations with low path loss, low bending loss, and low GVD. Fourteen channels in a straight waveguide and twelve channels in a 90$^\circ$ bend achieve aggregate data rates of 1.004 Tbps and 0.895 Tbps, respectively, with GVD as low as 0.15 ps$^2$/mm over the full operating band. These results establish a scalable and energy-efficient THz interconnect platform for high-density on-chip and chip-to-chip communication fabrics targeting next-generation AI systems and emerging 6G technologies.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The manuscript claims a CMOS-compatible centimetre-scale multi-band on-chip THz interconnect using dispersion-engineered effective-medium-supported unclad silicon waveguides to suppress Bragg-induced stopbands. This yields flat transmission and low-ripple group delay from 220-500 GHz with GVD as low as 0.15 ps²/mm, enabling dual-polarization operation, 14 channels in straight waveguides for 1.004 Tbps aggregate throughput, and 12 channels in 90° bends for 0.895 Tbps, with low propagation and bending losses.

Significance. If the experimental results are robustly supported, the work would advance THz silicon interconnects as a scalable, energy-efficient platform bridging electronics and photonics for AI data fabrics and 6G, addressing bandwidth limits of conventional technologies with specific quantitative metrics for throughput and dispersion.

major comments (2)
  1. [Experimental Results] The central claim of 1.004 Tbps (14 channels straight) and 0.895 Tbps (12 channels bent) rests on fabricated devices exhibiting the predicted flat transmission and low-ripple group delay without Bragg stopbands across 220-500 GHz. The manuscript must include the measured S-parameter traces or time-domain data for both straight and 90°-bend structures (with error bars and multiple-device statistics) to confirm no unaccounted penalties from fabrication tolerances or mode leakage; without this, the aggregate throughput numbers cannot be substantiated.
  2. [Device Characterization] The reported GVD of 0.15 ps²/mm over the full band is load-bearing for the low-ripple group delay claim. The extraction method, comparison to simulation, and sensitivity to fabrication variations should be detailed with explicit equations or fitting procedures; current presentation leaves open whether real devices achieve this value uniformly in all sub-bands.
minor comments (2)
  1. [Abstract] Quantify the 'low path loss' and 'low bending loss' values in the abstract and main text with specific dB/cm or dB/bend figures for direct comparison to prior work.
  2. [Methods] Add fabrication tolerance analysis or yield statistics to support the CMOS-compatibility claim for practical deployment.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive comments and positive assessment of the work's potential impact. We address each major comment point by point below and have prepared revisions to strengthen the experimental validation and characterization details.

read point-by-point responses

  1. Referee: [Experimental Results] The central claim of 1.004 Tbps (14 channels straight) and 0.895 Tbps (12 channels bent) rests on fabricated devices exhibiting the predicted flat transmission and low-ripple group delay without Bragg stopbands across 220-500 GHz. The manuscript must include the measured S-parameter traces or time-domain data for both straight and 90°-bend structures (with error bars and multiple-device statistics) to confirm no unaccounted penalties from fabrication tolerances or mode leakage; without this, the aggregate throughput numbers cannot be substantiated.

    Authors: We agree that explicit presentation of the measured data is necessary to fully substantiate the throughput claims. In the revised manuscript we will add a new supplementary figure (or expanded main-text panel) showing the measured S21 magnitude and phase for representative straight and 90°-bend devices across 220–500 GHz. Error bars will reflect statistics from five independently fabricated devices per geometry, and time-domain impulse responses will be included to visualize the low group-delay ripple. These additions will directly address potential fabrication or leakage penalties. revision: yes

  2. Referee: [Device Characterization] The reported GVD of 0.15 ps²/mm over the full band is load-bearing for the low-ripple group delay claim. The extraction method, comparison to simulation, and sensitivity to fabrication variations should be detailed with explicit equations or fitting procedures; current presentation leaves open whether real devices achieve this value uniformly in all sub-bands.

    Authors: We acknowledge that the GVD extraction procedure requires more explicit documentation. The revised manuscript will include a dedicated methods subsection that states the extraction formula GVD(ω) = d²φ(ω)/dω² / L (where φ is the unwrapped phase from measured S-parameters and L is the device length), shows direct overlay of measured versus simulated GVD curves for each sub-band, and reports a sensitivity study for ±5 % width and height variations consistent with our foundry tolerances. This will confirm uniformity of the 0.15 ps²/mm value across the operating bands. revision: yes

Circularity Check

0 steps flagged

No circularity: experimental demonstration rests on fabricated-device measurements

full rationale

The paper reports direct experimental results from CMOS-compatible fabricated silicon waveguides and data-link structures, including measured aggregate throughputs of 1.004 Tbps (straight) and 0.895 Tbps (bent) over 220-500 GHz with stated GVD of 0.15 ps²/mm. No derivation chain, predictive equations, or fitted parameters are presented that reduce to self-referential inputs; the central performance claims are grounded in physical measurements rather than theoretical constructs that could be circular by construction. Self-citations, if present, are not load-bearing for the reported throughput or waveguide behavior.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Experimental hardware demonstration paper; no free parameters, axioms, or invented entities are introduced. The approach relies on established electromagnetic principles and standard silicon material properties from prior literature.

pith-pipeline@v0.9.0 · 5894 in / 1195 out tokens · 55416 ms · 2026-05-19T19:51:29.724917+00:00 · methodology

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Reference graph

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