{"record_type":"pith_number_record","schema_url":"https://pith.science/schemas/pith-number/v1.json","pith_number":"pith:2020:4GKKJVIVVBNIHIMBQM4EDDTROK","short_pith_number":"pith:4GKKJVIV","schema_version":"1.0","canonical_sha256":"e194a4d515a85a83a1818338418e7172a2fb561352a73d6d5795019be197d542","source":{"kind":"arxiv","id":"2001.01808","version":2},"attestation_state":"computed","paper":{"title":"AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":[],"primary_cat":"eess.SP","authors_text":"Ameer Haj-Ali, Borivoje Nikolic, Keertana Settaluri, Kourosh Hakhamaneshi, Qijing Huang","submitted_at":"2020-01-06T23:30:24Z","abstract_excerpt":"Domain specialization under energy constraints in deeply-scaled CMOS has been driving the need for agile development of Systems on a Chip (SoCs). While digital subsystems have design flows that are conducive to rapid iterations from specification to layout, analog and mixed-signal modules face the challenge of a long human-in-the-middle iteration loop that requires expert intuition to verify that post-layout circuit parameters meet the original design specification. Existing automated solutions that optimize circuit parameters for a given target design specification have limitations of being s"},"verification_status":{"content_addressed":true,"pith_receipt":true,"author_attested":false,"weak_author_claims":0,"strong_author_claims":0,"externally_anchored":false,"storage_verified":false,"citation_signatures":0,"replication_records":0,"graph_snapshot":true,"references_resolved":false,"formal_links_present":false},"canonical_record":{"source":{"id":"2001.01808","kind":"arxiv","version":2},"metadata":{"license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","primary_cat":"eess.SP","submitted_at":"2020-01-06T23:30:24Z","cross_cats_sorted":[],"title_canon_sha256":"8dea7168051d0f111f9f47c6242b0d4d7037bfc80b238d36b924bc07df14d6f9","abstract_canon_sha256":"a117ada1f7fff72e7e8d60404a2997b876a3254daeb6b34b3f332b75e01607bc"},"schema_version":"1.0"},"receipt":{"kind":"pith_receipt","key_id":"pith-v1-2026-05","algorithm":"ed25519","signed_at":"2026-07-05T00:34:51.317852Z","signature_b64":"SbOwhF+aH2/+DPfw8JrWZCPvjpG2gFLQZYejvWbjbt6LIBQliF3WNKQnA2VjqIyi5GHaI1/1Sl7ajptTo2T7AQ==","signed_message":"canonical_sha256_bytes","builder_version":"pith-number-builder-2026-05-17-v1","receipt_version":"0.3","canonical_sha256":"e194a4d515a85a83a1818338418e7172a2fb561352a73d6d5795019be197d542","last_reissued_at":"2026-07-05T00:34:51.317355Z","signature_status":"signed_v1","first_computed_at":"2026-07-05T00:34:51.317355Z","public_key_fingerprint":"8d4b5ee74e4693bcd1df2446408b0d54"},"graph_snapshot":{"paper":{"title":"AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":[],"primary_cat":"eess.SP","authors_text":"Ameer Haj-Ali, Borivoje Nikolic, Keertana Settaluri, Kourosh Hakhamaneshi, Qijing Huang","submitted_at":"2020-01-06T23:30:24Z","abstract_excerpt":"Domain specialization under energy constraints in deeply-scaled CMOS has been driving the need for agile development of Systems on a Chip (SoCs). While digital subsystems have design flows that are conducive to rapid iterations from specification to layout, analog and mixed-signal modules face the challenge of a long human-in-the-middle iteration loop that requires expert intuition to verify that post-layout circuit parameters meet the original design specification. Existing automated solutions that optimize circuit parameters for a given target design specification have limitations of being s"},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"2001.01808","kind":"arxiv","version":2},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"integrity":{"clean":true,"summary":{"advisory":0,"critical":0,"by_detector":{},"informational":0},"endpoint":"/pith/2001.01808/integrity.json","findings":[],"available":true,"detectors_run":[],"snapshot_sha256":"c28c3603d3b5d939e8dc4c7e95fa8dfce3d595e45f758748cecf8e644a296938"},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"},"aliases":[{"alias_kind":"arxiv","alias_value":"2001.01808","created_at":"2026-07-05T00:34:51.317416+00:00"},{"alias_kind":"arxiv_version","alias_value":"2001.01808v2","created_at":"2026-07-05T00:34:51.317416+00:00"},{"alias_kind":"doi","alias_value":"10.48550/arxiv.2001.01808","created_at":"2026-07-05T00:34:51.317416+00:00"},{"alias_kind":"pith_short_12","alias_value":"4GKKJVIVVBNI","created_at":"2026-07-05T00:34:51.317416+00:00"},{"alias_kind":"pith_short_16","alias_value":"4GKKJVIVVBNIHIMB","created_at":"2026-07-05T00:34:51.317416+00:00"},{"alias_kind":"pith_short_8","alias_value":"4GKKJVIV","created_at":"2026-07-05T00:34:51.317416+00:00"}],"events":[],"event_summary":{},"paper_claims":[],"inbound_citations":{"count":1,"internal_anchor_count":0,"sample":[{"citing_arxiv_id":"2606.02869","citing_title":"ZOAF: Towards Efficient Zeroth-Order Optimization for Analog/RF Circuit Design","ref_index":39,"is_internal_anchor":false}]},"formal_canon":{"evidence_count":0,"sample":[],"anchors":[]},"links":{"html":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK","json":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK.json","graph_json":"https://pith.science/api/pith-number/4GKKJVIVVBNIHIMBQM4EDDTROK/graph.json","events_json":"https://pith.science/api/pith-number/4GKKJVIVVBNIHIMBQM4EDDTROK/events.json","paper":"https://pith.science/paper/4GKKJVIV"},"agent_actions":{"view_html":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK","download_json":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK.json","view_paper":"https://pith.science/paper/4GKKJVIV","resolve_alias":"https://pith.science/api/pith-number/resolve?arxiv=2001.01808&json=true","fetch_graph":"https://pith.science/api/pith-number/4GKKJVIVVBNIHIMBQM4EDDTROK/graph.json","fetch_events":"https://pith.science/api/pith-number/4GKKJVIVVBNIHIMBQM4EDDTROK/events.json","actions":{"anchor_timestamp":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK/action/timestamp_anchor","attest_storage":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK/action/storage_attestation","attest_author":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK/action/author_attestation","sign_citation":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK/action/citation_signature","submit_replication":"https://pith.science/pith/4GKKJVIVVBNIHIMBQM4EDDTROK/action/replication_record"}},"created_at":"2026-07-05T00:34:51.317416+00:00","updated_at":"2026-07-05T00:34:51.317416+00:00"}