{"record_type":"pith_number_record","schema_url":"https://pith.science/schemas/pith-number/v1.json","pith_number":"pith:2014:7BQ5ZDL6VSZXQLGSRYUOWCO36O","short_pith_number":"pith:7BQ5ZDL6","schema_version":"1.0","canonical_sha256":"f861dc8d7eacb3782cd28e28eb09dbf3a03170167d855801ee0687a01ca43873","source":{"kind":"arxiv","id":"1407.7448","version":1},"attestation_state":"computed","paper":{"title":"Parallelism-Aware Memory Interference Delay Analysis for COTS Multicore Systems","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":["cs.PF"],"primary_cat":"cs.DC","authors_text":"Heechul Yun","submitted_at":"2014-07-25T08:43:36Z","abstract_excerpt":"In modern Commercial Off-The-Shelf (COTS) multicore systems, each core can generate many parallel memory requests at a time. The processing of these parallel requests in the DRAM controller greatly affects the memory interference delay experienced by running tasks on the platform. In this paper, we model a modern COTS multicore system which has a nonblocking last-level cache (LLC) and a DRAM controller that prioritizes reads over writes. To minimize interference, we focus on LLC and DRAM bank partitioned systems. Based on the model, we propose an analysis that computes a safe upper bound for t"},"verification_status":{"content_addressed":true,"pith_receipt":true,"author_attested":false,"weak_author_claims":0,"strong_author_claims":0,"externally_anchored":false,"storage_verified":false,"citation_signatures":0,"replication_records":0,"graph_snapshot":true,"references_resolved":false,"formal_links_present":false},"canonical_record":{"source":{"id":"1407.7448","kind":"arxiv","version":1},"metadata":{"license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","primary_cat":"cs.DC","submitted_at":"2014-07-25T08:43:36Z","cross_cats_sorted":["cs.PF"],"title_canon_sha256":"82376c6d610be7c292c5ebe7351d06dbd0ef6afba820020c20964c220e352348","abstract_canon_sha256":"0d7674ad3d658482691e7cbb916edf213c0cbef076bc8ad3dc26c366fcce4cb3"},"schema_version":"1.0"},"receipt":{"kind":"pith_receipt","key_id":"pith-v1-2026-05","algorithm":"ed25519","signed_at":"2026-05-18T02:46:23.137212Z","signature_b64":"zVzgSIYT733wAfB+Zg5IYZGunkfWAodCoHdS6wxkUGQry0uox1rJjC0FZdYkiY5iLqzfk2LZpoe7hiKYcbvJCw==","signed_message":"canonical_sha256_bytes","builder_version":"pith-number-builder-2026-05-17-v1","receipt_version":"0.3","canonical_sha256":"f861dc8d7eacb3782cd28e28eb09dbf3a03170167d855801ee0687a01ca43873","last_reissued_at":"2026-05-18T02:46:23.136817Z","signature_status":"signed_v1","first_computed_at":"2026-05-18T02:46:23.136817Z","public_key_fingerprint":"8d4b5ee74e4693bcd1df2446408b0d54"},"graph_snapshot":{"paper":{"title":"Parallelism-Aware Memory Interference Delay Analysis for COTS Multicore Systems","license":"http://arxiv.org/licenses/nonexclusive-distrib/1.0/","headline":"","cross_cats":["cs.PF"],"primary_cat":"cs.DC","authors_text":"Heechul Yun","submitted_at":"2014-07-25T08:43:36Z","abstract_excerpt":"In modern Commercial Off-The-Shelf (COTS) multicore systems, each core can generate many parallel memory requests at a time. The processing of these parallel requests in the DRAM controller greatly affects the memory interference delay experienced by running tasks on the platform. In this paper, we model a modern COTS multicore system which has a nonblocking last-level cache (LLC) and a DRAM controller that prioritizes reads over writes. To minimize interference, we focus on LLC and DRAM bank partitioned systems. Based on the model, we propose an analysis that computes a safe upper bound for t"},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"1407.7448","kind":"arxiv","version":1},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"},"aliases":[{"alias_kind":"arxiv","alias_value":"1407.7448","created_at":"2026-05-18T02:46:23.136875+00:00"},{"alias_kind":"arxiv_version","alias_value":"1407.7448v1","created_at":"2026-05-18T02:46:23.136875+00:00"},{"alias_kind":"doi","alias_value":"10.48550/arxiv.1407.7448","created_at":"2026-05-18T02:46:23.136875+00:00"},{"alias_kind":"pith_short_12","alias_value":"7BQ5ZDL6VSZX","created_at":"2026-05-18T12:28:16.859392+00:00"},{"alias_kind":"pith_short_16","alias_value":"7BQ5ZDL6VSZXQLGS","created_at":"2026-05-18T12:28:16.859392+00:00"},{"alias_kind":"pith_short_8","alias_value":"7BQ5ZDL6","created_at":"2026-05-18T12:28:16.859392+00:00"}],"events":[],"event_summary":{},"paper_claims":[],"inbound_citations":{"count":0,"internal_anchor_count":0,"sample":[]},"formal_canon":{"evidence_count":0,"sample":[],"anchors":[]},"links":{"html":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O","json":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O.json","graph_json":"https://pith.science/api/pith-number/7BQ5ZDL6VSZXQLGSRYUOWCO36O/graph.json","events_json":"https://pith.science/api/pith-number/7BQ5ZDL6VSZXQLGSRYUOWCO36O/events.json","paper":"https://pith.science/paper/7BQ5ZDL6"},"agent_actions":{"view_html":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O","download_json":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O.json","view_paper":"https://pith.science/paper/7BQ5ZDL6","resolve_alias":"https://pith.science/api/pith-number/resolve?arxiv=1407.7448&json=true","fetch_graph":"https://pith.science/api/pith-number/7BQ5ZDL6VSZXQLGSRYUOWCO36O/graph.json","fetch_events":"https://pith.science/api/pith-number/7BQ5ZDL6VSZXQLGSRYUOWCO36O/events.json","actions":{"anchor_timestamp":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O/action/timestamp_anchor","attest_storage":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O/action/storage_attestation","attest_author":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O/action/author_attestation","sign_citation":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O/action/citation_signature","submit_replication":"https://pith.science/pith/7BQ5ZDL6VSZXQLGSRYUOWCO36O/action/replication_record"}},"created_at":"2026-05-18T02:46:23.136875+00:00","updated_at":"2026-05-18T02:46:23.136875+00:00"}