{"record_type":"pith_number_record","schema_url":"https://pith.science/schemas/pith-number/v1.json","pith_number":"pith:2024:BK3UNB7PRWS4ALEFR5SI3XYTVA","short_pith_number":"pith:BK3UNB7P","schema_version":"1.0","canonical_sha256":"0ab74687ef8da5c02c858f648ddf13a8060ee708c0c60b06a197860b1d6755ed","source":{"kind":"arxiv","id":"2410.09188","version":4},"attestation_state":"computed","paper":{"title":"MFIT: Multi-Fidelity Thermal Modeling for 2.5D and 3D Multi-Chiplet Architectures","license":"http://creativecommons.org/licenses/by/4.0/","headline":"","cross_cats":[],"primary_cat":"cs.AR","authors_text":"Alish Kanani, Eric Tervo, Harsh Sharma, Jaehyun Park, Janardhan Rao Doppa, Lukas Pfromm, Partha Pratim Pande, Parth Solanki, Umit Y. Ogras","submitted_at":"2024-10-11T18:42:28Z","abstract_excerpt":"Rapidly evolving artificial intelligence and machine learning applications require ever-increasing computational capabilities, while monolithic 2D design technologies approach their limits. Heterogeneous integration of smaller chiplets using a 2.5D silicon interposer and 3D packaging has emerged as a promising paradigm to address this limit and meet performance demands. These approaches offer a significant cost reduction and higher manufacturing yield than monolithic 2D integrated circuits. However, the compact arrangement and high compute density exacerbate the thermal management challenges, "},"verification_status":{"content_addressed":true,"pith_receipt":true,"author_attested":false,"weak_author_claims":0,"strong_author_claims":0,"externally_anchored":false,"storage_verified":false,"citation_signatures":0,"replication_records":0,"graph_snapshot":true,"references_resolved":false,"formal_links_present":false},"canonical_record":{"source":{"id":"2410.09188","kind":"arxiv","version":4},"metadata":{"license":"http://creativecommons.org/licenses/by/4.0/","primary_cat":"cs.AR","submitted_at":"2024-10-11T18:42:28Z","cross_cats_sorted":[],"title_canon_sha256":"b6756fb7a4d57bc53d270e094ebcdfdcbbd3f218396ade89b76ce940eaf8b512","abstract_canon_sha256":"ef8c3c898c8e53f896aba8884e35b1fa655531bc85962640c0a3a8259504e304"},"schema_version":"1.0"},"receipt":{"kind":"pith_receipt","key_id":"pith-v1-2026-05","algorithm":"ed25519","signed_at":"2026-07-05T11:01:27.582069Z","signature_b64":"XM5OZopPyRLLZvboufR4ZEPGGhP/uTmkQWqfHo13tFNU61YXeTvv1LDlBbokq06raENLMHglIb2jWQRKEFNmDA==","signed_message":"canonical_sha256_bytes","builder_version":"pith-number-builder-2026-05-17-v1","receipt_version":"0.3","canonical_sha256":"0ab74687ef8da5c02c858f648ddf13a8060ee708c0c60b06a197860b1d6755ed","last_reissued_at":"2026-07-05T11:01:27.581592Z","signature_status":"signed_v1","first_computed_at":"2026-07-05T11:01:27.581592Z","public_key_fingerprint":"8d4b5ee74e4693bcd1df2446408b0d54"},"graph_snapshot":{"paper":{"title":"MFIT: Multi-Fidelity Thermal Modeling for 2.5D and 3D Multi-Chiplet Architectures","license":"http://creativecommons.org/licenses/by/4.0/","headline":"","cross_cats":[],"primary_cat":"cs.AR","authors_text":"Alish Kanani, Eric Tervo, Harsh Sharma, Jaehyun Park, Janardhan Rao Doppa, Lukas Pfromm, Partha Pratim Pande, Parth Solanki, Umit Y. Ogras","submitted_at":"2024-10-11T18:42:28Z","abstract_excerpt":"Rapidly evolving artificial intelligence and machine learning applications require ever-increasing computational capabilities, while monolithic 2D design technologies approach their limits. Heterogeneous integration of smaller chiplets using a 2.5D silicon interposer and 3D packaging has emerged as a promising paradigm to address this limit and meet performance demands. These approaches offer a significant cost reduction and higher manufacturing yield than monolithic 2D integrated circuits. However, the compact arrangement and high compute density exacerbate the thermal management challenges, "},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"2410.09188","kind":"arxiv","version":4},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"integrity":{"clean":true,"summary":{"advisory":0,"critical":0,"by_detector":{},"informational":0},"endpoint":"/pith/2410.09188/integrity.json","findings":[],"available":true,"detectors_run":[],"snapshot_sha256":"c28c3603d3b5d939e8dc4c7e95fa8dfce3d595e45f758748cecf8e644a296938"},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"},"aliases":[{"alias_kind":"arxiv","alias_value":"2410.09188","created_at":"2026-07-05T11:01:27.581647+00:00"},{"alias_kind":"arxiv_version","alias_value":"2410.09188v4","created_at":"2026-07-05T11:01:27.581647+00:00"},{"alias_kind":"doi","alias_value":"10.48550/arxiv.2410.09188","created_at":"2026-07-05T11:01:27.581647+00:00"},{"alias_kind":"pith_short_12","alias_value":"BK3UNB7PRWS4","created_at":"2026-07-05T11:01:27.581647+00:00"},{"alias_kind":"pith_short_16","alias_value":"BK3UNB7PRWS4ALEF","created_at":"2026-07-05T11:01:27.581647+00:00"},{"alias_kind":"pith_short_8","alias_value":"BK3UNB7P","created_at":"2026-07-05T11:01:27.581647+00:00"}],"events":[],"event_summary":{},"paper_claims":[],"inbound_citations":{"count":1,"internal_anchor_count":0,"sample":[{"citing_arxiv_id":"2605.00399","citing_title":"Transient Multiscale Workflow for Thermal Analysis of 3DHI Chip Stack","ref_index":10,"is_internal_anchor":false}]},"formal_canon":{"evidence_count":0,"sample":[],"anchors":[]},"links":{"html":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA","json":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA.json","graph_json":"https://pith.science/api/pith-number/BK3UNB7PRWS4ALEFR5SI3XYTVA/graph.json","events_json":"https://pith.science/api/pith-number/BK3UNB7PRWS4ALEFR5SI3XYTVA/events.json","paper":"https://pith.science/paper/BK3UNB7P"},"agent_actions":{"view_html":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA","download_json":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA.json","view_paper":"https://pith.science/paper/BK3UNB7P","resolve_alias":"https://pith.science/api/pith-number/resolve?arxiv=2410.09188&json=true","fetch_graph":"https://pith.science/api/pith-number/BK3UNB7PRWS4ALEFR5SI3XYTVA/graph.json","fetch_events":"https://pith.science/api/pith-number/BK3UNB7PRWS4ALEFR5SI3XYTVA/events.json","actions":{"anchor_timestamp":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA/action/timestamp_anchor","attest_storage":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA/action/storage_attestation","attest_author":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA/action/author_attestation","sign_citation":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA/action/citation_signature","submit_replication":"https://pith.science/pith/BK3UNB7PRWS4ALEFR5SI3XYTVA/action/replication_record"}},"created_at":"2026-07-05T11:01:27.581647+00:00","updated_at":"2026-07-05T11:01:27.581647+00:00"}